WG 2 - TC 47/WG 2

IEC 63287-2:2023 gives guidelines for the development of reliability qualification plans using the concept of mission profile, based on the environmental conditioning and proposed usage of the product. This document is not intended for military- and space-related applications.

IEC 60749-37:2022 is available as IEC 60749-37:2022 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.IEC 60749-37:2022 provides a test method that is intended to evaluate and compare drop performance of surface mount electronic components for handheld electronic product applications in an accelerated test environment, where excessive flexure of a circuit board causes product failure. The purpose is to standardize the test board and test methodology to provide a reproducible assessment of the drop test performance of surface-mounted components while producing the same failure modes normally observed during product level test. This edition includes the following significant technical changes with respect to the previous edition:
- correction of a previous technical error concerning test conditions;
- updates to reflect improvements in technology.

IEC 60749-10:2022 is intended to evaluate devices in the free state and assembled to printed wiring boards for use in electrical equipment. The method is intended to determine the compatibility of devices and subassemblies to withstand moderately severe shocks. The use of subassemblies is a means to test devices in usage conditions as assembled to printed wiring boards. Mechanical shock due to suddenly applied forces, or abrupt change in motion produced by handling, transportation or field operation can disturb operating characteristics, particularly if the shock pulses are repetitive. This is a destructive test intended for device qualification.
This edition cancels and replaces the first edition published in 2002. This edition includes the following significant technical changes with respect to the previous edition:  
covers both unattached components and components attached to printed wiring boards;
tolerance limits modified for peak acceleration and pulse duration;
mathematical formulae added for velocity change and equivalent drop height.

IEC 60749-28:2022 is available as IEC 60749-28:2022 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.
IEC 60749-28:2022 establishes the procedure for testing, evaluating, and classifying devices and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a defined field-induced charged device model (CDM) electrostatic discharge (ESD). All packaged semiconductor devices, thin film circuits, surface acoustic wave (SAW) devices, opto-electronic devices, hybrid integrated circuits (HICs), and multi-chip modules (MCMs) containing any of these devices are to be evaluated according to this document. To perform the tests, the devices are assembled into a package similar to that expected in the final application. This CDM document does not apply to socketed discharge model testers. This document describes the field-induced (FI) method. An alternative, the direct contact (DC) method, is described in Annex J. The purpose of this document is to establish a test method that will replicate CDM failures and provide reliable, repeatable CDM ESD test results from tester to tester, regardless of device type. Repeatable data will allow accurate classifications and comparisons of CDM ESD sensitivity levels. This edition includes the following significant technical changes with respect to the previous edition:
- a new subclause and annex relating to the problems associated with CDM testing of integrated circuits and discrete semiconductors in very small packages;
- changes to clarify cleaning of devices and testers.

IEC 60749-39:2021 is available as IEC 60749-39:2021 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.
IEC 60749-39:2021 details the procedures for the measurement of the characteristic properties of moisture diffusivity and water solubility in organic materials used in the packaging of semiconductor components. These two material properties are important parameters for the effective reliability performance of plastic packaged semiconductors after exposure to moisture and being subjected to high-temperature solder reflow. This edition includes the following significant technical changes with respect to the previous edition:
- updated procedure for "dry weight" determination.

IEC 62435-9:2021 specifies storage practices encompassing silicon and semiconductor device building blocks of all types that are integrated together to into products in the form of either packages or boards that can be stored as fully assembled units or partial assemblies. Special attention is given to memories as components and assemblies although methods also apply to heterogeneous components. Guidelines and requirements for customer-supplier interaction are provided to manage the complexity.
NOTE In IEC 62435 (all parts), the term "components" is used interchangeably with dice, wafers, passives and packaged devices.

IEC 63287-1:2021 gives guidelines for reliability qualification plans of semiconductor integrated circuit products. This document is not intended for military- and space-related applications.
NOTE 1 The manufacturer can use flexible sample sizes to reduce cost and maintain reasonable reliability by this guideline adaptation based on EDR-4708, AEC Q100, JESD47 or other relevant document can also be applicable if it is specified.
NOTE 2 The Weibull distribution method used in this document is one of several methods to calculate the appropriate sample size and test conditions of a given reliability project.
This first edition of IEC 63287-1 cancels and replaces the first edition of IEC 60749-43 published in 2017. This edition constitutes a technical revision.
This edition includes the following significant technical changes with respect to the previous edition:
the document has been renamed and renumbered to distinguish it from the IEC 60749 (all parts);
a new section concerning the concept of "family" has been added with appropriate renumbering of the existing text.

IEC 62435-7:2020 on long-term storage applies to micro-electromechanical devices (MEMS) in long-term storage that can be used as part of obsolescence mitigation strategy. Long-term storage refers to a duration that may be more than 12 months for products scheduled for storage. Philosophy, good working practice, and general means to facilitate the successful long-term storage of electronic components are also addressed.

IEC 60749-20:2020 is available as IEC 60749-20:2020 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.IEC 60749-20:2020 provides a means of assessing the resistance to soldering heat of semiconductors packaged as plastic encapsulated surface mount devices (SMDs). This test is destructive. This edition includes the following significant technical changes with respect to the previous edition:
- incorporation of a technical corrigendum to IEC 60749-20:2008 (second edition );
- inclusion of new Clause 3;
- inclusion of explanatory notes.

IEC 60749-30:2020 is available as IEC 60749-30:2020 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.
IEC 60749-30:2020 establishes a standard procedure for determining the preconditioning of non-hermetic surface mount devices (SMDs) prior to reliability testing.
The test method defines the preconditioning flow for non-hermetic solid-state SMDs representative of a typical industry multiple solder reflow operation.
These SMDs are subjected to the appropriate preconditioning sequence described in this document prior to being submitted to specific in-house reliability testing (qualification and/or reliability monitoring) in order to evaluate long term reliability (impacted by soldering stress). This edition includes the following significant technical changes with respect to the previous edition:
- inclusion of new Clause 3;
- expansion of 6.7 on solder reflow;
- inclusion of explanatory notes and clarifications.

IEC 60749-41:2020 specifies the procedural requirements for performing valid endurance, retention and cross-temperature tests based on a qualification specification. Endurance and retention qualification specifications (for cycle counts, durations, temperatures, and sample sizes) are specified in JESD47 or are developed using knowledge-based methods such as in JESD94.

IEC 60749-15:2020 is available as IEC 60749-15:2020 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.
IEC 60749-15:2020 describes a test used to determine whether encapsulated solid state devices used for through-hole mounting can withstand the effects of the temperature to which they are subjected during soldering of their leads by using wave soldering. In order to establish a standard test procedure for the most reproducible methods, the solder dip method is used because of its more controllable conditions. This procedure determines whether devices are capable of withstanding the soldering temperature encountered in printed wiring board assembly operations, without degrading their electrical characteristics or internal connections. This test is destructive and may be used for qualification, lot acceptance and as a product monitor. The heat is conducted through the leads into the device package from solder heat at the reverse side of the board. This procedure does not simulate wave soldering or reflow heat exposure on the same side of the board as the package body. This edition includes the following significant technical changes with respect to the previous edition:
- inclusion of new Clause 3, Terms and definitions;
- clarification of the use of a soldering iron for producing the heating effect;
- inclusion an option to use accelerated ageing.

IEC 62435-8:2020 on long-term storage is applied to passive electronic devices in long-term storage that can be used as part of obsolescence mitigation strategy. Long-term storage refers to a duration that can be more than 12 months for product scheduled for storage. Storage typically begins when components are packed at the originating supplier where the pack date or date code are assigned to the product. It is the responsibility of the distributor and the customer to control and manage the aging inventory upon receipt of the dated product. Alternatively, a supplier-customer agreement can be established to manage the aging inventory. Philosophy, good working practice, and general means to facilitate the successful long-term storage of electronic components are also addressed.

IEC 60749-20-1:2019 is available as IEC 60749-20-1:2019 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.
IEC 60749-20-1:2019 applies to all devices subjected to bulk solder reflow processes during PCB assembly, including plastic encapsulated packages, process sensitive devices, and other moisture-sensitive devices made with moisture-permeable materials (epoxies, silicones, etc.) that are exposed to the ambient air.
The purpose of this document is to provide SMD manufacturers and users with standardized methods for handling, packing, shipping, and use of moisture/reflow sensitive SMDs that have been classified to the levels defined in IEC 60749-20. These methods are provided to avoid damage from moisture absorption and exposure to solder reflow temperatures that can result in yield and reliability degradation. By using these procedures, safe and damage-free reflow can be achieved, with the dry packing process, providing a minimum shelf life capability in sealed dry-bags from the seal date. This edition includes the following significant technical changes with respect to the previous edition:
- updates to subclauses to better align the test method with IPC/JEDEC J-STD-033C, including new sections on aqueous cleaning and dry pack precautions;
- addition of two annexes on colorimetric testing of HIC (humidity indicator card) and derivation of bake tables.

IEC 60749-18:2019 is available as IEC 60749-18:2019 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.IEC 60749-18:2019 provides a test procedure for defining requirements for testing packaged semiconductor integrated circuits and discrete semiconductor devices for ionizing radiation (total dose) effects from a cobalt-60 (60Co) gamma ray source. Other suitable radiation sources can be used. This document addresses only steady-state irradiations, and is not applicable to pulse type irradiations. It is intended for military- and aerospace-related applications. It is a destructive test. This edition includes the following significant technical changes with respect to the previous edition:
- updates to subclauses to better align the test method with MIL-STD 883J, method 1019, including the use of enhanced low dose rate sensitivity (ELDRS) testing;
- addition of a Bibliography, which includes ASTM standards relevant to this test method.

IEC 60749-17:2019 is performed to determine the susceptibility of semiconductor devices to non-ionizing energy loss (NIEL) degradation. The test described herein is applicable to integrated circuits and discrete semiconductor devices and is intended for military- and aerospace-related applications. It is a destructive test.
This edition includes the following significant technical changes with respect to the previous edition:  
updates to better align the test method with MIL-STD 883J, method 1017, including removal of restriction of use of the document, and a requirement to limit the total ionization dose;
addition of a Bibliography, including US MIL- and ASTM standards relevant to this test method.

IEC 60749-13:2018 describes a salt atmosphere test that determines the resistance of semiconductor devices to corrosion. It is an accelerated test that simulates the effects of severe sea-coast atmosphere on all exposed surfaces. It is only applicable to those devices specified for a marine environment. The salt atmosphere test is considered destructive.
This edition includes the following significant technical changes with respect to the previous edition:
a) alignment with MIL-STD-883J Method 1009.8, Salt Atmosphere (Corrosion), including information on conditioning and maintenance of the test chamber and mounting of test specimens (including explanatory figures).

IEC 60749-26:2018 establishes the procedure for testing, evaluating, and classifying components and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a defined human body model (HBM) electrostatic discharge (ESD).
The purpose of this document is to establish a test method that will replicate HBM failures and provide reliable, repeatable HBM ESD test results from tester to tester, regardless of component type. Repeatable data will allow accurate classifications and comparisons of HBM ESD sensitivity levels.
ESD testing of semiconductor devices is selected from this test method, the machine model (MM) test method (see IEC 60749-27) or other ESD test methods in the IEC 60749 series. Unless otherwise specified, this test method is the one selected.
This fourth edition cancels and replaces the third edition published in 2013. This edition constitutes a technical revision. This standard is based upon ANSI/ESDA/JEDEC JS-001-2014. It is used with permission of the copyright holders, ESD Association and JEDEC Solid state Technology Association.
This edition includes the following significant technical changes with respect to the previous edition:
a) a new subclause relating to HBM stressing with a low parasitic simulator is added, together with a test to determine if an HBM simulator is a low parasitic simulator;
b) a new subclause is added for cloned non-supply pins and a new annex is added for testing cloned non-supply pins.

IEC 60749-12:2017 describes a test to determine the effect of variable frequency vibration, within the specified frequency range, on internal structural elements. This is a destructive test. It is normally applicable to cavity-type packages
This second edition cancels and replaces the first edition published in 2002. This edition constitutes a technical revision. This edition includes the following significant technical changes with respect to the previous edition:
a) alignment with MIL-STD-883J Method 2007, Vibration, variable frequency.

IEC 60749-5:2017 provides a steady-state temperature and humidity bias life test for the purpose of evaluating the reliability of non-hermetic packaged solid-state devices in humid environments.
This second edition cancels and replaces the first edition published in 2003. This edition constitutes a technical revision.
This edition includes the following significant technical changes with respect to the previous edition:
a) correction of an error in an equation;
b) inclusion of notes for guidance;
c) clarification of the applicability of test conditions.

IEC 60749-28:2017(E) establishes the procedure for testing, evaluating, and classifying devices and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a defined field-induced charged device model (CDM) electrostatic discharge (ESD). All packaged semiconductor devices, thin film circuits, surface acoustic wave (SAW) devices, opto-electronic devices, hybrid integrated circuits (HICs), and multi-chip modules (MCMs) containing any of these devices are to be evaluated according to this document. To perform the tests, the devices are assembled into a package similar to that expected in the final application. This CDM document does not apply to socketed discharge model testers. This document describes the field-induced (FI) method. An alternative, the direct contact (DC) method, is described in Annex I.
The purpose of this document is to establish a test method that will replicate CDM failures and provide reliable, repeatable CDM ESD test results from tester to tester, regardless of device type. Repeatable data will allow accurate classifications and comparisons of CDM ESD sensitivity levels.

IEC 60749-6:2017 is to test and determine the effect on all solid state electronic devices of storage at elevated temperature without electrical stress applied. This test is typically used to determine the effects of time and temperature, under storage conditions, for thermally activated failure methods and time-to-failure of solid state electronic devices, including non-volatile memory devices (data-retention failure mechanisms). This test is considered non-destructive but should preferably be used for device qualification. If such devices are used for delivery, the effects of this highly accelerated stress test will need to be evaluated. Thermally activated failure mechanisms are modelled using the Arrhenius equation for acceleration, and guidance on the selection of test temperatures and durations can be found in IEC 60749-43.
This edition includes the following significant technical changes with respect to the previous edition:
a) additional test conditions;
b) clarification of the applicability of test conditions.

IEC 60749-4:2017 provides a highly accelerated temperature and humidity stress test (HAST) for the purpose of evaluating the reliability of non-hermetic packaged semiconductor devices in humid environments. This edition includes the following significant technical changes with respect to the previous edition:
a) clarification of requirements for temperature, relative humidity and duration detailed in Table 1;
b) recommendations that current limiting resistor(s) be placed in the test set-up to prevent test board or DUT damage;
c) allowance of additional time-to-test delay or return-to-stress delay.

IEC 60749-3:2017 is to verify that the materials, design, construction, markings, and workmanship of a semiconductor device are in accordance with the applicable procurement document. External visual inspection is a non-destructive test and applicable for all package types. The test is useful for qualification, process monitor, or lot acceptance.
This edition includes the following significant technical changes with respect to the previous edition:
a) reference to the need for ESD protection;
b) inclusion of information on the phenomenon of tin whiskers;
c) inclusion of an optional report form/checklist.

IEC 60749-9:2017 is to determine whether the marks on solid state semiconductor devices will remain legible when subjected to the application and removal of labels or the use of solvents and cleaning solutions commonly used during the removal of solder flux residue from the printed circuit board manufacturing process.
This test is applicable for all package types. It is suitable for use in qualification and/or process monitor testing. The test is considered non-destructive. Electrical or mechanical rejects can be used for the purpose of this test.
This edition includes the following significant technical changes with respect to the previous edition:
a) revision to Clause 4 Equipment by a complete rewriting of Clause 3 Terms and definitions;
b) additional variant – ‘adhesive tape pull test’.

IEC 60749-44:2016 establishes a procedure for measuring the single event effects (SEEs) on high density integrated circuit semiconductor devices including data retention capability of semiconductor devices with memory when subjected to atmospheric neutron radiation produced by cosmic rays. The single event effects sensitivity is measured while the device is irradiated in a neutron beam of known flux. This test method can be applied to any type of integrated circuit.
NOTE 1 - Semiconductor devices under high voltage stress can be subject to single event effects including SEB, single event burnout and SEGR single event gate rupture, for this subject which is not covered in this document, please refer to IEC 62396-4.
NOTE 2 - In addition to the high energy neutrons some devices can have a soft error rate due to low energy (<1 eV) thermal neutrons. For this subject which is not covered in this document, please refer to IEC 62396-5.

IEC 60749-42:2014 provides a test method to evaluate the endurance of semiconductor devices used in high temperature and high humidity environments. This test method is used to evaluate the endurance against corrosion of the metallic interconnection of chips of semiconductor devices contained in plastic moulded and other types of packages. It is also used as a means of accelerating the leakage phenomena due to the moisture penetration through the passivation film and as a pre-conditioning for various kinds of tests.

IEC 62483:2013 describes the methodology applicable for environmental acceptance testing of tin-based surface finishes and mitigation practices for tin whiskers on semiconductor devices. This methodology may not be sufficient for applications with special requirements, (i.e. military, aerospace, etc.). Additional requirements may be specified in the appropriate requirements (procurement) documentation. This first edition is based on JEDEC documents JESD201A and JESD22-A121A and replaces IEC/PAS 62483, published in 2006. This first edition constitutes a technical revision. This edition includes the following significant technical changes with respect to the previous edition:
a) The content of IEC/PAS 62483 was added to the content of JESD201A as Annex A.
b) A methodology was introduced for environmental acceptance testing of tin-based surface finishes and mitigation practices for tin whiskers.
c) A Clause 6 was introduced detailing the reporting requirements of test results.

IEC 60749-26:2013 establishes the procedure for testing, evaluating, and classifying components and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a defined human body model (HBM) electrostatic discharge (ESD). The purpose (objective) of this standard is to establish a test method that will replicate HBM failures and provide reliable, repeatable HBM ESD test results from tester to tester, regardless of component type. Repeatable data will allow accurate classifications and comparisons of HBM ESD sensitivity levels. ESD testing of semiconductor devices is selected from this test method, the machine model (MM) test method (see IEC 60749-27) or other ESD test methods in the IEC 60749 series. The HBM and MM test methods produce similar but not identical results; unless otherwise specified, this test method is the one selected. This edition includes the following significant technical changes with respect to the previous edition:
a) descriptions of oscilloscope and current transducers have been refined and updated;
b) the HBM circuit schematic and description have been improved;
c) the description of stress test equipment qualification and verification has been completely re-written;
d) qualification and verification of test fixture boards has been revised;
e) a new section on the determination of ringing in the current waveform has been added;
f) some alternate pin combinations have been included;
g) allowance for non-supply pins to stress to a limited number of supply pin groups (associated non-supply pins) and allowance for non-supply to non-supply (i.e., I/O to I/O) stress to be limited to a finite number of 2 pin pairs (coupled non-supply pin pairs);
h) explicit allowance for HBM stress using 2 pin HBM testers for die only shorted supply groups.

Defines the services provided by a telecontrol specific application-service-element - the Telecontrol Application Service Element No. 1 (TASE.1) - for the exchange of process data in telecontrol systems.

This publication is of high relevance for Smart Grid.

IEC 60749-40:2011 is intended to evaluate and compare drop performance of a surface mount semiconductor device for handheld electronic product applications in an accelerated test environment, where excessive flexure of a circuit board causes product failure. The purpose is to standardize test methodology to provide a reproducible assessment of the drop test performance of a surface mounted semiconductor devices while duplicating the failure modes normally observed during product level test. This international standard uses a strain gauge to measure the strain and strain rate of a board in the vicinity of a component.

IEC 60749-7:2011 specifies the testing and measurement of water vapour and other gas content of the atmosphere inside a metal or ceramic hermetically sealed device. The test is used as a measure of the quality of the sealing process and to provide information about the long-term chemical stability of the atmosphere inside the package. It is applicable to semiconductor devices sealed in such a manner but generally only used for high reliability applications such as military or aerospace. This test is destructive. This second edition cancels and replaces the first edition published in 2002 and constitutes a technical revision. This second edition has been completely re-written so as to align it with the text of the latest versions of MIL-STD-750, method 1018 and MIL-STD-883, method 1018. The main change is the removal of the two alternative methods formerly designated method 2 and method 3.

IEC 60749-21:2011 establishes a standard procedure for determining the solderability of device package terminations that are intended to be joined to another surface using tin-lead (SnPb) or lead-free (Pb-free) solder for the attachment. This test method provides a procedure for 'dip and look' solderability testing of through hole, axial and surface mount devices (SMDs) as well as an optional procedure for a board mounting solderability test for SMDs for the purpose of allowing simulation of the soldering process to be used in the device application. The test method also provides optional conditions for ageing. This test is considered destructive unless otherwise detailed in the relevant specification.
NOTE 1 This test method is in general accord with IEC 60068, but due to specific requirements of semiconductors, the following text is applied.
NOTE 2 This test method does not assess the effect of thermal stresses which may occur during the soldering process. Reference should be made IEC 60749-15 or IEC 60749-20.
This standard cancels and replaces the first edition published in 2004 and constitutes a technical revision. The significant change is the inclusion of Pb (lead)-free backward compatibility.

IEC 60749-29:2011 covers the I-test and the overvoltage latch-up testing of integrated circuits. The purpose of this test is toestablish a method for determining integrated circuit (IC) latch-up characteristics and to define latch-up failure criteria. Latch-up characteristics are used in determining product reliability and minimizing "no trouble found" (NTF) and "electrical overstress" (EOS) failures due to latch-up. This second edition cancels and replaces the first edition published in 2003 and constitutes a technical revision. The significant changes with respect to the previous edition include:
- a number of minor technical changes;
- the addition of two new annexes covering the testing of special pins and temperature calculations.

This test is used to determine the effects of bias conditions and temperature on solid state devices over time. It simulates the device operating condition in an accelerated way, and is primarily used for device qualification and reliability monitoring.

Determines the integrity of materials and procedures used to attach semiconductor die to package headers or other substrates. Generally only applicable to cavity packages or as a process monitor.

Applicable to semiconductor devices (discrete devices and integrated circuits), this test determines whether the device ignites due to external heating. The test uses a needle flame, simulating the effect of small flames which may result from fault conditions within equipment containing the device. The contents of the corrigendum of August 2003 have been included in this copy.

IEC 60749-15:2010 describes a test used to determine whether encapsulated solid state devices used for through-hole mounting can withstand the effects of the temperature to which they are subjected during soldering of their leads by using wave soldering or a soldering iron. This second edition cancels and replaces the first edition published in 2003 and constitutes a technical revision. The significant changes with respect from the previous edition include:
- editorial change in the scope;
- addition of lead-free solder chemical composition specification.

IEC 60749-34:2010 describes a test method used to determine the resistance of a semiconductor device to thermal and mechanical stresses due to cycling the power dissipation of the internal semiconductor die and internal connectors. This happens when low-voltage operating biases for forward conduction (load currents) are periodically applied and removed, causing rapid changes of temperature. The power cycling test is intended to simulate typical applications in power electronics and is complementary to high temperature operating life (see IEC 60749-23). Exposure to this test may not induce the same failure mechanisms as exposure to air-to-air temperature cycling, or to rapid change of temperature using the two-fluid-baths method. This test causes wear-out and is considered destructive. This second edition cancels and replaces the first edition published in 2004 and constitutes a technical revision. The significant changes with respect from the previous edition include:
- the specification of tighter conditions for more accelerated power cycling in the wire bond fatigue mode;
- information that under harsh power cycling conditions high current densities in a thin die metalization might initiate electromigration effects close to wire bonds.

Describes two test methods, A and B, for assessing the electric strength of insulating liquids in a divergent field when subjected to standard lightning impulses. Method A is based on a step procedure intended to provide an estimate of impulse breakdown voltage under specific conditions. Method B is a statistical test designed to check a hypothesis about the impulse breakdown probability of an insulating liquid at a given voltage level.

Gives the sampling rate and source encoding for professional digital recording. Has the status of a technical report.

IEC 62615:2010 defines a method for pulse testing to evaluate the voltage current response of the component under test and to consider protection design parameters for electro-static discharge (ESD) human body model (HBM). This technique is known as transmission line pulse (TLP) testing. This document establishes a methodology for both testing and reporting information associated with transmission line pulse (TLP) testing. The scope and focus of this document pertains to TLP testing techniques of semiconductor components. This document should not become alternative method of HBM test standard such as IEC 60749-26. The purpose of the document is to establish guidelines of TLP methods that allow the extraction of HBM ESD parameters on semiconductor devices. This document provides the standard measurement and procedure for the correct extraction of HBM ESD parameters by using TLP.

IEC 60749-20-1:2009 applies to all non-hermetic SMD packages which are subjected to reflow solder processes and which are exposed to the ambient air. The purpose of this document is to provide SMD manufacturers and users with standardized methods for handling, packing, shipping, and use of moisture/reflow sensitive SMDs which have been classified to the levels defined in IEC 60749-20. These methods are provided to avoid damage from moisture absorption and exposure to solder reflow temperatures that can result in yield and reliability degradation. By using these procedures, safe and damage-free reflow can be achieved, with the dry packing process, providing a minimum shelf life capability in sealed dry-bags from the seal date.

IEC 60749-20:2008 provides a means of assessing the resistance to soldering heat of semiconductors packaged as plastic encapsulated surface mount devices (SMDs). This test is destructive. This second edition cancels and replaces the first edition published in 2002 and constitutes a technical revision. The main changes are as follows:
- to reconcile certain classifications of IEC 60749-20 and those of IPC/JEDEC J-STD-020C;
- reference IEC 60749-35 instead of Annex A of IEC 60749-20, Edition 1;
- update for lead-free solder;
- correct certain errors in the original Edition 1.

This part of IEC 60749 establishes a procedure for measuring the soft error susceptibility of semiconductor devices with memory when subjected to energetic particles such as alpha radiation. Two tests are described; an accelerated test using an alpha radiation source and an (unaccelerated) real-time system test where any errors are generated under conditions of naturally occurring radiation which can be alpha or other radiation such as neutron. To completely characterize the soft error capability of an integrated circuit with memory, the device must be tested for broad high energy spectrum and thermal neutrons using additional test methods. This test method may be applied to any type of integrated circuit with memory device.

Provides a test method that is intended to evaluate and compare drop performance of surface mount electronic components for handheld electronic product applications in an accelerated test environment, where excessive flexure of a circuit board causes product failure. The purpose is to standardize the test board and test methodology to provide a reproducible assessment of the drop test performance of surface-mounted components while producing the same failure modes normally observed during product level test.

Detailed the procedures for the measurement of the characteristic properties of moisture diffusivity and water solubility in organic materials used in the packaging of semiconductor components. These two material properties are important parameters for the effective reliability performance of plastic packaged semiconductors after exposure to moisture and being subjected to high-temperature solder reflow.

Defines the procedures for performing acoustic microscopy on plastic encapsulated electronic components. Provides a guide to the use of acoustic microscopy for detecting anomalies (delamination, cracks, mould-compound voids, etc.) reproducibly and non-destructively in plastic packages.