31.190 - Electronic component assemblies
ICS 31.190 Details
Electronic component assemblies
Elektronische Baugruppen
Assemblages de composants electroniques
Sestavljeni elektronski elementi
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IEC 60068‑2-88:2025 establishes test methods for the resistance of electronic and electromechanical components, unpopulated circuit boards and assemblies to liquid cleaning media and cleaning processes, which are agreed between user and supplier for applications, where cleaning is required. These tests are not applicable to components, unpopulated circuit boards and assemblies, which are not intended to be subjected to cleaning processes.
Tests XD1 and XD2 primarily are intended for qualification testing of components and unpopulated circuit boards suitable for cleaning processes, but can be adopted as well to testing of material compatibility and specific cleaning media used in manufacturing processes of components and unpopulated circuit boards.
Test XD3 is intended to determine the resistance of electronic assemblies suitable for cleaning processes to the various cleaning processes to which they are exposed during manufacturing, including the effects of assembly and soldering processes.
- Standard34 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60068-2-83:2025 is available as IEC 60068-2-83:2025 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.
IEC 60068-2-83:2025 provides methods for comparative investigation of the wettability of the metallic terminations or metallized terminations of SMDs with solder paste. Data obtained by these methods are not intended to be used as absolute quantitative data for pass/fail purposes.
NOTE Different solderability test methods for SMD are described in IEC 60068‑2‑58 and IEC 60068‑2‑69. IEC 60068‑2‑58 specifies visual evaluation using solder bath and reflow method, IEC 60068‑2‑69 specifies wetting balance evaluation using solder bath and solder globule method.
This edition includes the following significant technical change with respect to the previous edition:
a) revise Clause 5 to align with that in IEC 60068‑2‑20:2021.
- Standard40 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60068‑2-88:2025 establishes test methods for the resistance of electronic and electromechanical components, unpopulated circuit boards and assemblies to liquid cleaning media and cleaning processes, which are agreed between user and supplier for applications, where cleaning is required. These tests are not applicable to components, unpopulated circuit boards and assemblies, which are not intended to be subjected to cleaning processes. Tests XD1 and XD2 primarily are intended for qualification testing of components and unpopulated circuit boards suitable for cleaning processes, but can be adopted as well to testing of material compatibility and specific cleaning media used in manufacturing processes of components and unpopulated circuit boards. Test XD3 is intended to determine the resistance of electronic assemblies suitable for cleaning processes to the various cleaning processes to which they are exposed during manufacturing, including the effects of assembly and soldering processes.
- Standard34 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60068-2-83:2025 is available as IEC 60068-2-83:2025 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.IEC 60068-2-83:2025 provides methods for comparative investigation of the wettability of the metallic terminations or metallized terminations of SMDs with solder paste. Data obtained by these methods are not intended to be used as absolute quantitative data for pass/fail purposes. NOTE Different solderability test methods for SMD are described in IEC 60068‑2‑58 and IEC 60068‑2‑69. IEC 60068‑2‑58 specifies visual evaluation using solder bath and reflow method, IEC 60068‑2‑69 specifies wetting balance evaluation using solder bath and solder globule method. This edition includes the following significant technical change with respect to the previous edition: a) revise Clause 5 to align with that in IEC 60068‑2‑20:2021.
- Standard40 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60068-2-83:2025 is available as IEC 60068-2-83:2025 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.
IEC 60068-2-83:2025 provides methods for comparative investigation of the wettability of the metallic terminations or metallized terminations of SMDs with solder paste. Data obtained by these methods are not intended to be used as absolute quantitative data for pass/fail purposes.
NOTE Different solderability test methods for SMD are described in IEC 60068‑2‑58 and IEC 60068‑2‑69. IEC 60068‑2‑58 specifies visual evaluation using solder bath and reflow method, IEC 60068‑2‑69 specifies wetting balance evaluation using solder bath and solder globule method.
This edition includes the following significant technical change with respect to the previous edition:
a) revise Clause 5 to align with that in IEC 60068‑2‑20:2021.
- Standard124 pagesEnglish languagesale 15% off
IEC 62878-2-603:2025 specifies the electrical test method to detect electrical connectivity defects of the stacked electronic module caused by the stacking assembly process to stack some stackable electronic modules. This method is realized to make use of bidirectional serial communication bus interface applied to the stackable electronic modules which are assured as "known good module" (KGM).
- Standard16 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 62878-2-603:2025 specifies the electrical test method to detect electrical connectivity defects of the stacked electronic module caused by the stacking assembly process to stack some stackable electronic modules. This method is realized to make use of bidirectional serial communication bus interface applied to the stackable electronic modules which are assured as "known good module" (KGM).
- Standard16 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 61188-6-3:2024 specifies the requirements for lands and land pattern on circuit boards for the mounting of components with leads by soldering based on the solder joint requirements of IEC 61191-1 and IEC 61191-3.
This part of IEC 61188 specifies the requirements for soldering surfaces on circuit boards. This includes lands and land pattern for surface mounted components and also solderable hole configurations for through hole mounted components. These requirements are based on the solder joint requirements of IEC 61191-1, IEC 61191-2, IEC 61191-3 and IEC 61191-4.
This first edition partially cancels and replaces the IEC 61188-5 series of International Standards.
The significant technical changes with respect to the previous edition are listed in the Introduction and further detailed information and calculations can be found in Annex A.
- Standard34 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 62878-2-603:2025 specifies the electrical test method to detect electrical connectivity defects of the stacked electronic module caused by the stacking assembly process to stack some stackable electronic modules. This method is realized to make use of bidirectional serial communication bus interface applied to the stackable electronic modules which are assured as "known good module" (KGM).
- Standard25 pagesEnglish and French languagesale 15% off
IEC 60194-2:2025 covers terms and definitions related to circuit board and electronic assembly technologies as well as other electronic technologies.
The terms have been classified according to the decimal classification code (DCC) and this DCC number appears just below the defined term. The DCC numbering is fully explained in Annex A.
A list of terms in alphabetical order with code number is provided in Annex B.
This edition includes the following significant technical changes with respect to the previous edition:
a) exclusion of 116 terms transferred to IEV;
b) inclusion of 9 new terms related to printed electronics and packaging technology;
c) revision of definitions of 23 terms reflecting current technology;
d) three "printed wiring" terms were removed;
e) reintroduction of identification codes for terms.
- Standard45 pagesEnglish languagesale 15% off
IEC 61188-6-3:2024 specifies the requirements for lands and land pattern on circuit boards for the mounting of components with leads by soldering based on the solder joint requirements of IEC 61191-1 and IEC 61191-3. This part of IEC 61188 specifies the requirements for soldering surfaces on circuit boards. This includes lands and land pattern for surface mounted components and also solderable hole configurations for through hole mounted components. These requirements are based on the solder joint requirements of IEC 61191-1, IEC 61191-2, IEC 61191-3 and IEC 61191-4. This first edition partially cancels and replaces the IEC 61188-5 series of International Standards. The significant technical changes with respect to the previous edition are listed in the Introduction and further detailed information and calculations can be found in Annex A.
- Standard34 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 61188-6-3:2024 specifies the requirements for lands and land pattern on circuit boards for the mounting of components with leads by soldering based on the solder joint requirements of IEC 61191-1 and IEC 61191-3.
This part of IEC 61188 specifies the requirements for soldering surfaces on circuit boards. This includes lands and land pattern for surface mounted components and also solderable hole configurations for through hole mounted components. These requirements are based on the solder joint requirements of IEC 61191-1, IEC 61191-2, IEC 61191-3 and IEC 61191-4.
This first edition partially cancels and replaces the IEC 61188-5 series of International Standards.
The significant technical changes with respect to the previous edition are listed in the Introduction and further detailed information and calculations can be found in Annex A.
- Standard62 pagesEnglish and French languagesale 15% off
IEC TR 60068-3-15:2024 describes vacuum-assisted soldering considering the thermal profiling, soldering methods, suitability of the components and vacuum features of soldering systems. It is based on practical experiences from manufacturers, component, material, and soldering systems suppliers. It supports manufacturers by providing information about the functionality of vacuum and effect of vacuum on components performance.
- Technical report27 pagesEnglish languagesale 15% off
IEC TR 61760-5-1:2024 describes examples of methods using electrical strain gauges for determination of critical mechanical stresses in assembly processes. These stresses can damage chip type ceramic components, causing so called “bending cracks”. Area-array components are excluded from the scope of this document.
- Technical report24 pagesEnglish languagesale 15% off
IEC TS 62878-2-10:2024 provides a general specification for the design of cavity substrates.
- Technical specification9 pagesEnglish languagesale 15% off
IEC 63215-2:2023 applies to the die attach materials and joining system applied to discrete type power electronic devices.
This document specifies the temperature cycling test method which takes into account the actual usage conditions of discrete type power electronic devices to evaluate reliability of the die attach joint materials and joining system, and establishes a classification level for joining reliability (reliability performance index).
The test method specified in this document is not intended to evaluate power semiconductor devices themselves.
The test method specified in this document is not regarded as the one for use to guarantee the reliability of the power semiconductor device packages.
NOTE The test result obtained using this document will not be used as absolute quantitative data, but for intercomparison with the other die attach materials results using the same setup.
- Standard26 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 63215-2:2023 applies to the die attach materials and joining system applied to discrete type power electronic devices. This document specifies the temperature cycling test method which takes into account the actual usage conditions of discrete type power electronic devices to evaluate reliability of the die attach joint materials and joining system, and establishes a classification level for joining reliability (reliability performance index). The test method specified in this document is not intended to evaluate power semiconductor devices themselves. The test method specified in this document is not regarded as the one for use to guarantee the reliability of the power semiconductor device packages. NOTE The test result obtained using this document will not be used as absolute quantitative data, but for intercomparison with the other die attach materials results using the same setup.
- Standard26 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 63215-2:2023 applies to the die attach materials and joining system applied to discrete type power electronic devices.
This document specifies the temperature cycling test method which takes into account the actual usage conditions of discrete type power electronic devices to evaluate reliability of the die attach joint materials and joining system, and establishes a classification level for joining reliability (reliability performance index).
The test method specified in this document is not intended to evaluate power semiconductor devices themselves.
The test method specified in this document is not regarded as the one for use to guarantee the reliability of the power semiconductor device packages.
NOTE The test result obtained using this document will not be used as absolute quantitative data, but for intercomparison with the other die attach materials results using the same setup.
- Standard46 pagesEnglish and French languagesale 15% off
IEC TR 61191-9:2023, which is a Technical Report, applies to electronic and electromechanical automotive circuit board assemblies and describes current best practices for dealing with electrochemical reactions like migration or corrosion and ionic contamination on the surface of a circuit board as one failure mode under humidity load. This document deals with the evaluation of materials and manufacturing processes for the manufacturing of electronic assemblies with focus on their reliability under humidity loads. The electrical operation of a device in a humid environment can trigger electrochemical reactions that can lead to short circuits and malfunctions on the assembly. In this context, a large number of terms and methods are mentioned, such as CAF (conductive anodic filament), anodic migration phenomena, dendrite growth, cathodic migration, ROSE (resistivity of solvent extract), ionic contamination, SIR (surface insulation resistance), impedance spectroscopy, etc., which are used and interpreted differently. The aim of the document is to achieve a uniform use of language and to list the possibilities and limitations of common measurement methods. The focus of the document is on the error pattern of electrochemical migration on the surface of assemblies with cathodic formation of dendrites.
Evaluation of different test methods of control units under high humidity load are not part of this document.
- Technical report72 pagesEnglish languagesale 15% off
IEC 62878-1:2019(E) specifies the generic requirements and test methods for device-embedded substrates. The basic test methods for printed board substrate materials and substrates themselves are specified in IEC 61189-3. This part of IEC 62878 is applicable to device-embedded substrates fabricated by use of organic base material, which includes, for example, active or passive devices, discrete components formed in the fabrication process of electronic printed boards, and sheet-formed components. The IEC 62878 series applies neither to the re-distribution layer (RDL) nor to electronic modules defined in IEC 62421.
- Standard23 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 62878-2-5:2019 specifies requirements based on XML schema that represents a design data format for device embedded substrate, which is a board comprising embedded active and passive devices whose electrical connections are made by means of a via, electroplating, conductive paste or printing of conductive material. This data format is to be used for simulation (e.g. stress, thermal, EMC), tooling, manufacturing, assembly, and inspection requirements. Furthermore, the data format is used for transferring information among printed board designers, printed board simulation engineer, manufacturers, and assemblers. IEC 62878-2-5:2019 applies to substrates using organic material. It neither applies to the re-distribution layer (RDL) nor to the electronic modules defined as M-type business model in IEC 62421.
- Standard55 pagesEnglish languagesale 10% offe-Library read for1 day
IEC TR 60068-3-12:2022(E) which is a Technical Report, describes the creation of temperature-time profiles (in specific envelope profiles) for reflow soldering of electronic assemblies, considering tolerances resulting from the accuracy of the measuring equipment, preparation method and specifications of the manufacturers of components, circuit boards, solder paste, etc.).
This edition includes the following significant technical changes with respect to the previous edition: a) Extended purpose Guidance is added on how to create a reflow profile considering the tolerances resulting from the accuracy of the measuring equipment, preparation method and specifications of the component manufacturers (components, PCB, solder paste, etc.). b) Distinction from existing standards The envelope profile given in this document does not represent a temperature-time profile for the qualification of materials but defines the reflow process limits for the soldering of electronic assemblies.
The schematic temperature-time-limit curves of the envelope profile are derived from generally valid findings (literature data). Additionally, tolerance considerations are given for all envelope points of the envelope profile.
In contrast to IEC TR 60068-3-12:2014, the creation of the envelope profile is not primarily linked to a concrete example. c) Subclause 8.2 presents an approach for establishing a possible temperature profile for a lead-free reflow soldering process using SnAgCu solder paste that is taken from IEC TR 60068-3-12:2014. d) Synergies with existing standards Limit values and tolerances from standards and guidelines for the qualification of materials are included in this document and are listed as examples in the references.
- Technical report34 pagesEnglish languagesale 15% off
This part of IEC 61189 establishes a method suitable for testing the softness of FCCL (Flexible Copper Clad Laminate) products and related materials. This method determines the resilience under specified conditions. The test is performed on the sample as manufactured and without conditioning. The test does not apply to the resilience force lower than 10 mN.
- Standard18 pagesEnglish languagesale 10% offe-Library read for1 day
- Amendment9 pagesEnglish languagesale 10% offe-Library read for1 day
IEC PAS 61191-10:2022(E) provides guidelines which deal with the requirements for the protective coating,
its properties, as well as the application of liquid coating materials for electronic assemblies. These guidelines help control in practice the application of protective coatings from the layout to the functional test of the assembly after coating.
- Technical specification209 pagesEnglish languagesale 15% off
IEC 60068-2-82:2019 specifies tests for the whiskering propensity of surface finishes of electric or electronic components and mechanical parts such as punched/stamped parts (for example, jumpers, electrostatic discharge protection shields, mechanical fixations, press‑fit pins and other mechanical parts used in electronic assemblies) representing the finished stage, with tin or tin-alloy finish. Changes of the physical dimensions of mould compounds, plastics and the like during the required test flow are not considered or assessed. The test methods have been developed by using a knowledge-based approach. This edition includes the following significant technical changes with respect to the previous edition: – extension of the scope of the test standard from electronic to electromechanic components and press-fit pins, which are used for assembly and interconnect technology; – significant reduction of the testing effort by a knowledge-based selection of test conditions i.e. tests not relevant for a given materials system can be omitted (see Annex D); – harmonization with JESD 201A by omission of severities M, N for temperature cycling tests; – highly reduced test duration (1 000 h instead of 4 000 h) for damp-heat test by introducing test condition at elevated humidity of 85 % R.H. and a temperature of 85 °C providing increased severity.
- Standard35 pagesEnglish languagesale 10% offe-Library read for1 day
IEC TR 61760-3-1:2022(E) supplements IEC 61760-3 to describe examples of solder paste supply methods, the relationship between the terminal position tolerance and the through hole diameter, and provides guidelines for the design of printed circuit boards with solder paste surface printing method, including specific examples.
- Technical report26 pagesEnglish languagesale 15% off
IEC 61760-1:2020 defines requirements for component specifications of electronic components that are intended for usage in surface mounting technology. To this end, it specifies a reference set of process conditions and related test conditions to be considered when compiling component specifications.
The objective of this document is to ensure that a wide variety of SMDs can be subjected to the same placement, mounting and subsequent processes (e.g. cleaning, inspection) during assembly. This document defines tests and requirements that need to be part of any SMD component's general, sectional or detail specification. In addition, this document provides component users and manufacturers with a reference set of typical process conditions used in surface mounting technology.
Some of the requirements for component specifications in this document are also applicable to components with leads intended for mounting on a circuit board. Cases for which this is appropriate are indicated in the relevant subclauses.
This edition includes the following significant technical changes with respect to the previous edition:
a) inclusion of additional mounting methods: conductive glue bonding, sintering and solderless interconnection.
- Standard47 pagesEnglish languagesale 10% offe-Library read for1 day
IEC TR 62878-2-9:2022(E) comprises the long-term discussion among Jisso International Council (JIC) members during 1999 and 2005, when the interim agreement among all JIC members about the “concept of Jisso” as well as the “Jisso product level” for the common understanding on IEC TC 91 (electronic assembly technology) activities was reached. Further discussion on “Jisso Product Level” could be needed among the current JIC members to finalize it in the near future based on this technical report.
- Technical report15 pagesEnglish languagesale 15% off
IEC 61189-2-807:2021 specifies a test method to determine the decomposition temperature (Td) of base laminate materials using thermogravimetric analysis (TGA).
- Standard11 pagesEnglish languagesale 10% offe-Library read for1 day
NEW!IEC 61191-1:2018 is available as IEC 61191-1:2018 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.IEC 61191-1:2018 prescribes requirements for materials, methods and verification criteria for producing quality soldered interconnections and assemblies using surface mount and related assembly technologies. This part of IEC 61191 also includes recommendations for good manufacturing processes. This edition includes the following significant technical changes with respect to the previous edition: - the requirements have been updated to be compliant with the acceptance criteria in IPC‑A-610F; - the term "assembly drawing" has been changed to "assembly documentation" throughout; - references to IEC standards have been corrected; - Clause 9 was completely rewritten; - Annex B was removed because there are already procedures for circuit board assemblies.
- Standard48 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60068-2-21:2021 is applicable to all electrical and electronic components whose terminations or integral mounting devices are liable to be submitted to stresses during normal assembly or handling operations and is also applicable to surface mount devices (SMDs).
This seventh edition cancels and replaces the sixth edition, published in 2006, and IEC 60068‑2‑77:1999. This edition constitutes a technical revision. This edition includes the following significant technical changes with respect to the previous edition:
- integration of parts of IEC 60068-2-77 (see Annex X); IEC 60068-2-77 is withdrawn with the publication of this document;
- Annex X is added to show the correlation of the clauses and subclauses in this edition of IEC 60068-2-21 with the clauses in IEC 60068-2-21:2006 and IEC 60068-2-77:1999.
- Standard46 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60068-2-21:2021 is applicable to all electrical and electronic components whose terminations or integral mounting devices are liable to be submitted to stresses during normal assembly or handling operations and is also applicable to surface mount devices (SMDs). This seventh edition cancels and replaces the sixth edition, published in 2006, and IEC 60068‑2‑77:1999. This edition constitutes a technical revision. This edition includes the following significant technical changes with respect to the previous edition:
integration of parts of IEC 60068-2-77 (see Annex X); IEC 60068-2-77 is withdrawn with the publication of this document;
Annex X is added to show the correlation of the clauses and subclauses in this edition of IEC 60068-2-21 with the clauses in IEC 60068-2-21:2006 and IEC 60068-2-77:1999.
- Standard46 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 62878-2-602:2021 specifies the requirements and evaluation methods of electrical connectivity. It is applicable to stacked electronic modules.
- Standard15 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 62878-2-602:2021 specifies the requirements and evaluation methods of electrical connectivity. It is applicable to stacked electronic modules.
- Standard15 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60068-2-21:2021 is applicable to all electrical and electronic components whose terminations or integral mounting devices are liable to be submitted to stresses during normal assembly or handling operations and is also applicable to surface mount devices (SMDs).
This seventh edition cancels and replaces the sixth edition, published in 2006, and IEC 60068‑2‑77:1999. This edition constitutes a technical revision. This edition includes the following significant technical changes with respect to the previous edition:
integration of parts of IEC 60068-2-77 (see Annex X); IEC 60068-2-77 is withdrawn with the publication of this document;
Annex X is added to show the correlation of the clauses and subclauses in this edition of IEC 60068-2-21 with the clauses in IEC 60068-2-21:2006 and IEC 60068-2-77:1999.
- Standard86 pagesEnglish and French languagesale 15% off
IEC TR 62878-2-8:2021(E) describes a warpage control of active device embedded substrate along with parameters for determining warpage, which are useful during package assembly. Warpage results are explained using warpage driving force, resistance and neutral axis, for typical die embedded substrate, where the discrete active dies are placed in the core of substrate and interconnected to the substrate by direct Cu bonding. The same principles are applicable in other device embedded substrates. Even though the detailed structure of other device embedded substrates might be different, the origin and determination of the parameters of warpage are the same and thus the purpose of this report is to help engineers improve the warpage behaviours of their products by applying this principle.
- Technical report14 pagesEnglish languagesale 15% off
IEC 62878-2-602:2021 specifies the requirements and evaluation methods of electrical connectivity. It is applicable to stacked electronic modules.
- Standard24 pagesEnglish and French languagesale 15% off
IEC 61189-5-301:2021 specifies methods for testing the characteristics of soldering paste using fine solder particles (hereinafter referred to as solder paste).
This document is applicable to the solder paste using fine solder particle such as type 6, type 7 specified in IEC 61190-1-2 or finer particle sizes.
This type of solder paste is used for connecting wiring and components in high-density printed circuit boards which are used in electronic or communication equipment and such, equipping fine wiring (e.g., minimum conductor widths and minimum conductor gaps of 60 µm or less).
Test methods for the characteristics of solder paste in this document are considering the effect of surface activation force due to the fine sized solder particles which could affect the test result by existing test methods.
- Standard35 pagesEnglish languagesale 10% offe-Library read for1 day
- Amendment9 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 62878-2-5:2019 specifies requirements based on XML schema that represents a design data format for device embedded substrate, which is a board comprising embedded active and passive devices whose electrical connections are made by means of a via, electroplating, conductive paste or printing of conductive material.
This data format is to be used for simulation (e.g. stress, thermal, EMC), tooling, manufacturing, assembly, and inspection requirements. Furthermore, the data format is used for transferring information among printed board designers, printed board simulation engineer, manufacturers, and assemblers.
IEC 62878-2-5:2019 applies to substrates using organic material. It neither applies to the re-distribution layer (RDL) nor to the electronic modules defined as M-type business model in IEC 62421.
- Standard55 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 61189-5-501:2021 is used to quantify the deleterious effects of flux residues on surface insulation resistance (SIR) in the presence of moisture.
- Standard23 pagesEnglish languagesale 10% offe-Library read for1 day
This part of IEC 61760 gives a reference set of requirements, process conditions and related test conditions to be used when compiling specifications of electronic components that are intended for usage in through-hole reflow soldering technology.
The object of this document is to ensure that components with leads intended for through-hole reflow and surface mounting components can be subjected to the same placement and mounting processes. Hereto, this document defines test and requirements that need to be part of any component generic, sectional or detail specification, when through-hole reflow soldering is intended.
Furthermore, this document provides component users and manufacturers with a reference set of typical process conditions used in through-hole reflow soldering technology.
- Standard32 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 62878-1:2019(E) specifies the generic requirements and test methods for device-embedded substrates. The basic test methods for printed board substrate materials and substrates themselves are specified in IEC 61189-3.
This part of IEC 62878 is applicable to device-embedded substrates fabricated by use of organic base material, which includes, for example, active or passive devices, discrete components formed in the fabrication process of electronic printed boards, and sheet-formed components.
The IEC 62878 series applies neither to the re-distribution layer (RDL) nor to electronic modules defined in IEC 62421.
- Standard23 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 61189-5-502:2021 is used for evaluating the changes to the surface insulation resistance of a pre-selected material set on a representative test coupon and quantifies the deleterious effects of improperly used materials and processes that can lead to decreases in electrical resistance.
- Standard25 pagesEnglish languagesale 10% offe-Library read for1 day
- Amendment7 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 61189-5-601:2021 specifies the reflow soldering ability test method for components mounted on organic rigid printed boards, the reflow heat resistance test method for organic rigid printed boards, and the reflow soldering ability test method for the lands of organic rigid printed boards in applications using solder alloys, which are eutectic or near-eutectic tin-lead (Pb), or lead-free alloys.
The printed boards materials for this organic rigid printed boards are epoxide woven E-glass laminated sheets that are specified in IEC 61249-2 (all parts).
The objective of this document is to ensure the soldering ability of the solder joint and of the lands of the printed boards. In addition, test methods are provided to ensure that the printed boards can resist the heat load to which they are exposed during soldering.
- Standard44 pagesEnglish languagesale 10% offe-Library read for1 day
- Amendment9 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 61188-6-1:2021 specifies the requirements for soldering surfaces on circuit boards. This includes lands and land pattern for surface mounted components and also solderable hole configurations for through-hole mounted components. These requirements are based on the solder joint requirements of the IEC 61191-1, IEC 61191-2, IEC 61191-3 and IEC 61191-4.
- Standard33 pagesEnglish languagesale 10% offe-Library read for1 day
IEC TR 61191-8:2021(E) gives guidelines for dealing with voiding in surface-mount solder joints of printed board assemblies for use in automotive electronics. This technical report focuses exclusively on voids in solder joints connecting packaged electronic or electromechanical components with printed boards (PBs). Voids in other solder joints (e.g. in a joint between a silicon die and a substrate within an electronic component, solder joints of through-hole components, etc.) are not considered. The technical background for the occurrence of voids in solder joints, the potential impact of voiding on printed board assembly reliability and functionality, the investigation of voiding levels in sample- and series-production by use of X‑ray inspection as well as typical voiding levels in different types of solder joints are discussed. Recommendations for the control of voiding in series production are also given. Annex A collects typical voiding levels of components and recommendations for acceptability.
- Technical report34 pagesEnglish languagesale 15% off