SIST EN IEC 61188-6-3:2025

SLOVENSKI STANDARD
01-april-2025
Plošče tiskanih vezij in sestavi plošč tiskanih vezij - Zasnova in uporaba - 6-3. del:
Razmestitev priključkov - Opis razmestitve priključkov skozi luknje komponent
Circuit boards and circuit board assemblies - Design and use - Part 6-3: Land pattern
design - Description of land pattern for through hole components (THT)
Leiterplatten und Flachbaugruppen – Konstruktion und Anwendung – Teil 6-3:
Anschlussflächengestaltung – Beschreibung von Anschlussflächen für Komponenten der
Steckmontage (THT)
Cartes imprimées et cartes imprimées équipées - Conception et utilisation - Partie 6-3:
Conception de la zone de report - Description de la zone de report pour les composants
à trous traversants (THT)
Ta slovenski standard je istoveten z: EN IEC 61188-6-3:2025
ICS:
31.180 Tiskana vezja (TIV) in tiskane Printed circuits and boards
plošče
31.190 Sestavljeni elektronski Electronic component
elementi assemblies
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

EUROPEAN STANDARD EN IEC 61188-6-3

NORME EUROPÉENNE
EUROPÄISCHE NORM January 2025
ICS 31.180; 31.190 Supersedes EN 61188-5-2:2003 (partially);
EN 61188-5-3:2007 (partially);
EN 61188-5-4:2007 (partially);
EN 61188-5-5:2007 (partially);
EN 61188-5-6:2003 (partially);
EN 61188-5-8:2008 (partially)
English Version
Circuit boards and circuit board assemblies - Design and use -
Part 6-3: Land pattern design - Description of land pattern for
through hole components (THT)
(IEC 61188-6-3:2024)
Cartes imprimées et cartes imprimées équipées - Leiterplatten und Flachbaugruppen - Konstruktion und
Conception et utilisation - Partie 6-3: Conception de la zone Anwendung - Teil 6-3: Anschlussflächengestaltung -
de report - Description de la zone de report pour les Beschreibung von Anschlussflächen für Komponenten der
composants à trous traversants (THT) Steckmontage (THT)
(IEC 61188-6-3:2024) (IEC 61188-6-3:2024)
This European Standard was approved by CENELEC on 2025-01-13. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the
Netherlands, Norway, Poland, Portugal, Republic of North Macedonia, Romania, Serbia, Slovakia, Slovenia, Spain, Sweden, Switzerland,
Türkiye and the United Kingdom.

European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Rue de la Science 23, B-1040 Brussels
© 2025 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
Ref. No. EN IEC 61188-6-3:2025 E

European foreword
The text of document 91/1982/FDIS, future edition 1 of IEC 61188-6-3, prepared by TC 91 "Electronics
assembly technology" was submitted to the IEC-CENELEC parallel vote and approved by CENELEC
as EN IEC 61188-6-3:2025.
The following dates are fixed:
• latest date by which the document has to be implemented at national (dop) 2026-01-31
level by publication of an identical national standard or by endorsement
• latest date by which the national standards conflicting with the (dow) 2028-01-31
document have to be withdrawn
This document partially supersedes EN 61188-5-2:2003, EN 61188-5-3:2007, EN 61188-5-4:2007, EN
61188-5-5:2007, EN 61188-5-6:2003 and EN 61188-5-8:2008 and all of their amendments and
corrigenda (if any).
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC shall not be held responsible for identifying any or all such patent rights.
Any feedback and questions on this document should be directed to the users’ national committee. A
complete listing of these bodies can be found on the CENELEC website.
Endorsement notice
The text of the International Standard IEC 61188-6-3:2024 was approved by CENELEC as a
European Standard without any modification.
In the official version, for Bibliography, the following notes have to be added for the standard indicated:
IEC 61188-6-2 NOTE Approved as EN IEC 61188-6-2
IEC 61191-1 NOTE Approved as EN IEC 61191-1
IEC 61191-2 NOTE Approved as EN 61191-2
IEC 61191-3 NOTE Approved as EN 61191-3
IEC 61191-4 NOTE Approved as EN 61191-4
Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any amendments)
applies.
NOTE 1  Where an International Publication has been modified by common modifications, indicated by (mod),
the relevant EN/HD applies.
NOTE 2  Up-to-date information on the latest versions of the European Standards listed in this annex is available
here: www.cencenelec.eu.
Publication Year Title EN/HD Year
IEC 60194-2 - Printed boards design, manufacture and - -
assembly - Vocabulary - Part 2: Common
usage in electronic technologies as well as
printed board and electronic assembly
technologies
IEC 60352-5 2020 Solderless connections - Part 5: Press-in EN IEC 60352-5 2020
connections - General requirements, test
methods and practical guidance

IEC 61188-6-3 ®
Edition 1.0 2024-12
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Circuit boards and circuit board assemblies – Design and use –

Part 6-3: Land pattern design – Description of land pattern for through hole

components (THT)
Cartes imprimées et cartes imprimées équipées – Conception et utilisation –

Partie 6-3: Conception de la zone de report – Description de la zone de report

pour les composants à trous traversants (THT)

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.180, 31.190 ISBN 978-2-8327-0069-3

– 2 – IEC 61188-6-3:2024 © IEC 2024
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 8
2 Normative references . 8
3 Terms and definitions . 8
4 Description of a through hole component . 9
4.1 Component body . 9
4.2 Component leads . 9
5 Padstack . 10
5.1 Description . 10
5.2 Pad types . 10
5.2.1 General . 10
5.2.2 General . 10
5.2.3 Solder mask pads . 10
5.2.4 Outer layer pads . 11
5.2.5 Thermal pads . 11
5.2.6 Anti-pads . 11
5.3 Pad shapes . 11
5.4 Holes – Considerations for plated-through hole dimensioning . 11
5.5 Annular ring . 12
6 Requirements on lands for solder joints . 12
6.1 General . 12
6.2 Land/Pad dimensioning for leaded terminals . 14
6.3 Land shape for typical terminal shapes . 14
Annex A (informative) Determination, assessment and calculation of land pattern . 15
A.1 Consideration of creating holes . 15
A.1.1 General . 15
A.1.2 Punched . 15
A.1.3 Drilled . 16
A.1.4 Milled . 16
A.1.5 Laser drilled. 16
A.1.6 preformed / printed . 17
A.2 Determination of THT component assembly . 17
A.2.1 General . 17
A.2.2 Manual assembly . 17
A.2.3 Automated assembly . 18
A.2.4 Press fit component assembly . 18
A.3 Determination of the soldering process . 18
A.3.1 General . 18
A.3.2 Manual soldering . 18
A.3.3 Reflow soldering . 18
A.3.4 Wave soldering . 18
A.3.5 Other soldering processes . 18
A.4 Process flow to determine THT land pattern values . 19
A.4.1 Purpose . 19
A.4.2 Hole creation process . 20

IEC 61188-6-3:2024 © IEC 2024 – 3 –
A.4.3 Drill tolerance . 21
A.4.4 Solder gap . 21
A.4.5 Copper foil . 23
A.4.6 Layer positioning . 23
A.4.7 Circuit board stack-up . 24
A.4.8 Land size (pad-size) . 24
A.4.9 Examples to be enclosed . 25
Bibliography . 31

Figure 1 – Leaded component . 9
Figure 2 – Round lead . 9
Figure 3 – Square lead . 9
Figure 4 – Rectangle lead . 9
Figure 5 – Padstack . 10
Figure 6 – Terminal diameter, annular ring . 13
Figure 7 – Basic design flow diagram for land pattern for THT . 14
Figure A.1 – Circuit board manufacturing and assembly . 15
Figure A.2 – Figure oblong pin . 16
Figure A.3 – Protrusion of component terminal . 17
Figure A.4 – Process flow of determining a land pattern . 19
Figure A.5 – Proportional annular ring of a TH Terminal . 20
Figure A.6 – Determination of gap ratio proportional to substrate thickness . 22
Figure A.7 – Overview on the options of THT-calculation . 25

Table 1 – Layer function and pad types. 10

– 4 – IEC 61188-6-3:2024 © IEC 2024
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
CIRCUIT BOARDS AND CIRCUIT BOARD ASSEMBLIES –
DESIGN AND USE –
Part 6-3: Land pattern design –
Description of land pattern for through hole components (THT)

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international
co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and
in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports,
Publicly Available Specifications (PAS) and Guides (hereafter referred to as "IEC Publication(s)"). Their
preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with
may participate in this preparatory work. International, governmental and non-governmental organizations liaising
with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for
Standardization (ISO) in accordance with conditions determined by agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence between
any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) IEC draws attention to the possibility that the implementation of this document may involve the use of (a)
patent(s). IEC takes no position concerning the evidence, validity or applicability of any claimed patent rights in
respect thereof. As of the date of publication of this document, IEC had not received notice of (a) patent(s), which
may be required to implement this document. However, implementers are cautioned that this may not represent
the latest information, which may be obtained from the patent database available at https://patents.iec.ch. IEC
shall not be held responsible for identifying any or all such patent rights.
IEC 61188-6-3 has been prepared by IEC technical committee 91: Electronics assembly
technology. It is an International Standard.
This first edition partially cancels and replaces the IEC 61188-5 series of International
Standards.
The significant technical changes with respect to the previous edition are listed in the
Introduction and further detailed information and calculations can be found in Annex A.

IEC 61188-6-3:2024 © IEC 2024 – 5 –
The text of this International Standard is based on the following documents:
Draft Report on voting
91/1982/FDIS 91/1997/RVD
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available
at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are
described in greater detail at www.iec.ch/publications.
A list of all parts in the IEC 61188 series, published under the general title Circuit boards and
circuit board assemblies – Design and use, can be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under webstore.iec.ch in the data related to the
specific document. At this date, the document will be
• reconfirmed,
• withdrawn, or
• revised.
IMPORTANT – The "colour inside" logo on the cover page of this document indicates
that it contains colours which are considered to be useful for the correct understanding
of its contents. Users should therefore print this document using a colour printer.

– 6 – IEC 61188-6-3:2024 © IEC 2024
INTRODUCTION
The new series IEC 61188-6-xx replaces the below listed documents:
IEC 61188-5-1:2002, Printed boards and printed board assemblies – Design and use – Part 5-1:
Attachment (land/joint) considerations – Generic requirements
IEC 61188-5-2:2003, Printed boards and printed board assemblies – Design and use – Part 5-2:
Attachment (land/joint) considerations – Discrete components
IEC 61188-5-3:2007, Printed boards and printed board assemblies – Design and use – Part 5-3:
Attachment (land/joint) considerations – Components with gull-wing leads on two sides
IEC 61188-5-4:2007, Printed boards and printed board assemblies – Design and use – Part 5-4:
Attachment (land/joint) considerations – Components with J leads on two sides
IEC 61188-5-5:2007, Printed boards and printed board assemblies – Design and use – Part 5-5:
Attachment (land/joint) considerations – Components with gull-wing leads on four sides
IEC 61188-5-6:2003, Printed boards and printed board assemblies – Design and use – Part 5-6:
Attachment (land/joint) considerations – Chip carriers with J-leads on four sides
IEC 61188-5-8:2007, Printed boards and printed board assemblies – Design and use – Part 5-8:
Attachment (land/joint) considerations – Area array components (BGA, FBGA, CGA, LGA)
The content of the above documents is based on IPC-SM-782 Rev. A with Amendments 1 and
2, which was replaced in 2002 by IPC-7351. The component spectrum and pitch levels have
dramatically changed since publication of the 61188-5-xx series and its dimensioning concept
no longer fulfils state of the art mounting and soldering requirements.
This document provides guidelines and focus on land pattern for through hole terminals (THT).
Within the previous standards, primarily the pin diameter of the component and the assembly
tolerances were considered.
The new approach is that a sufficiently available (proportional) land pattern is related to:
• size and shape of the component terminal
• the requirements of the assembly process and its used tools
• technology, structure, thickness and manufacturing process of the circuit board
in order to achieve the best possible solder joint due to manufacturability, the assembly result
and the reliability of an assembled circuit board.
The variety and the possibility of building printed circuit boards has grown considerably over
the years. The technologies can become very complex. The proportion of copper in the circuit
board is determined by the number of layers or copper thickness per layer. This could lead to
higher thermal capacity of the circuit board.
The general use of soldered THT components has declined dramatically. The requirements for
current carrying capacity (e.g. wire thickness of inductors) have increased for the through-hole
components used. At the same time, the use of wave soldering has declined in favour of
selective wave soldering or other technologies.

IEC 61188-6-3:2024 © IEC 2024 – 7 –
A balance between heat source (soldering process) and heat sink (component or component
pin and circuit board) must be found for required assembly results. The landing surface must
be defined according to these requirements.
Detailed information and calculations can be found in Annex A.

– 8 – IEC 61188-6-3:2024 © IEC 2024
CIRCUIT BOARDS AND CIRCUIT BOARD ASSEMBLIES –
DESIGN AND USE –
Part 6-3: Land pattern design –
Description of land pattern for through hole components (THT)

1 Scope
This part of IEC 61188 specifies the requirements for lands and land pattern on circuit boards
for the mounting of components with leads by soldering based on the solder joint requirements
of IEC 61191-1 and IEC 61191-3.
This part of IEC 61188 specifies the requirements for soldering surfaces on circuit boards. This
includes lands and land pattern for surface mounted components and also solderable hole
configurations for through hole mounted components. These requirements are based on the
solder joint requirements of IEC 61191-1, IEC 61191-2, IEC 61191-3 and IEC 61191-4.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies.
For undated references, the latest edition of the referenced document (including any
amendments) applies.
IEC 60194-2, Printed boards design, manufacture and assembly – Vocabulary – Part 2:
Common usage in electronic technologies as well as printed board and electronic assembly
technologies
IEC 60352-5:2020, Solderless connections – Part 5: Press-in connections – General
requirements, test methods and practical guidance
3 Terms and definitions
For the purposes of this document, the terms and definitions given in IEC 60194-2 and the
following apply.
ISO and IEC maintain terminology databases for use in standardization at the following
addresses:
• IEC Electropedia: available at https://www.electropedia.org/
• ISO Online browsing platform: available at https://www.iso.org/obp
3.1
annular ring
amount of land that remains after a hole is drilled in the defined Padstack
3.2
finished hole size (FSH)
diameter after all metallization processes (galvanic processing) and additional surface finishing
processes (final finish) have been completed

IEC 61188-6-3:2024 © IEC 2024 – 9 –
3.3
solder source side
side which is in contact with solder material (e.g. soldering wave, solder tip), usually the
opposite side of the assembled THT component
3.4
solder target side
side where the component is usually placed
Note 1 to entry: The solder material will fill the THT from the opposite side (solder source side).
4 Description of a through hole component
4.1 Component body
Leaded components consist of a so-called body with electrical functional elements and leads
which enable the connection to the circuitry of the circuit board by soldering (see Figure 1).

Figure 1 – Leaded component
4.2 Component leads
Leads of components for through hole mounting usually have a round, square or rectangular
profile. For the Padstack design the maximum diameter of the lead is the determining parameter.
The diameter of the through hole depends on the shape of the lead (for typical variations of
leads see Figure 2, Figure 3 and Figure 4).

Figure 2 – Round lead Figure 3 – Square lead

Figure 4 – Rectangle lead
– 10 – IEC 61188-6-3:2024 © IEC 2024
5 Padstack
5.1 Description
A Padstack is the definition of the size and shape of the pads on each of the layers of a circuit
board plus the definition of the hole size and type. Form and size of the pad depends on the
lead form and size and the component body.
5.2 Pad types
5.2.1 General
There are specific functions using different shapes on different layer. Within the Library, a
Padstack shall be described in general with all optional functions.
5.2.2 General
Depending on the layer function in the circuit board layer stack the pad function also will be
different. Table 1 and Figure 5 give an overview of the relation between layer functionality and
associated pad type.
Table 1 – Layer function and pad types
Layer function Pad type display
Solder mask Top and bottom solder mask negative data
Outer layer Top and bottom pad (Land) positive data
Inner signal layer Inner layer pad positive data
Inner power layer Plane thermal or plane anti-pad negative data

Figure 5 – Padstack
5.2.3 Solder mask pads
The solder mask pads define the metallic surface of the solder joint. Within the CAD tool the
solder mask is displayed as inverse.

IEC 61188-6-3:2024 © IEC 2024 – 11 –
5.2.4 Outer layer pads
Outer layer pads describe the copper area which fixes the soldered device with the outer layer.
Sometimes it can be helpful to distinguish between the component and the solder side.
5.2.5 Thermal pads
The feature of a thermal pad is used to prohibit heat dissipation during the soldering process,
to get a reliable solder joint without degrading the circuit board base material.
5.2.6 Anti-pads
The so-called anti-pads are used to ensure insulation between the inner layer copper pads and
the copper area of power planes. Usually the minimum size of the anti-pad is the minimum
isolation distance of copper elements with different nets and the size of the inner layer pad.
5.3 Pad shapes
The basic elements of the Padstacks are polygons on each layer which represent the copper
structures of the circuit board. These polygons can be circular, square or rectangular with
rounded or chamfered corners or even variations of this shapes.
Sometimes a special pad shape such as a square pad on the component layer of the circuit
board is used as pin 1 indicator.
5.4 Holes – Considerations for plated-through hole dimensioning
The used assembly technique will influence the hole diameter, additionally the number of pins
per device and their alignment. Different assembly techniques shall have different hole
calculations:
• The way of creating the hole (drilling, milling, punching, additive manufacturing, others)
• Insertion during assembly process (manual or automatic)
• Soldering process (manual, automatic, wave soldering, Through-Hole Reflow, others)
• Press fit terminals (Press in)
For the tolerance analysis, the dimensions considered for the lead to hole relationship come
with an assumption that the end product hole diameter is a plated-through hole. Thus, the drilled
hole diameter is somewhat larger in order to fulfil the requirements for the plating thickness of
the hole wall.
Regarding multilayer internal Padstack requirements, the sum of the drillbit diameter and the
minimal necessary annular ring determines the pad size and thus the relationship between the
land and lead diameter have been compensated by adding 0,1 mm to the hole clearance
requirement in order to accommodate the plating of the through-hole.
The land size (land shape) therefore considers all the features that make up the land to hole
relationship. Usually the through-hole land requirements are based on multilayer technology. If
a single side circuit board is used, the hole size must be a little bigger. However, since the
requirements for attachment require a lead clinch, the concepts used in this document can work
for both plated and non-plated hole characteristics.
In the event that a non-plated hole is used to attach a component lead, which cannot be bent,
the clearance between the lead and the hole is critical in order to reduce the amount of excess
room for the solder attachment. In this instance the hole to lead relationship is reduced to a
minimum clearance of 0,015 mm between the hole diameter and the maximum lead diameter.
The land pattern concepts provided in this document shall have the hole size reduced, however
it is recommended that the original land size be maintained in order to provide for a reliable
solder joint formation.
– 12 – IEC 61188-6-3:2024 © IEC 2024
Within the solderless connection of Press-in terminals, the diameter of the drilled hole is defined
in the manufacturer’s datasheet or applicable standards (IEC, IPC).
The land pattern of THT devices used on very thin rigid substrates, foil, flexible, or stretchable
materials will have a different shape compared to typical rigid Substrates. Some devices use
solderable mechanical snap-in pins e.g. to adopt the connector-Plug-in forces. For those holes
the finished hole size diameter is usually described in the specification of the device. If the
through-hole has additional functions, which are not described within this document, the land
pattern design has to be aligned between supplier, designer (librarian), circuit board
manufacturer and electronic manufacturing service.
5.5 Annular ring
An annular ring is defined as the amount of land that remains after a hole is drilled through it.
Depending on the size of the annular ring a more or less robust solder joint will be formed.
Therefore it may be a good choice to work with a proportional concept also for the relation
between lead diameter and annular ring.
The size of the annular ring of press-in connections shall meet the requirements of the
manufacturer’s database and IEC 60352-5.
6 Requirements on lands for solder joints
6.1 General
The calculation of a land pattern is based on the component terminal diameter (see Figure 6).
Figure 7 shows the basic design flow diagram for land pattern for THT.
As a result of proper land and hole dimensioning a reliable solder joint will be formed during
the soldering process. Thus, it is necessary to know which soldering method will be used during
the manufacturing of the circuit board assembly.

IEC 61188-6-3:2024 © IEC 2024 – 13 –

a) Round terminal b) Square terminal
Key:
A component terminal
B Land (soldering area)
l diameter of component terminal
d diameter of hole; Finished hole size (FHS)
d copper thickness
d annular ring
c) Rectangle terminal with drilled hole
Figure 6 – Terminal diameter, annular ring

– 14 – IEC 61188-6-3:2024 © IEC 2024

Figure 7 – Basic design flow diagram for land pattern for THT
6.2 Land/Pad dimensioning for leaded terminals
Depending on the soldering method the requirements on the annular ring dimensions may be
different. If hand soldering is used, a larger annular ring gives better thermal contact between
the soldering tip and the land.
To improve hole fill with solder it can be helpful to increase the annular ring on the solder source
side. To reduce heat dissipation it can be helpful to decrease the annular ring on the solder
target side. This should be considered for lead free selective soldering.
The land/pad shall respect the copper thickness of the used copper foil and additional thickness
as a result of the plating processes.
Depending on the weight per pin, of the assembled component, the land pattern shall be defined.
If the circuit board technology does not allow a sufficient size, additional rules shall be
implemented.
More detailed considerations, calculations and examples are described in detail in Annex A.
6.3 Land shape for typical terminal shapes
An additional spacing for the assembly process and its tolerance shall be respected.
The maximal size depends on the minimal electrical spacing between different terminals, or an
array of terminals. Sometimes it is helpful use to square, octagonal, polygonal or oblong shapes.
The land shape is able to indicate the polarisation (pin 1) of a THT component.

IEC 61188-6-3:2024 © IEC 2024 – 15 –
Annex A
(informative)
Determination, assessment and calculation of land pattern
A.1 Consideration of creating holes
A.1.1 General
The majority of manufactured circuit boards use plated through holes (PTH). In cost sensitive
consumer electronics, single side circuit boards are preferred. Those devices typically use land
pattern on the opposite side of the mounted device. The land pattern must be defined large
enough to fulfil the requirements of the assembly.
The land pattern of devices mounted on flexible circuit boards shall fulfil the requirements of
the circuit board manufacturer and assembling processes.
The shape and size of the land pattern differ in the way the circuit board is manufactured and
assembled. Figure A.1 gives an overview.

Figure A.1 – Circuit board manufacturing and assembly
A.1.2 Punched
Single side circuit boards with punched holes have only one "land" on the opposite side of the
assembled part. Those boards do not have a metallization on the hole walls (barrel). With
respect to the manufacturing process larger tolerances must be considered. The tolerance of
the position and size of the hole depend on the tolerance of the punching tool. The land pattern
for punched holes is typically larger than the land pattern for drilled holes.

– 16 – IEC 61188-6-3:2024 © IEC 2024
A.1.3 Drilled
The manufacturing process for drilled holes is well controlled. The tolerance depends on the
size of the drilled holes. The smaller the size of the hole, the higher the precision of position
and drilled hole size. Drilled holes are used for single-side, multi-layer and flexible or rigid-
flexible circuit boards. This technique is used in almost every circuit board. The land pattern of
PTH is dominated by the assembly process. The land pattern shall respect design
considerations.
A.1.4 Milled
The leads of a few parts are designed to use slots or polygonal shapes, in some cases the
device is fixed additionally (screw, rivet, etc.). To create this PTH a milling process is used. The
land pattern shall respect the way of production in the circuit board shop and the assembly
process. Milled holes have a larger tolerance in size and position compared to drilled holes.
An example for a milled plated slot is used to fix components. A typical terminal is given in
Figure A.2.
Key
A component terminal
B Land (soldering area)
l major dimension of terminal
x
l minor dimension of terminal
y
d major dimension of hole
x
d minor dimension of hole
y
d copper thickness
d annular ring
Figure A.2 – Figure oblong pin
A.1.5 Laser drilled
It is possible to create PTH by laser drilling. However so far, this is not being used commercially.

IEC 61188-6-3:2024 © IEC 2024 – 17 –
A.1.6 preformed / printed
If the circuit boards (substrates) are manufactured in a similar way to moulded Interconnected
Devices (MID) or additive manufacturing technologies like 3D-printing, the influence and
tolerance of the production process shall be considered.
Criteria:
• circular / noncircular
• perpendicular
• even surface
• vertical direction or less deflection is to be described
NOTE It is possible to create sloped holes by using additive (printed) manufactured principles.
A.2 Determination of THT component assembly
A.2.1 General
The requirements of the assembling process shall be considered. If an automatic assembly
process is used the land pattern shall consider the performance of the used method. The hole
size, the land pattern and the length of the terminal (protrusion) shall be harmonized in such a
way as to achieve an easy assembly and a reliable solder joint (see Figure A.3).

Key
1 THT component
2 component terminal
3 circuit board
4 protrusion of terminal
Figure A.3 – Protrusion of component terminal
To get a reliable solder joint the protrusion length of the terminal shall not be larger than 1,5 to
2,0 mm. The recommended minimum protrusion length is 0,5 mm.
NOTE When a circuit board thickness is 1,6 mm (widely used), a lead length of 3,1 mm to 3,6 mm is useable.
A.2.2 Manual assembly
If the devices are assembled manually, larger sized holes support the assembly process.

– 18 – IEC 61188-6-3:2024 © IEC 2024
A.2.3 Automated assembly
If an automated assembly process is implemented the requirements (tolerance and precision of
pick and place, tolerance of pin, tolerance of hole position and size) of the equipment
manufacturer shall be fulfilled.
A.2.4 Press fit component assembly
Usually press fit pins shall not be soldered additionally. The land pattern for those pins shall
meet the requirements of IEC 60352-5 and the general design rules regarding the used circuit
board technique.
A.3 Determination of the soldering process
A.3.1 General
The soldering process affects the size of the land used for soldering. There is a general balance
between the thermal capacity of the substrate and the provided temperature of the soldering
process. The land pattern shall be defined according to the requirements of the used soldering
process. Too small a land pattern cannot provide the necessary solder temperature for heavy
copper or tin leads. If the pitch of the THT parts is too small, or the density of the placement is
too high, a wave soldering process is not useable.
There are two possible layout definitions of the solder mask. Both variations are often used to
define the solderable area of Surface Mounted Devices (SMD), especially within the usage of
ball grid arrays.
The first is a solder mask defined pad. The diameter of the solder mask is smaller than the
diameter of the outer layer pads. The second option is the non solder mask version. The
diameter of the solder mask is larger than the diameter of the outer layer pads. Both variations
do not have a strong effect, by using wave soldering process.
If the solder volume is limited by the soldering process, the variation of the solder mask can
have a significant impact on the result (robot soldering or laser soldering).
A.3.2 Manual soldering
For hand soldered components, good vertical solder fill is achieved, because the soldering
process occurs on the opposite side of the placed component. This usually leads to 100 %
vertical solder filling since gravity acts in the same direction as the wetting force.
A.3.3 Reflow soldering
The size of lands for solder paste shall meet the requirements of IEC TR 61760-3-1.
A.3.4 Wave soldering
If the assembled devices shall be soldered using wave soldering or selective soldering process
the land pattern size and orientation of the devices is important. It is necessary to prohibit
electrical
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