IEC 62714-4:2020

IEC 62714-4 ®
Edition 1.0 2020-06
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Engineering data exchange format for use in industrial automation systems
engineering – Automation markup language –
Part 4: Logic
Format d'échange de données pour une utilisation dans l'ingénierie des
systèmes d'automatisation industrielle – Automation markup language –
Partie 4: Logique
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IEC 62714-4 ®
Edition 1.0 2020-06
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Engineering data exchange format for use in industrial automation systems

engineering – Automation markup language –

Part 4: Logic
Format d'échange de données pour une utilisation dans l'ingénierie des

systèmes d'automatisation industrielle – Automation markup language –

Partie 4: Logique
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 25.040.40 ISBN 978-2-8322-8399-8

– 2 – IEC 62714-4:2020 © IEC 2020
CONTENTS
FOREWORD . 9
INTRODUCTION . 11
1 Scope . 13
2 Normative references . 13
3 Terms, definitions and abbreviated terms . 14
3.1 Terms and definitions . 14
3.2 Abbreviated terms . 15
4 Conformity . 16
5 Overview . 16
5.1 Logic information in production system engineering . 16
5.2 Logic models in production system engineering . 17
5.3 Storing logic models in AML logic XML . 18
5.4 Referencing logic information . 20
6 Logic models . 21
6.1 General . 21
6.2 Gantt charts . 21
6.2.1 General . 21
6.2.2 Graphical elements . 21
6.2.3 Chart structure. 21
6.2.4 Logic information . 22
6.2.5 Logic information within Gantt chart . 22
6.3 Activity-on-node networks . 22
6.3.1 General . 22
6.3.2 Graphical elements . 22
6.3.3 Node structure . 23
6.3.4 Network structure . 23
6.3.5 Logic information . 23
6.3.6 Logic information within activity-on-node networks. 23
6.4 Timing diagrams . 24
6.4.1 General . 24
6.4.2 Graphical elements . 24
6.4.3 Diagram structure . 25
6.4.4 Logic information . 25
6.4.5 Logic information within timing diagrams . 26
6.5 Sequential function charts . 26
6.6 Function block diagrams . 27
6.7 Mathematical expression. 27
7 AML logic XML schema description . 27
7.1 Schema overview . 27
7.1.1 Use of IEC 61131-10 schema . 27
7.1.2 Schema versioning . 28
7.2 Root element "AMLLogic" . 29
7.2.1 General . 29
7.2.2 Attributes . 29
7.2.3 Sub-element "WriterHeader" . 29
7.2.4 Sub-element "Types" . 29

7.2.5 Sub-element "Documentation" . 30
7.3 Complex type "FunctionBlock" . 30
7.3.1 General . 30
7.3.2 Attributes . 30
7.3.3 Sub-element "Parameters" . 30
7.3.4 Sub-element "Vars . 30
7.3.5 Sub-element "MainBody" . 30
7.3.6 Complex type "ParameterSet" . 31
7.3.7 Complex type "VariableDecl" . 31
7.4 Complex Type "IML" . 32
7.4.1 General . 32
7.4.2 Attributes . 33
7.4.3 Sub-element "Resource" . 33
7.4.4 Sub-element "TimeInformation" . 33
7.4.5 Choice of "IML***" element . 33
7.4.6 Complex type "IMLStep" . 33
7.4.7 Complex type "IMLTransition" . 34
7.4.8 Complex type "IMLSimultaneousDivergence" . 35
7.4.9 Complex type "IMLSimultaneousConvergence" . 35
7.5 Complex Type "MathematicalExpression" . 35
7.5.1 General . 35
7.5.2 Attributes . 36
7.5.3 Sub-element "VariableMapping" . 36
7.5.4 Sub-element "MathML" . 36
7.6 Simple type "LogicModelTypeEnum" . 36
7.7 Simple type "TimeUnion" . 36
7.8 Simple type "TimeFormatEnum" . 36
7.9 Simple type "UuidString" . 37
8 Storing logic models . 37
8.1 General . 37
8.2 Storing Gantt charts in AML logic XML . 37
8.2.1 Common rules . 37
8.2.2 Storing the start of a Gantt chart . 37
8.2.3 Storing bars . 38
8.2.4 Storing arrows . 38
8.2.5 Storing successor bars . 39
8.2.6 Storing predecessor bars . 41
8.3 Storing activity-on-node networks in AML logic XML . 42
8.3.1 Common rules . 42
8.3.2 Storing the start of an activity-on-node network . 42
8.3.3 Storing nodes . 43
8.3.4 Storing arrows . 43
8.3.5 Storing successor nodes . 44
8.3.6 Storing predecessor nodes . 45
8.4 Storing timing diagrams in AML logic XML . 46
8.4.1 Common rules . 46
8.4.2 Storing the timeline of a timing diagram . 47
8.4.3 Storing resources and resource states . 48
8.4.4 Storing lifelines . 48

– 4 – IEC 62714-4:2020 © IEC 2020
8.4.5 Storing the time signal and the resource signal . 50
8.5 Storing sequential function charts in AML logic XML . 52
8.5.1 Common rules . 52
8.5.2 Storing variables . 52
8.6 Storing function block diagrams in AML logic XML . 53
8.6.1 Common rules . 53
8.6.2 Storing variables . 53
8.7 Storing mathematical expressions in AML logic XML . 54
8.7.1 Common rules . 54
8.7.2 Storing variables . 55
8.7.3 Storing variable mappings . 55
8.7.4 Storing mathematical expressions . 56
9 Meta information about AML logic XML writer tools . 56
10 Extensions of AML classes for logic . 57
10.1 General . 57
10.2 AutomationMLLogicRoleClassLib . 57
10.2.1 General . 57
10.2.2 RoleClass InterlockingTargetGroup . 58
10.2.3 RoleClass InterlockingSourceGroup . 58
10.2.4 RoleClass LogicModelObject . 59
10.3 AutomationMLLogicInterfaceClassLib . 60
10.3.1 General . 60
10.3.2 InterfaceClass LogicModelInterface . 60
10.3.3 InterfaceClass SequencingLogicModelInterface . 60
10.3.4 InterfaceClass BehaviourLogicModelInterface . 61
10.3.5 InterfaceClass InterlockingLogicModelInterface . 61
10.3.6 InterfaceClass LogicModelElementInterface . 61
10.3.7 InterfaceClass VariableInterface . 62
10.3.8 InterfaceClass InterlockingVariableInterface . 62
10.4 AutomationMLPLCopenXMLInterfaceClassLib. 63
10.4.1 General . 63
10.4.2 InterfaceClass VariableInterface . 63
10.5 AutomationMLInterfaceClassLib . 64
10.5.1 General . 64
10.5.2 InterfaceClass InterlockingConnector . 64
10.5.3 InterfaceClass PLCopenXMLInterface . 64
11 Referencing AML logic XML documents . 64
11.1 General . 64
11.2 Referencing logic information . 64
12 Linking AML objects with interlocking information . 65
12.1 General . 65
12.2 Referencing interlocking information . 65
Annex A (informative) Examples for storing logic models in AML logic XML . 67
A.1 Example for storing Gantt charts . 67
A.1.1 General . 67
A.1.2 Storing of activities without predecessor and successor relation . 67
A.1.3 Storing of an activity sequence . 68
A.1.4 Storing of an activity sequence with divergences . 70

A.1.5 Storing of an activity sequence with convergences . 71
A.2 Example for storing activity-on-node networks . 72
A.2.1 General . 72
A.2.2 Storing of activities without predecessor and successor relation . 72
A.2.3 Storing of an activity sequence . 73
A.2.4 Storing of an activity sequence with divergences . 74
A.2.5 Storing of an activity sequence with convergences . 75
A.3 Example for storing timing diagrams . 76
A.3.1 General . 76
A.3.2 Example of storing internal signal . 77
A.3.3 Example of storing external signal . 78
A.3.4 Example of storing signal between two resource states flows . 79
A.4 Example for storing sequential function charts . 81
A.5 Example for storing function block diagrams . 83
A.6 Example for storing mathematical expressions . 85
Annex B (informative) Examples for referencing logic information . 89
B.1 General . 89
B.2 Referencing logic information expressed as logic models . 89
B.2.1 General . 89
B.2.2 Referencing logic information stored in one FunctionBlock . 89
B.2.3 Referencing logic information, which is composed of several

FunctionBlocks . 90
B.2.4 Referencing logic information, which is composed of several AML logic
XML documents . 90
B.3 Referencing logic information as a part of logic models . 92
B.3.1 General . 92
B.3.2 Referencing a variable . 92
B.3.3 Referencing a logic element . 93
B.4 Referencing logic information as a part of already referenced logic models . 93
Annex C (informative) Examples for referencing interlocking information . 96
C.1 General . 96
C.2 Interlocking information . 97
C.3 Referencing interlocking information without interlocking condition . 97
C.4 Referencing interlocking information with interlocking condition . 99
Annex D (normative) XML representation of AML standard libraries . 103
D.1 General . 103
D.2 AutomationMLLogicRoleClassLib . 103
D.3 AutomationMLLogicInterfaceClassLib . 104
D.4 AutomationMLPLCopenXMLInterfaceClassLib. 105
Annex E (normative) XML representation of AML logic XML schema . 106
Bibliography . 110

Figure 1 – Overview of the engineering data exchange format AML . 11
Figure 2 – Example of system representation with roles of information in AML . 17
Figure 3 – Logic models in AML . 18
Figure 4 – Storing logic models in AML logic XML . 19
Figure 5 – Modelling elements of the AML logic XML . 20
Figure 6 – Model elements of Gantt charts . 21

– 6 – IEC 62714-4:2020 © IEC 2020
Figure 7 – Information provided by Gantt charts . 22
Figure 8 – Model elements of activity-on-node networks . 23
Figure 9 – Information provided by activity-on-node networks . 24
Figure 10 – Model elements of timing diagrams . 25
Figure 11 – Information provided by timing diagrams . 26
Figure 12 – AML logic schema overview . 28
Figure 13 – Root element "AMLLogic" . 29
Figure 14 – Complex type "FunctionBlock" . 30
Figure 15 – Complex type "ParameterSet" . 31
Figure 16 – Complex type "VariableDecl" . 31
Figure 17 – Complex type "IML" . 32
Figure 18 – Complex type "IMLStep" . 34
Figure 19 – Complex type "IMLTransition" . 34
Figure 20 – Complex type "IMLSimultaneousDivergence" . 35
Figure 21 – Complex type "IMLSimultaneousConvergence" . 35
Figure 22 – Complex type "MathematicalExpression" . 35
Figure 23 – AutomationMLLogicRoleClassLib . 58
Figure 24 – AutomationMLLogicInterfaceClassLib . 60
Figure 25 – AutomationMLPLCopenXMLInterfaceClassLib . 63
Figure A.1 – Flow rate of valves . 86
Figure A.2 – Example for storing a mathematical expression . 88
Figure B.1 – Referencing logic information (as SFC) stored in one FunctionBlock . 89
Figure B.2 – XML text of the CAEX file for referencing logic information stored in one
FunctionBlock . 90
Figure B.3 – Referencing logic information, which is composed of several

FunctionBlocks . 90
Figure B.4 – Referencing logic information which is composed of several AML logic
XML documents . 91
Figure B.5 – XML text of the CAEX file for referencing logic information, which is
composed of several AML logic XML documents . 91
Figure B.6 – Referencing a variable . 92
Figure B.7 – XML text of the CAEX file for referencing a variable . 92
Figure B.8 – Referencing a logic element . 93
Figure B.9 – XML text of the CAEX file for referencing a logic element . 93
Figure B.10 – Referencing a variable of an already referenced logic model. 94
Figure B.11 – XML text of the CAEX file for referencing a variable of an already
referenced logic model . 95
Figure C.1 – Example manufacturing system . 96
Figure C.2 – Example interlocking source group and interlocking target group . 97
Figure C.3 – Referencing interlocking information without interlocking condition . 98
Figure C.4 – XML text of the CAEX file for referencing interlocking information without
interlocking condition . 99
Figure C.5 – Referencing interlocking information with interlocking condition . 100
Figure C.6 – XML text of the CAEX file for referencing interlocking information with
interlocking condition . 101

Figure C.7 – Linking logical interface with physical interface (extension to Figure C.5) . 102
Figure C.8 – XML text of the CAEX file for linking logical interface with physical
interface (extension to Figure C.6) . 102

Table 1 – Abbreviated terms . 16
Table 2 – Mapping the start of a Gantt chart to IML element . 38
Table 3 – Mapping of Gantt chart bars to IML elements . 38
Table 4 – Mapping of Gantt chart arrow to IML elements . 39
Table 5 – Mapping of Gantt chart bar with one or more successor bars to IML elements . 40
Table 6 – Mapping of Gantt chart bar with one and more predecessor bars to IML
elements . 41
Table 7 – Mapping of the start of an activity-on-node network to IML elements . 42
Table 8 – Mapping of activity-on-node network nodes to IML elements . 43
Table 9 – Mapping of activity-on-node network arrows to IML elements . 44
Table 10 – Mapping of activity-on-node network successor nodes to IML elements . 44
Table 11 – Mapping of activity-on-node network predecessor nodes to IML elements . 45
Table 12 – Mapping of the timeline of a timing diagram to IML elements . 48
Table 13 – Mapping of timing diagram resources and resource states to IML elements . 48
Table 14 – Mapping of timing diagram lifelines to IML elements . 49
Table 15 – Mapping of the time signal and the resource signal to IML elements . 51
Table 16 – Storing variable of a sequential function chart in AML logic XML . 53
Table 17 – Storing variable of a function block diagram in AML logic XML . 54
Table 18 – Storing variable of a mathematical expression in AML logic XML . 55
Table 19 – Storing variable mappings of a mathematical expression in AML logic XML . 56
Table 20 – Storing a mathematical expression in AML logic XML . 56
Table 21 – Meta information about each AML logic XML writer tool . 57
Table 22 – RoleClass InterlockingTargetGroup . 58
Table 23 – RoleClass InterlockingSourceGroup . 59
Table 24 – RoleClass LogicModelObject . 59
Table 25 – InterfaceClass LogicModelInterface . 60
Table 26 – InterfaceClass SequencingLogicModelInterface . 61
Table 27 – InterfaceClass BehaviourLogicModelInterface . 61
Table 28 – InterfaceClass InterlockingLogicModelInterface . 61
Table 29 – InterfaceClass LogicModelElementInterface . 62
Table 30 – InterfaceClass VariableInterface . 62
Table 31 – InterfaceClass InterlockingVariableInterface . 63
Table 32 – InterfaceClass VariableInterface . 63
Table 33 – InterfaceClass InterlockingConnector . 64
Table 34 – InterfaceClass PLCopenXMLInterface . 64
Table A.1 – Storing of the Gantt chart example "activities without predecessor and
successor relations" . 68
Table A.2 – Storing of the Gantt chart example "activity sequence". 69
Table A.3 – Storing of the Gantt chart example "activity sequence with divergence" . 70
Table A.4 – Storing of the Gantt chart example "activity sequence with convergences" . 71

– 8 – IEC 62714-4:2020 © IEC 2020
Table A.5 – Storing of the activity-on-node network example "activities without
predecessor and successor relations" . 72
Table A.6 – Storing of the activity-on-node network example "activity sequence" . 73
Table A.7 – Storing of the activity-on-node network example "activity sequence with
divergence" . 74
Table A.8 – Storing of the activity-on-node network example "activity sequence with
convergences" . 75
Table A.9 – Storing of the timing diagram example "transition from a state change to
the subsequent state" . 77
Table A.10 – Mapping of the timing diagram example "two external signals fired with
delay of three seconds" . 78
Table A.11 – Storing of the timing diagram example "signal fired by one resource state
and consumed by another" . 80
Table A.12 – Example for storing sequential function chart . 81
Table A.13 – Example for storing a function block diagram . 83

INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
ENGINEERING DATA EXCHANGE FORMAT FOR USE
IN INDUSTRIAL AUTOMATION SYSTEMS ENGINEERING –
AUTOMATION MARKUP LANGUAGE –
Part 4: Logic
FOREWORD
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International Standard IEC 62714-4 has been prepared by subcommittee 65E: Devices and
integration in enterprise systems, of IEC technical committee 65: Industrial-process
measurement, control and automation.
The text of this International Standard is based on the following documents:
CDV Report on voting
65E/654/CDV 65E/692/RVC
Full information on the voting for the approval of this International Standard can be found in the
report on voting indicated in the above table.
This document has been drafted in accordance with the ISO/IEC Directives, Part 2.

– 10 – IEC 62714-4:2020 © IEC 2020
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