IEC 63055:2023
(Main)Format for LSI-Package-Board Interoperable design
Format for LSI-Package-Board Interoperable design
IEC 63055:2023 defines a common interoperable format that will be used for the design of a) large-scale integration (LSI), b) packages for such LSI, and c) printed circuit boards on which the packaged LSIs are interconnected. Collectively, such designs are referred to as LSI-Package-Board (LPB) designs. The format provides a common way to specify information/data about the project management, netlists, components, design rules, and geometries used in LPB designs. This is an IEC/IEEE dual logo standard.
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IEC 63055 ®
Edition 2.0 2023-10
™
IEEE Std 2401
INTERNATIONAL
STANDARD
colour
inside
Format for LSI-Package-Board Interoperable design
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IEC 63055 ®
Edition 2.0 2023-10
IEEE Std 2401™
INTERNATIONAL
STANDARD
colour
inside
Format for LSI-Package-Board Interoperable design
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 31.180, 31.200, 35.060 ISBN 978-2-8322-7515-3
– i – IEEE Std 2401™-2019
Contents
1. Overview .11
1.1 Scope .11
1.2 Purpose .11
1.3 Key characteristics of the LSI-Package-Board Format .11
1.4 Contents of this standard .12
1.5 Word usage .13
2. Normative references .13
3. Definitions, acronyms, and abbreviations .13
3.1 Definitions .13
3.2 Acronyms and abbreviations .16
4. Concept of the LPB Format .18
4.1 Technical background .18
4.2 Conventional design .18
4.3 Common problems at the design site .19
4.4 Concept of LPB interoperable design .19
4.5 Value creation by LPB interoperable design .19
4.6 LPB Format .21
4.7 Summary of LPB Format files .21
5. Language basics.27
5.1 General .27
5.2 Typographic and syntax conventions .27
5.3 Character information .28
5.4 Notation of the floating point number .28
5.5 File naming definitions .28
6. Common elements in M-Format, C-Format, and R-Format .29
6.1 General .29
6.2 The element .29
6.3 The
6.4 The element .32
7. M-Format.48
7.1 M-Format file structure.48
7.2 The element .49
7.3 The element.49
7.4 The element .50
8. C-Format .56
8.1 C-Format file structure .56
8.2 The element .56
8.3 The element .161
9. R-Format .165
9.1 R-Format file structure .165
9.2 The element .166
9.3 The element .201
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Published by IEC under licence from IEEE. © 2019 IEEE. All rights reserved.
IEEE Std 2401™-2019 – ii–
10. N-Format .211
10.1 Purpose of the N-Format file .211
10.2 How to identify the power/ground network .211
10.3 Example .212
11. G-Format .212
11.1 Language basics of G-Format .212
11.2 Structure .213
11.3 Header section .214
11.4 Material section .215
11.5 Layer section.215
11.6 Shape section .216
11.7 Board geometry section .220
11.8 Padstack section .221
11.9 Part section .222
11.10 Component section .224
11.11 Net attribute section .225
11.12 Netlist section .225
11.13 Via section .227
11.14 Bondwire section .228
11.15 Route section .229
Annex A (informative) Bibliography .233
Annex B (informative) Examples of utilization .235
B.1 Understanding the function of the LPB Format .235
B.2 Test bench .235
B.3 Design flow example .237
B.4 Growth of the sample files in the LPB Format .269
B.5 Simulations using the sample files in the LPB Format .273
Annex C (informative) XML Encryption .275
Annex D (informative) MD5 checksum .278
Annex E (informative) Chip-Package Interface Protocol .279
E.1 General .279
E.2 Comparison of C-Format with Chip-Package Interface Protocol .279
Annex F (informative) M-Format usage examples .284
F.1 General .284
F.2 Bundling files for a product .284
F.3 Bundling files for a library .285
F.4 Managing design versions using M-Format .287
Annex G (informative) Example of how to express the connector parts as terminals .288
G.1 General .288
Annex H (informative) Participants . 292
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– iii – IEEE Std 2401™-2019
FORMAT FOR LSI-PACKAGE-BOARD INTEROPERABLE DESIGN –
FOREWORD
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IEEE Std 2401™-2019 – iv –
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IEEE Std 2401™-2019
IEEE Std 2401™-2019
IEEE Standard Format for LSI-Package-
Board Interoperable Design
Developed by the
Design Automation Standards Committee
of the
IEEE Computer Society
Approved 7 November 2019
IEEE SA Standards Board
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IEEE Std 2401™-2019
Copyrights and permissions
All figures in this standard are reprinted with permission from JEITA.
Abstract: A method is provided for specifying a common interoperable format for electronic
systems design. The format provides a common way to specify information/data about the project
management, netlists, components, design rules, and geometries used in the large-scale
integration-package-board designs. The method provides the ability to make electronic systems a
key consideration early in the design process; design tools can use it to seamlessly exchange
information/data.
Keywords: common interoperable format, components, design analysis, design rules,
geometries, IEEE 2401™, large-scale integration (LSI), netlists, packages for LSI circuits, printed
circuit board, project management, Verilog-HDL
•
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IEEE Std 2401™-2019
IEEE Introduction
This introduction is not part of IEEE Std 2401-2019, IEEE Standard Format for LSI-Package-Board Interoperable
Design.
To deal with the increasing difficulty of design and the cost competitiveness of the global market, and to
shorten the development term, innovative design methodologies should be implemented. It has been
difficult to achieve the optimization of an entire set of large-scale integration (LSI), package, and board
(LPB) using individual design processes for each LPB part.
One possibility for optimization is to have a certain section design the whole LPB; however, gathering
knowledge and integrating the design environment of each LPB part is difficult. Dedicated professional
technicians of individual LPB parts, who have the best knowledge and performance of their own part’s
design tools, intend to create design optimization by having proper interoperable information exchanges
among all LPB parties. In order to achieve a design that optimizes the balance between cost and
performance, information about and the results of design should be well shared among cooperating LPB
design sections.
The standard format of LSI package board interoperable design (hereinafter called LPB Format) was
developed to make it easier to exchange information among LPB design departments, so that optimal
design will be carried out quickly.
The LPB interoperable design process has the following issues:
Netlist not unified on each LPB
Complexity of the representation of the relationship as a whole arrangement of the LPB
Differences in how to give the design constraints, lack of design information, and many
discrepancies in design rules
Databases not unified in each LPB, or among different vendors
No unified terms
Various problems caused by these issues include the following:
A large effort is required for conversion of formats.
The occurrence of conversion errors and connection errors is difficult to detect because there is a
lack of the information needed to do so.
It takes a long time to gather information, resulting in a long period of design and analysis.
It is difficult to make optimal design changes because the entire verification process is difficult.
Electronic design automation (EDA) tool cost increase because of additional development required
to support multiple formats.
It is time consuming for designers to communicate their intentions in a way that others understand.
Based on this analysis, the interface LPB Format has been developed which can address these issues.
As the one of the case studies of the LPB interoperable design process, the power distribution network
(PDN) should be designed with information about the other LPB parts to reduce the noise (see Figure i).
This is a copyrighted IEEE Standard. For personal or standards development use only.
Published by IEC under licence from IEEE. © 2019 IEEE. All rights reserved.
IEEE Std 2401™-2019
Reprinted with permission from JEITA.
Figure i—Power distribution network
Resonance is caused by a capacitance and inductance present in the various parts in the LPB PDN.
Impedance at the resonant frequency will be extremely large. If each part of the overall LPB design is not
accurately simulated in the PDN model, the power supply circuit cannot be correctly designed (see
Figure ii).
Reprinted with permission from JEITA.
Figure ii—Example of PDN impedance
In order to run properly, this simulation should align a variety of information, such as the circuit model of
power distribution network (PDN) of LSI, shape information about the package and board, electrical
parameters of materials, and models of the components. It is difficult to make an efficient design when the
specification or format of the design information is different in each part of the LPB, and the necessary
parameters are not shared. When the format of the interface methods and models of the simulation are not
consistent, the setup time and the cost of design/verification are enormous, which has become a barrier to
cooperation in LPB design. The LPB Format will be evolved to create a mutual interface to enable a more
efficient co-design environment.
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Published by IEC under licence from IEEE. © 2019 IEEE. All rights reserved.
IEEE Std 2401™-2019 – 11 –
IEEE Standard Format for LSI-Package-
Board Interoperable Design
1. Overview
1.1 Scope
This standard defines a common interoperable format that will be used for the design of a) large-scale
integration (LSI), b) packages for such LSI, and c) printed circuit boards on which the packaged LSIs are
interconnected. Collectively, such designs are referred to as LSI-Package-Board (LPB) designs. The format
provides a common way to specify information/data about the project management, netlists, components,
design rules, and geometries used in LPB designs.
1.2 Purpose
The general purpose of this standard is to develop a common format that LPB design tools can use to
exchange information/data seamlessly, as opposed to having to work with multiple different input and
output formats.
1.3 Key characteristics of the LSI-Package-Board Format
The LPB Format will facilitate the exchange of design information. This functionality provides the ability
to plan the entire design at an early stage. In effect, post-design analysis will be possible throughout the
entire LPB design process. Analysis of each part of the design can be examined in relation to all other parts
of the design to determine the optimal point to give feedback for appropriate design changes throughout the
LPB. This will promote the overall optimization of the design process.
The LPB Format is constructed out of the following five formats (see Figure 1):
a) Project Management (M-Format)
b) Netlist (N-Format)
c) Component (C-Format)
d) Design Rule (R-Format)
e) Geometry (G-Format)
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– 12 – IEEE Std 2401™-2019
IEEE Std 2401-2019
IEEE Standard Format for LSI-Package-Board Interoperable Design
Reprinted with permission from JEITA.
Figure 1 —LPB Format
Design time can be shortened by using the LPB Format. Traditionally, design starts immediately after
separate planning for each individual component of the LPB. Therefore, information exchange among the
separate design processes is limited. Trying to adjust the detailed design of one component to the detailed
design of another component makes the entire design period take longer. Optimization also tends to be a
separate process for each component of the LPB. By using the LPB Format for distributed information,
each LPB engineer will be able to have the same understanding of the challenges at an early stage. As a
result, adjustments at the conceptual design stage can be made, before detailed designs are developed. By
making clear the overall LPB product specifications, the design target can be decided, and so the duration
of individual designs can be shortened. Use of the LPB Format also helps to reduce the number of design
iterations, because the design quality is enhanced. The designers can collect all information for simulation
using the LPB formats, thereby reducing production time. The LPB Format can enable the entire analysis
easily, so that sufficient verification can be done and the quality of the products can be improved. As a
result, the period of adjustment in the set can be shortened and the time to market can be accelerated. With
the LPB Format, the design method for one product can be applied to the design environment for next
product in development.
1.4 Contents of this standard
The organization of the remainder of this standard is as follows:
Clause 2 provides references to other applicable standards that are presumed or required for this
standard.
Clause 3 defines terms and acronyms used throughout the different specifications contained in this
standard.
Cl
...
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