IEC 62386-101:2014/AMD1:2018

IEC 62386-101 ®
Edition 2.0 2018-05
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
A MENDMENT 1
AM ENDEMENT 1
Digital addressable lighting interface –
Part 101: General requirements – System components

Interface d’éclairage adressable numérique –
Partie 101: Exigences générales – Composants de système

IEC 62386-101:2014-11/AMD1:2018-05(en-fr)

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IEC 62386-101 ®
Edition 2.0 2018-05
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
A MENDMENT 1
AM ENDEMENT 1
Digital addressable lighting interface –

Part 101: General requirements – System components

Interface d’éclairage adressable numérique –

Partie 101: Exigences générales – Composants de système

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 29.140.50; 29.140.99 ISBN 978-2-8322-5657-2

– 2 – IEC 62386-101:2014/AMD1:2018
© IEC 2018
FOREWORD
This amendment has been prepared by IEC technical committee 34: Lamps and related
equipment.
The text of this amendment is based on the following documents:
CDV Report on voting
34/418/CDV 34/502/RVC
Full information on the voting for the approval of this amendment can be found in the report
on voting indicated in the above table.
The committee has decided that the contents of this amendment and the base publication will
remain unchanged until the stability date indicated on the IEC website under
"http://webstore.iec.ch" in the data related to the specific publication. At this date, the
publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
_____________
INTRODUCTION
Replace the first sentence of the fourth paragraph with the following new text:
This second edition of IEC 62386-101 is intended to be used in conjunction with
IEC 62386-102:2014 and IEC 62386-102:2014/AMD1:— and with the various parts that make
up the IEC 62386-2xx series for control gear, together with IEC 62386-103:2014 and
IEC 62386-103:2014/AMD1:— and the various parts that make up the IEC 62386-3xx series
of particular requirements for control devices.

© IEC 2018
1 Scope
Delete the second sentence and add, at the end of the first sentence, the following new text:
which is in line with the requirements of IEC 61347 (all parts), with the addition of DC
supplies.
2 Normative references
Replace the first paragraph with the following new text:
The following documents are referred to in the text in such a way that some or all of their
content constitutes requirements of this document. For dated references, only the edition
cited applies. For undated references, the latest edition of the referenced document (including
any amendments) applies.
Delete the reference "IEC 61347 (all parts), Lamp controlgear".
Replace the references to IEC 62386-102 and IEC 62386-103 with the following new
references:
IEC 62386-102:2014, Digital addressable lighting interface – Part 102: General requirements
– Control gear
IEC 62386-102:2014/AMD1:—
IEC 62386-103:2014, Digital addressable lighting interface – Part 103: General requirements
– Control devices
IEC 62386-103:2014/AMD1:—
3 Terms and definitions
Add, after the first sentence, the following new text:
ISO and IEC maintain terminological databases for use in standardization at the following
addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp
Add after 3.49 the following new terms:
3.50
frame accepted
frame that has been received and uses the correct frame type and data bit content
___________
Under preparation. Stage at the time of publication: IEC DECFDIS 62386-102/AMD1:2018.
Under preparation. Stage at the time of publication: IEC RFDIS 62386-103/AMD1:2018.

– 4 – IEC 62386-101:2014/AMD1:2018
© IEC 2018
3.51
frame ignored
frame received but not accepted
3.52
frame received
frame with a valid start bit, valid data bits, and a stop condition
3.53
frame rejected
frame not received
4.2 Version number
Replace the fourth paragraph with the following new text:
The current version number is "2.01".

4.3 System structure and architecture
Replace Table 1 with the following new Table 1:
Table 1 – System components
Component Quantity For detailed information see
Bus power supply ≥ 1 Clause 6
IEC 62386-102:2014 and
Control gear ≥ 0
IEC 62386-102:2014/AMD1:—
IEC 62386-103:2014 and
Application controller
≥ 1
IEC 62386-103:2014/AMD1:—
IEC 62386-103:2014 and
Input devices
≥ 0
IEC 62386-103:2014/AMD1:—
Bus 1 Subclause 4.8 and Clause A.2

4.6.1 Transmitters and receivers in bus units
Replace the first sentence with the following new sentence:
Table 2 gives a short summary of the different receivers and transmitters allowed for each bus
unit.
Add after the first sentence:
It is not allowed for a bus unit to transmit or receive other frames than the ones indicated in
Table 2, except proprietary forward frames.

© IEC 2018
4.6.4 Single master application controller
Delete NOTE 3.
4.11.1 Different levels of power interruptions
Table 4
In the third column, fourth row, delete "450 ms" and in the last column, fifth row, add "for
system failure" after "Grey area", as follows:
Minimum Typical Maximum Description
Short interruptions of bus power
40 ms
a
supply
> 40 ms < 45 ms Grey area
b
45 ms  Bus power down
> 450 ms < 550 ms Grey area for system failure
b
550 ms  System failure
a
See 4.11.4.
b
See Clause 3.
4.11.3 External power cycle
Replace the first paragraph with the following new paragraph:
After an external power cycle (see Table 3), an externally powered bus unit shall apply power-
on behaviour to all logical units simultaneously. During an external power cycle, a bus unit
might still respond to commands.

4.11.5 Bus power down
Replace the existing text with the following new text:
A bus powered bus unit may interpret bus power down as an external power cycle. It shall
interpret system failure as an external power cycle. The behaviour shall apply to all logical
units simultaneously. See Table 4.

5.4 Signal voltage rating
Add, after NOTE 1, the following new text:
Devices need to be polarity insensitive (see 5.1) or power supplies need to be able to
withstand reverse voltages (see 9.7).

– 6 – IEC 62386-101:2014/AMD1:2018
© IEC 2018
Table 7
In the second column, last row, replace "-6,5 V" with "0 V", as follows:
Minimum Typical Maximum
Nominal system voltage U 0 V 20,5 V
Absolute maximum system voltage 0 V 22,5 V

Table 8
In the second column, last row, replace "-6,5 V" with "0 V", as follows:
Minimum Typical Maximum
High level voltage 9,5 V 22,5 V
Threshold voltage > 6,5 V 8,0 V < 9,5 V
Low level voltage 0 V 6,5 V
5.5 Signal current rating
Table 10
Replace, in footnote "a", "See 4.7" with "See 4.7, 5.6 and the text below", as follows:
Minimum Typical Maximum Condition
Externally powered bus unit current
consumption I when not  2,0 mA
BUS
transmitting
0 V ≤ U ≤ 22,5 V
Bus powered bus unit current
a
consumption I when not  250 mA
BUS
transmitting
Current consumption I when not
b c
BUS
10 µA U ≤ U ≤ 22,5 V
TH
transmitting
d
Transmitter sink current 250 mA  U ≤ 4,5 V
a
This is the theoretical maximum current. In reality a device should consume less current. See 4.7, 5.6 and
the text below.
b
The minimum current consumption is necessary for discharging the wiring capacitances and input
capacitances of the bus units connected.
c
U is the threshold voltage of the receiver.
TH
d
This is the required resulting voltage when sinking the maximum current.

Add, after Table 10, the following new text:
Bus units shall not to draw more than their specified maximum current, not even during power
up or power down. For bus powered units the actual value to use for testing is the
documented maximum current consumption.

6.5.2 Single bus power supply current rating
Add, after the first sentence, the following new sentence:
Such a power supply should be able to withstand any ringing on the bus; no test is provided.

© IEC 2018
8.2.1 Receiver bit timing
Replace the first sentence with the following new sentence:
A receiver shall receive or reject frames according to the bit timing requirements as follows.
Replace NOTE 2 with the following new NOTE 2:
NOTE 2 For the significance of this, see 9.8.

8.2.2 Receiver bit timing violation
Replace the first paragraph with the following new paragraph:
If a receiver detects a bit timing violation it shal
...