Mechanical standardization of semiconductor devices - Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for ball grid array (BGA)

IEC 60191-6-18:2010 provides standard outline drawings, dimensions, and recommended variations for all square ball grid array packages (BGA), whose terminal pitch is 1 mm or larger. This standard cancels and replaces IEC/PAS 60191-6-18 published in 2008. This first edition constitutes a technical revision. The contents of the corrigenda of May 2010 and July 2010 have been included in this copy.

Normalisation mécanique des dispositifs à semiconducteurs - Partie 6-18: Règles générales pour la préparation des dessins d'encombrement des dispositifs à semiconducteurs pour montage en surface - Guide de conception pour les boîtiers matriciels à billes (BGA)

La CEI 60191-6-18:2010 fournit des dessins d'encombrement, des dimensions et des variations recommandées normalisés pour tous les boîtiers matriciels à billes de forme carrée (BGA), dont le pas de sortie est supérieur ou égal à 1 mm. La présente norme annule et remplace l'IEC/PAS 60191-6-18 publié en 2008. Cette première édition constitue une révision technique. Le contenu des corrigenda de mai 2010 et juillet 2010 a été pris en considération dans cet exemplaire.

General Information

Status
Published
Publication Date
06-Jan-2010
Current Stage
PPUB - Publication issued
Start Date
31-Jan-2010
Completion Date
07-Jan-2010
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IEC 60191-6-18:2010 - Mechanical standardization of semiconductor devices - Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for ball grid array (BGA)
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IEC 60191-6-18 ®
Edition 1.0 2010-01
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Mechanical standardization of semiconductor devices –
Part 6-18: General rules for the preparation of outline drawings of surface
mounted semiconductor device packages – Design guide for ball grid array
(BGA)
Normalisation mécanique des dispositifs à semiconducteurs –
Partie 6-18: Règles générales pour la préparation des dessins d’encombrement
des dispositifs à semiconducteurs pour montage en surface – Guide de
conception pour les boîtiers matriciels à billes (BGA)

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IEC 60191-6-18 ®
Edition 1.0 2010-01
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Mechanical standardization of semiconductor devices –
Part 6-18: General rules for the preparation of outline drawings of surface
mounted semiconductor device packages – Design guide for ball grid array
(BGA)
Normalisation mécanique des dispositifs à semiconducteurs –
Partie 6-18: Règles générales pour la préparation des dessins d’encombrement
des dispositifs à semiconducteurs pour montage en surface – Guide de
conception pour les boîtiers matriciels à billes (BGA)

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
PRICE CODE
INTERNATIONALE
R
CODE PRIX
ICS 31.080.01 ISBN 978-2-88910-065-1
– 2 – 60191-6-18 © IEC:2010
CONTENTS
FOREWORD.3
1 Scope.5
2 Normative references .5
3 Terms and definitions .5
4 Terminal position numbering.6
5 Nominal package dimension .6
6 Symbols and drawings.7
7 Dimensions .10
8 Recommended BGA variations .16
Bibliography.20

Figure 1 – Cavity down type.7
Figure 2 – Cavity up type .8
Figure 3 – Pattern of terminal position areas.9
Figure 4 – Example of the terminal depopulations.15

Table 1 – Group 1: Dimensions appropriate to mounting and interchangeability.10
Table 2 – Group 2: Dimensions appropriate to mounting and gauging.13
Table 3 – Combinations of D, E, e, M , M , and n .14
D E
Table 4 – P-BGA (Cavity up) 1,27 mm pitch.16
Table 5 – P-BGA (Cavity up) 1,0 mm pitch.16
Table 6 – P-BGA (Cavity down) 1,27 mm pitch.18
Table 7 – T-BGA 1,27 mm pitch .18
Table 8 – T-BGA 1,0 mm pitch .19
Table 9 – P-BGA and C-BGA (Flip-chip interconnection) 1,0 mm pitch.19

60191-6-18 © IEC:2010 – 3 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –

Part 6-18: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Design guide for ball grid array (BGA)

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
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indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 60191-6-18 has been prepared by subcommittee 47D: Mechanical
standardization for semiconductor devices, of IEC technical committee 47: Semiconductor
devices.
This standard cancels and replaces IEC/PAS 60191-6-18 published in 2008. This first edition
constitutes a technical revision.
The text of this standard is based on the following documents:
FDIS Report on voting
47D/753A/FDIS 47D/758/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.

– 4 – 60191-6-18 © IEC:2010
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
A list of all the parts in the IEC 60191 series, under the general title Mechanical
standardization of semiconductor devices, can be found on the IEC website.
The committee has decided that the contents of this publication will remain unchanged until
the maintenance result date indicated on the IEC web site under "http://webstore.iec.ch" in
the data related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
The contents of the corrigendum of May 2010 have been included in this copy.

60191-6-18 © IEC:2010 – 5 –
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –

Part 6-18: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Design guide for ball grid array (BGA)

1 Scope
This part of IEC 60191 provides standard outline drawings, dimensions, and recommended
variations for all square ball grid array packages (BGA), whose terminal pitch is 1 mm or
larger.
2 Normative references
The following referenced documents are indispensable for the application of this document.
For dated references, only the edition cited applies. For undated references, the latest edition
of the referenced document applies.
IEC 60191-6, Mechanical standardization of semiconductor devices – Part 6: General rules for
the preparation of outline drawings of surface mounted semiconductor device packages
3 Terms and definitions
For the purposes of this document, the terms and definitions given IEC 60191 (series) and the
following apply.
3.1
ball grid array
BGA
package that has metal ba
...

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