Process management for avionics - Electronic components for aerospace, defence and high performance (ADHP) applications - Part 1: General requirements for high reliability integrated circuits and discrete semiconductors

IEC 62686-1:2012(E) defines the minimum requirements for general purpose "off the shelf" COTS (commercial off-the-shelf) integrated circuits and discrete semiconductors for ADHP (Aerospace, Defence and High Performance) applications. Applies to all components that can be operated in ADHP applications within the manufacturers' publicly available datasheet limits in conjunction with IEC/TS 62239-1. It may be used by other high performance and high reliability industries, at their discretion.

General Information

Status
Published
Publication Date
17-Sep-2012
Drafting Committee
Current Stage
DELPUB - Deleted Publication
Start Date
22-Apr-2015
Completion Date
26-Oct-2025
Ref Project

Relations

Technical specification
IEC TS 62686-1:2012 - Process management for avionics - Electronic components for aerospace, defence and high performance (ADHP) applications - Part 1: General requirements for high reliability integrated circuits and discrete semiconductors Released:9/18/2012
English language
62 pages
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IEC/TS 62686-1 ®
Edition 1.0 2012-09
TECHNICAL
SPECIFICATION
Process management for avionics – Electronic components for aerospace,
defence and high performance (ADHP) applications –
Part 1: General requirements for high reliability integrated circuits and discrete
semiconductors
IEC/TS 62686-1:2012(E)
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IEC/TS 62686-1 ®
Edition 1.0 2012-09
TECHNICAL
SPECIFICATION
Process management for avionics – Electronic components for aerospace,

defence and high performance (ADHP) applications –

Part 1: General requirements for high reliability integrated circuits and discrete

semiconductors
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
PRICE CODE
XB
ICS 03.100.50; 31.020; 49.060 ISBN 978-2-83220-345-3

– 2 – TS 62686-1 © IEC:2012(E)
CONTENTS
FOREWORD . 5
INTRODUCTION . 7
1 Scope . 8
2 Normative references . 8
3 Terms, definitions and abbreviations . 12
3.1 Terms and definitions . 12
3.2 Abbreviations . 14
4 Technical requirements . 16
4.1 General . 16
4.2 Procedures . 16
4.2.1 General . 16
4.2.2 Product discontinuance . 16
4.2.3 ESD protection during manufacture . 16
4.2.4 Specification control . 17
4.2.5 Traceability . 17
4.3 Product or process change notification (PCN) . 17
4.3.1 General . 17
4.3.2 Notification . 17
4.3.3 Notification details . 17
4.3.4 Notifiable changes . 18
4.4 Shipment controls . 18
4.4.1 General . 18
4.4.2 Shipping container and date code marking . 18
4.4.3 Date code remarking . 18
4.4.4 Inner container formation . 18
4.4.5 Date code age on delivery . 19
4.4.6 ESD marking . 19
4.4.7 MSL . 19
4.4.8 Lead-free marking . 19
4.4.9 Labels . 19
4.5 Electrical . 20
4.5.1 General . 20
4.5.2 Electrical test. 20
4.5.3 Electrical parameter assessment . 20
4.5.4 SDRAM memories . 20
4.5.5 Logic families . 21
4.5.6 Power MOSFETs . 21
4.5.7 Silicon rectifier diodes . 21
4.6 Mechanical . 21
4.6.1 General . 21
4.6.2 Device or shipping container marking . 21
4.6.3 Small packages . 21
4.6.4 Moisture sensitivity . 21
4.6.5 Robustness of hermetic seals . 21
4.6.6 Termination finishes . 22
4.7 Audit capability . 22

TS 62686-1 © IEC:2012(E) – 3 –
4.7.1 General . 22
4.7.2 Internal quality audits . 22
4.7.3 Subcontract manufacturing . 22
4.8 Quality assurance . 23
4.8.1 General . 23
4.8.2 Quality system . 23
4.8.3 Sampling plans . 23
4.8.4 Failure analysis support . 23
4.8.5 Outgoing quality . 23
4.9 Supplier performance monitoring by the user . 24
4.9.1 General . 24
4.9.2 Lot acceptance . 24
4.9.3 Suspension of deliveries . 25
4.9.4 Loss of approval . 25
4.9.5 AQL figures . 25
4.9.6 100 % screening . 25
4.9.7 Termination determination . 25
4.10 Qualification . 25
4.10.1 General . 25
4.10.2 Methodology . 26
4.10.3 Test samples . 27
4.10.4 Qualification categories . 28
4.10.5 Maintenance of qualification standard . 28
4.10.6 In-process test results . 28
4.10.7 Product monitor results . 32
4.10.8 References . 32
4.10.9 Qualification report . 32
4.10.10 Archiving . 32
4.10.11 Qualification by similarity . 32
4.10.12 Similarity assessment . 32
4.11 Reliability . 33
4.11.1 General . 33
4.11.2 Operating reliability . 33
4.11.3 Failure criteria . 33
4.11.4 Corrective action . 34
4.11.5 Warranty . 34
4.11.6 Suspension of certification . 34
4.11.7 Single event effects (SEE) . 34
4.12 Product monitor . 34
4.12.1 General . 34
4.12.2 Monitor programme . 34
4.12.3 Problem notification . 35
4.12.4 Data reporting . 35
4.12.5 Samples . 35
4.12.6 Production maturity factors . 35
4.12.7 Device dissipation . 35
4.12.8 Corrective action . 36
4.12.9 Product monitor results . 36
4.12.10 Accumulated test data . 36

– 4 – TS 62686-1 © IEC:2012(E)
4.13 Environmental, health and safety (EHS) . 36
4.13.1 General . 36
4.13.2 EHS compliance . 37
4.13.3 Device handling . 37
4.13.4 Device materials . 37
4.14 Shipping container . 37
4.14.1 General . 37
4.14.2 ESD requirements . 37
4.14.3 Magazine reuse . 38
4.14.4 Tubes . 38
4.14.5 Trays . 39
4.15 Compliance with internal standards . 39
Annex A (informative) Test code (TC) information . 40
Annex B (informative) Cross-reference to STACK specification S/0001 revision 14 . 54
Bibliography . 61

Table 1 – Label requirements . 20
Table 2 – Internal quality audit requirements . 22
Table 3 – Outgoing quality . 24
Table 4 – Incoming test. 24
Table 5 – Technology/family qualification and device qualification . 29
Table 6 – Operating life failure rates . 34
Table 7 – Production maturity factors . 35
Table 8 – Product monitor tests . 36
Table A.1 – Conditions of the DC over voltage stress method of JP001.01 or
IEC 62416 test . 42
Table A.2 – Examples of temperature acceleration factors . 44
Table A.3 – Test conditions . 45
Table A.4 – Relationship between write/erase cycle and data retention. 47

TS 62686-1 © IEC:2012(E) – 5 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
PROCESS MANAGEMENT FOR AVIONICS –
ELECTRONIC COMPONENTS FOR AEROSPACE, DEFENCE
AND HIGH PERFORMANCE (ADHP) APPLICATIONS –

Part 1: General requirements for high reliability
integrated circuits and discrete semiconductors

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
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with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
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3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
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8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
The main task of IEC technical committees is to prepare International Standards. However, a
technical committee may propose the publication of a Technical Specification when
• the required support cannot be obtained for the publication of an International Standard,
despite repeated efforts, or
• the subject is still under technical development or where, for any other reason, there is the
future but no immediate possibility of an agreement on an International Standard.
Technical specifications are subject to review within three years of publication to decide
whether they can be transformed into International Standards.
IEC/TS 62686-1 which is a Technical Specification, has been prepared by IEC technical
committee 107: Process management for avionics.

– 6 – TS 62686-1 © IEC:2012(E)
This Technical Specification cancels and replaces IEC/PAS 62686-1. It includes the following
significant technical changes with respect to IEC/PAS 62686-1:
a) adoption and modification of STACK Specification S/0001 revision 14, General
requirements for integrated circuits and discrete semiconductors;
b) addition of alternative IEC semiconductor test methods;
c) update of JEDEC semiconductor test methods;
d) update of Annex A additional JEDEC and IEC test information;
e) certification of the OCM according to ISO 9001;
f) addition of lead-free termination finish requirements;
g) addition of request for OCMs to make the data for device lifetime calculations available;
h) update of the IEC and JEDEC test methods for the following semiconductor wear-out
mechanisms: TDDB, electro-migration, HCL and NBTI;
i) addition of request for OCMs to provide single event effects (SEE) data;
j) update of moisture sensitivity level (MSL) marking requirements.

The text of this Technical Specification is based on the following documents:

Enquiry draft Report on voting
107/167/DTS 107/184/RVC
Full information on the voting for the approval of this technical specification can be found in
the report on voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
A list of all the parts in the IEC 62686 series, published under the general title Process
management for avionics – Electronic components for aerospace, defence and high
performance (ADHP) applications, can be found on the IEC website.
The committee has decided that the contents of this publication will remain unchanged until
the stability date indicated on the IEC web site under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• transformed into an International standard,
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
A bilingual version of this publication may be issued at a later date.

TS 62686-1 © IEC:2012(E) – 7 –
INTRODUCTION
This part of IEC 62686 includes all the requirements of STACK Specification S/0001 revision
14 and contains revisions for alternative IEC qualification test methods and additional test
information.
This Technical Specification complements IEC/TS 62564-1 which is used for ADHP
applications when additional manufacturer’s data is required beyond the publicly available
manufacturer published datasheets (e.g. when additional thermal performance data is
required for thermally challenging applications or when additional verification data are needed
for example to comply with the requirements of RTCA DO-254/EUROCAE ED-80 for complex
components for flight critical applications, etc.).
This Technical Specification can also be used to comply with the typical qualification
requirements of IEC/TS 62564-1. Further guidance is given in IEC/TS 62239-1.
NOTE With the adoption of the STACK Specification S/0001 revision 14 it will be possible for all existing STACK
certified manufacturers to be audited by IECQ under the new STACK-IECQ joint venture.

– 8 – TS 62686-1 © IEC:2012(E)
PROCESS MANAGEMENT FOR AVIONICS –
ELECTRONIC COMPONENTS FOR AEROSPACE, DEFENCE
AND HIGH PERFORMANCE (ADHP) APPLICATIONS –

Part 1: General requirements for high reliability
integrated circuits and discrete semiconductors

1 Scope
This part of IEC 62686 defines the minimum requirements for general purpose "off the shelf"
COTS (commercial off-the-shelf) integrated circuits and discrete semiconductors for ADHP
(Aerospace, Defence and High Performance) applications.
This Technical Specification applies to all components that can be operated in ADHP
applications within the manufacturers’ publicly available datasheet limits in conjunction with
IEC/TS 62239-1. It may be used by other high performance and high reliability industries, at
their discretion.
ADHP application requirements may not necessarily be fulfilled by this specification alone.
ADHP OEMs (original equipment manufacturers) may need to consider redesigning their
products or conducting further testing to verify suitability in ADHP applications using their
IEC/TS 62239-1 ECMP procedures. Alternatively a component in accordance with
IEC/TS 62564-1 may be more suitable.
2 Normative references
The following documents, in whole or in part, are normatively referenced in this document and
are indispensable for its application. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any
amendments) applies.
IEC 60749-3, Semiconductor devices – Mechanical and climatic test methods – Part 3:
External visual inspection
IEC 60749-4, Semiconductor devices – Mechanical and climatic test methods – Part 4: Damp
heat, steady state, highly accelerated stress test (HAST)
IEC 60749-5, Semiconductor devices – Mechanical and climatic test methods – Part 5:
Steady-state temperature humidity bias life test
IEC 60749-6, Semiconductor devices – Mechanical and climatic test methods – Part 6:
Storage at high temperature
IEC 60749-7, Semiconductor devices – Mechanical and climatic test methods – Part 7:
Internal moisture content measurement and the analysis of other residual gases
IEC 60749-8, Semiconductor devices – Mechanical and climatic test methods – Part 8:
Sealing
IEC 60749-9, Semiconductor devices – Mechanical and climatic test methods – Part 9:
Permanence of marking
TS 62686-1 © IEC:2012(E) – 9 –
IEC 60749-14, Semiconductor devices – Mechanical and climatic test methods – Part 14:
Robustness of terminations (lead integrity)
IEC 60749-15, Semiconductor devices – Mechanical and climatic test methods – Part 15:
Resistance to soldering temperature for through hole mounted devices
IEC 60749-17, Semiconductors devices – Mechanical and climatic tests – Part 17: Neutron
irradiation
IEC 60749-19, Semiconductor devices – Mechanical and climatic test methods – Part 19: Die
shear strength
IEC 60749-20, Semiconductor devices – Mechanical and climatic test methods – Part 20:
Resistance of plastic encapsulated SMDs to the combined effects of moisture and soldering
heat
IEC 60749-20-1, Semiconductor devices – Mechanical and climatic test methods – Part 20-1:
Handling, packing, labelling and shipping of surface-mount devices sensitive to the combined
effect of moisture and soldering heat
IEC 60749-21, Semiconductor devices – Mechanical and climatic test methods – Part 21:
Solderability
IEC 60749-22, Semiconductor devices – Mechanical and climatic test methods – Part 22:
Bond strength
IEC 60749-23, Semiconductor devices – Mechanical and climatic test methods – Part 23: High
temperature operating life
IEC 60749-25, Semiconductor devices – Mechanical and climatic test methods – Part 25:
Temperature cycling
IEC 60749-26, Semiconductor devices – Mechanical and climatic test methods – Part 26:
Electrostatic discharge (ESD) sensitivity testing – Human body model (HBM)
IEC 60749-29, Semiconductor devices – Mechanical and climatic test methods – Part 29:
Latch-up test
IEC 60749-32, Semiconductor devices – Mechanical and climatic test methods – Part 32:
Flammability of plastic-encapsulated devices (externally induced)
IEC 60749-33, Semiconductor devices – Mechanical and climatic test methods – Part 33:
Accelerated moisture resistance – Unbiased autoclave
IEC 60749-34, Semiconductor devices – Mechanical and climatic test methods – Part 34:
Power cycling
IEC 60749-38, Semiconductor devices – Mechanical and climatic test methods – Part 38: Soft
error test method for semiconductor devices with memory
IEC 61340-5-1, Electrostatics – Part 5-1: Protection of electronic devices from electrostatic
phenomena – General requirements
IEC/TS 62239-1, Process management for avionics – Management plan – Part 1: Preparation
and maintenance of an electronic components management plan

– 10 – TS 62686-1 © IEC:2012(E)
IEC 62374, Semiconductor devices – Time dependent dielectric breakdown (TDDB) test for
gate dielectric films
IEC 62374-1, Semiconductor devices – Part 1: Time dependent dielectric breakdown (TDDB)
test for inter-metal layers
IEC 62415, Semiconductor devices – Constant current electromigration test
IEC 62416, Semiconductor devices – Hot carrier test on MOS transistors
IEC 62417, Semiconductor devices – Mobile ion tests for metal-oxide semiconductor field
effect transistors (MOSFETs)
IEC/PAS 62483, Test method for measuring whisker growth on tin and tin alloy finishes
ISO 9001, Quality management systems – Requirements
ISO 14001, Environmental management systems – Requirements with guidance for use
ISO/TS 16949, Quality management systems – Particular requirements for the application of
ISO 9001:2008 for automotive production and relevant service part organizations
AS/EN/JISQ 9100, Aerospace series – Quality management systems – Requirements for
aviation, space and defense organisations
TL 9000, Quality management system
STACK S/0001 revision 14, General requirements for integrated circuits and discrete
semiconductors
EIA-471, Symbol and label for electrostatic sensitive devices
EIA-541, Packaging material standards for ESD sensitive items
ANSI/EIA-556, Outer shipping container label standard
JP001.01, Foundry process qualification guidelines (Wafer fabrication manufacturing sites)
JEP130A, Guidelines for packing and labeling of integrated circuits in unit container packing
JEP119, A procedure for executing SWEAT
JEP154, Guideline for characterizing solder bump electromigration under constant current and
temperature stress
JESD6, Measurement of small values of transistor capacitance
JESD201, Environmental acceptance requirements for tin whisker susceptibility of tin and tin
alloy surface finishes
___________
For the telecommunications industry.

TS 62686-1 © IEC:2012(E) – 11 –
JESD202, Method for characterising the electromigration failure time distribution of
interconnects under constant-current and temperature stress
JESD22-A101, Steady state temperature humidity bias life test
JESD22-A102, Accelerated moisture resistance – Unbiased autoclave
JESD22-A103, High temperature storage life
JESD22-A104, Temperature cycling
JESD22-A108, Temperature bias and operating life
JESD22-A109, Hermeticity
JESD22-A110, Highly accelerated temperature and humidity stress test (HAST)
JESD22-A117, Electrically erasable programmable ROM (EEPROM) program/erase
endurance and data retention test
JESD22-B100, Physical dimension
JESD22-B101, External visual
JESD22-B102, Solderability
JESD22-B105, Lead integrity
JESD22-B106, Resistance to solder shock for through-hole mounted devices
JESD22-B107, Marking permanency
JESD22-B116, Wire bond shear test
JESD46, Customer notification of product/process changes by solid state suppliers.
JESD47, Stress test driven qualification of integrated circuits
JESD48, Product discontinuance
JESD78, IC Latchup test
JESD85, Methods for calculating failure rates in units of FITS
JESD86, Electrical parameters assessment
JESD89, Measurement and reporting of alpha particle and terrestrial cosmic ray-
induced soft errors in semiconductor devices
JESD94, Application specific qualification using knowledge based test methodology
JESD213, Standard test method utilizing X-RAY-Fluorescence (XRF) for analyzing component
finishes and solder alloys to determine Tin (Sn)-Lead (Pb) content

– 12 – TS 62686-1 © IEC:2012(E)
JESD625, Requirements for handling electrostatic discharge sensitive (ESDS) devices
J-STD-020, Moisture/reflow sensitivity classification for non-hermetic solid state surface
mount devices
J-STD-033, Handling, packing, shipping and use of moisture/reflow sensitive surface mount-
devices
J-STD-609A.01, Marking and labeling of components, PCBs and PCBAs to identify lead (Pb),
lead-free (Pb-Free) and other attributes
ANSI/ESDA/JEDEC JS-001, Electrostatic discharge sensitivity testing – Human body model
(HBM) – Component level
MIL-STD-1580, Destructive physical analysis (DPA) for electronic, electromagnetic and
electromechanical parts
UL94, Tests for flammability of plastic materials for parts in devices and appliances
AEC-Q100, Stress test qualification for integrated circuits
AEC-Q101, Stress test qualification for automotive grade discrete semiconductors
RTCA DO-254/EUROCAE ED-80, Design assurance guidance for airborne electronic
hardware
3 Terms, definitions and abbreviations
For the purposes of this document, the following terms, definitions and abbreviations apply.
3.1 Terms and definitions
3.1.1
calendar days
continuous days, including weekends and holidays
3.1.2
container
outer shipping container consisting of one or more inner containers
3.1.3
customer
user
original equipment manufacturer (OEM) who procures integrated circuits and/or
semiconductor devices compliant to this technical specification and uses them to design,
produce, and maintain systems
3.1.4
data sheet
document prepared by the manufacturer that describes the electrical, mechanical, and
environmental characteristics of the component
3.1.5
deviation
user agreement to allow the delivery of a shipping lot which does not fully meet the
requirements of this specification

TS 62686-1 © IEC:2012(E) – 13 –
Note 1 to entry: Considered equivalent to concession for the purposes of this document.
3.1.6
device specification
document written by a user and agreed by the supplier or OCM
3.1.7
form
shape, arrangement of parts, visible aspect, mode in which a part exists or manifests itself,
the material an item is constructed from
3.1.8
fit
qualified and competent, correct size and scale
3.1.9
function
work that an item is designed to do without degrading reliability
3.1.10
incoming lot
one or more shipments of a device, grouped together for the purpose of incoming inspection
3.1.11
inner container
box or bag containing devices, either in magazines or bulk packaged
3.1.12
magazine
shipping container that feeds into automatic placement machines
EXAMPLE Sticks, tubes, matrix trays, tape/reel, etc.
3.1.13
microcircuit
component
device
electrical or electronic device that is not subject to disassembly without destruction or
impairment of design use and is a small circuit having a high equivalent circuit element
density
Note 1 to entry: It is considered as a single part composed of interconnected elements on or within a single
substrate to perform an electronic circuit function.
Note 2 to entry: This excludes printed wiring boards/printed circuit boards, circuit card assemblies and modules
composed exclusively of discrete electronic components.
3.1.14
moisture sensitivity level
MSL
rating indicating a component’s susceptibility to damage due to absorbed moisture when
subjected to reflow soldering
3.1.15
original component manufacturer
OCM
company specifying and manufacturing the electronic component

– 14 – TS 62686-1 © IEC:2012(E)
3.1.16
room temperature
temperature identified at 25 °C ± 5 °C in a room
3.1.17
semiconductor device
electronic devices in which the characteristic distinguishing electronic conduction takes place
with a semiconductor
EXAMPLE 1 Semiconductor diodes which are semiconductor devices having two terminals and exhibiting a
nonlinear voltage-current characteristic.
EXAMPLE 2 Transistors which are active semiconductor devices capable of providing power amplification and
having three or more terminals.
3.1.18
shipping lot
single lot of one or more containers received by a user
3.1.19
supplier
company identified by the logo or name marked on the device typically referred to as the
original component manufacturer (OCM)
3.1.20
termination
element of a component that connects it electrically and mechanically to the next level of
assembly
3.1.21
triboelectric charge
electrical charge generated by frictional movement or separation of two surfaces
3.2 Abbreviations
AC alternating current
ADHP aerospace, defense and high performance
AOQ average out-going quality
AQEC aerospace qualified electronic component
AQL acceptable quality level
ASIC application specific integrated circuit
BGA ball grid array
BPSG borophosphosilicate glass
CB certifying body
CFC chlorofluorocarbon
COTS commercial off–the-shelf
CMOS complementary metal oxide semiconductor
D semiconductor device
DC direct current
DRAM dynamic random access memory
DLA Defense Logistics Agency (see http://www.dscc.dla.mil/)
DPM defects per million
ECMP electronic component management plan
EHS Environmental Health and Safety

TS 62686-1 © IEC:2012(E) – 15 –
EMAS Eco-Management and Audit Scheme (established by the European Union)
ESD electrostatic sensitive damage
FFF form, fit and function
FIT failures in time
h hour
HAST highly accelerated stress test
HCI hot carrier injection
HTOL high temperature operating life
IECQ International Electrotechnical Commission Quality Assessment System for
Electronic Components
IC integrated circuit
I/O input and output
IR infra-red
LTB last time buy
LTPD lot tolerance percent defective
min minute
MSL moisture sensitivity level
NBTI negative bias temperature Instability
NVL non-volatile memory operating life
OCM original component manufacturer
OEM original equipment manufacturer
PC preconditioning
PCB printed circuit board
PCN product or process change notification
Pkg package
QA quality assurance
SDRAM synchronous dynamic random access memory
SEE single event effect
SEFI single event functional interrupt
SEL single event latchup
SEU single event upset
SER soft error rate
SMD surface mount device
SRAM static random access memory
Tamb ambient temperature
TC test code
THB temperature humidity bias
Topmin minimum operating temperature
Topmax maximum operating temperature
UCL upper control limit
VPR vapour
– 16 – TS 62686-1 © IEC:2012(E)
4 Technical requirements
4.1 General
The supplier or original component manufacturer (OCM), as defined in 3.15 and 3.19, shall be
Third Party ISO 9001 certified and shall provide the following minimum technical
requirements. The OCM may use the test methods and methodologies specified herein which
are based on IEC semiconductor test methods or any other equivalent test method for
example JEDEC test methods (see 4.10.2.3 and Annex A). Proposed equivalent test methods,
rationale and supporting data shall be reviewed and shall achieve the same end objectives as
specified herein. Use of such equivalent tests shall not be considered to be deviations or
waivers to the requirements of this specification.
Informative annexes are provided at the end of this specification and their content is subject
to change. Users of this specification are encouraged to review the latest data available
whenever referencing the content of these annexes:
• Annex A: test code information summarises all semiconductor test methods discussed
herein;
• Annex B: cross-reference to STACK specification S/0001 revision 14;
• Annex C: Bibliography.
4.2 Procedures
4.2.1 General
The OCM shall have the following procedures:
• product discontinuance (4.2.2);
• ESD protection during manufacture (4.2.3);
• specification control (4.2.4);
• traceability (4.2.5).
4.2.2 Product discontinuance
Notification shall be in accordance with JESD48 or equivalent with the exception of timing as
described in a) and b) below:
a) the OCM shall provide to the user a minimum of 12 months’ notice of last order dates for
single-source devices and 6 months for multi-sourced devices;
b) the OCM may give less than the specified notice period provided a mutually acceptable
extension (up to the specification limit) is negotiated with any user needing a different
period;
c) for custom ASIC devices, the normal procedure is to include discontinuation notice in the
purchase contract.
4.2.3 ESD protection during manufacture
All integrated circuits and discrete semiconductors are considered to be static sensitive and
shall be protected through the OCM’s manufacturing operation. OCMs shall ensure that
devices are not exposed to static damage and are not degraded or damaged due to static
discharge. IEC 61340-5-1 and JESD625 are examples of suitable standards for ESD
precautions in wafer fabrication and probe. OCMs holding current IECQ Certification for
compliance with IEC 61340-5-1 shall be deemed to have satisfied this requirement.

TS 62686-1 © IEC:2012(E) – 17 –
4.2.4 Specification control
The OCM shall:
a) when applicable, have central or local record of the user’s part number and specification,
against the product to be delivered;
NOTE 1 This applies to direct sales and not to parts sold through distribution.
b) ensure the specifications on the purchase documents have been reviewed and accepted
by personnel authorized to do so.
NOTE 2 This applies to custom and special orders only.
4.2.5 Traceability
Traceability shall be managed as follows:
a) the OCM shall have traceability for any device in a shipping lot through a route code, lot
code or other marking on the device or magazine or inner container to identify the
manufacturing route, e.g. groups of wafer lots, wafer fabrication location, assembly
location, test location, date code and/or lot code;
b) the information needed to interpret the code shall be available;
c) the procedure shall be available for inspection during audit.
4.3 Product or process change notification (PCN)
4.3.1 General
The OCM shall provide th
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