IEC 62899-503-3:2021

IEC 62899-503-3 ®
Edition 1.0 2021-08
INTERNATIONAL
STANDARD
colour
inside
Printed electronics –
Part 503-3: Quality assessment – Measuring method of contact resistance for the
printed thin film transistor – Transfer length method
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IEC 62899-503-3 ®
Edition 1.0 2021-08
INTERNATIONAL
STANDARD
colour
inside
Printed electronics –
Part 503-3: Quality assessment – Measuring method of contact resistance for

the printed thin film transistor – Transfer length method

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 29.045; 31.080.30 ISBN 978-2-8322-1013-8

– 2 – IEC 62899-503-3:2021 © IEC 2021
CONTENTS
FOREWORD . 3
INTRODUCTION . 5
1 Scope . 6
2 Normative references . 6
3 Terms and definitions . 6
4 Symbols and abbreviated terms . 7
5 Measuring method of contact resistance . 8
5.1 General . 8
5.2 Preparation of TEGs . 8
5.3 Measuring apparatus . 9
5.4 Environmental conditions and storage . 9
5.5 Measuring procedure . 9
5.6 Data analysis . 10
5.6.1 Calculation procedure of normalized resistances for each TEG. 10
5.6.2 Derivation procedure of contact resistance (R ) . 10
c
5.7 Report . 11
Annex A (informative)  Examples of sets of source and drain electrodes layouts in a
TEG . 12
Bibliography . 13

Figure 1 – Schematic structure of printed thin film transistors (TFTs) . 7
Figure 2 – Measurement configuration . 8
Figure 3 – Example of plots of the total resistance R versus the distance between the
source and drain electrode (channel length) L. 10
Figure A.1 – Example of a set of source and drain electrodes in a TEG . 12

INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
PRINTED ELECTRONICS –
Part 503-3: Quality assessment – Measuring method of contact
resistance for the printed thin film transistor – Transfer length method

FOREWORD
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International Standard IEC 62899-503-3 has been prepared by IEC technical committee 119:
Printed Electronics.
The text of this International Standard is based on the following documents:
FDIS Report on voting
119/359/FDIS 119/368/RVD
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.

– 4 – IEC 62899-503-3:2021 © IEC 2021
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available
at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are
described in greater detail at www.iec.ch/standardsdev/publications.
A list of all parts in the IEC 62899 series, published under the general title Printed electronics,
can be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under webstore.iec.ch in the data related to the
specific document. At this date, the document will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
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INTRODUCTION
In a thin film transistor (TFT), contact resistance occurs at the contacting interfaces at the gate,
source and drain electrodes, and the TFT semiconductor layer. While contact resistance is
negligible at the gate electrode, it reduces the effective voltage applied to the source and drain
electrodes. Therefore, the evaluation of the contact resistance can provide important insights
related to the performance characteristics of printed TFTs. Especially for printed electronics,
the contact resistance varies with the employed materials, printing processes and the time
series variation because the interface is made of simple contact obtained by additive
manufacturing instead of a junction obtained by vacuum deposition and etching processes.
Thus, the performance of printed TFTs is greatly influenced by the value of contact resistance.
A change of the contact resistance is therefore considered to be a key factor for a proper
interpretation of performance, lifetime, and reliability of a printed TFT.
To determine the contact resistance, several techniques, including but not limited to two-
terminal contact method, four-terminal contact method, six-terminal contact method, transfer
length method, and scanning probe potentiometer technique can be used. The transfer length
method (TLM) in particular has a practical advantage because the supplier can test discrete
devices, which have the same structure as the original printed TFT, on a common substrate
simultaneously. Furthermore, the TLM is cost-effective because the user can measure the
apparent contact resistance without using expensive equipment. Therefore, by using TLM, the
supplier and the user can exchange the important parameter of the TFT that is contact
resistance for reliability assessment as a part of their supply chain service.

– 6 – IEC 62899-503-3:2021 © IEC 2021
PRINTED ELECTRONICS –
Part 503-3: Quality assessment – Measuring method of contact
resistance for the printed thin film transistor – Transfer length method

1 Scope
This part of IEC 62899 specifies a measuring method of contact resistance for printed thin film
transistors (TFTs) by the transfer length method (TLM). The method requires the fabrication of
a test element group (TEG) with varying channel length (L) between source and drain electrodes.
The method is intended for quality assessment of TFT electrode contacts and is suited for
determining whether the contact resistance lies within a desired range.
2 Normative references
There are no normative references in this document.
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
ISO and IEC maintain terminological databases for use in standardization at the following
addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp
3.1
contact resistance
R
c
resistance at the interface between an electrode and the
semiconductor layer in a printed thin film transistor
Note 1 to entry: The resistance of the interface in this document involves not only the contacting area between the
electrode and the semiconductor layer but also the semiconductor layer between the cont
...