IEC 60747-9:2007
(Main)Semiconductor devices - Discrete devices - Part 9: Insulated-gate bipolar transistors (IGBTs)
Semiconductor devices - Discrete devices - Part 9: Insulated-gate bipolar transistors (IGBTs)
This part of IEC 60747 gives product specific standards for terminology, letter symbols, essential ratings and characteristics, verification of ratings and methods of measurement for insulated-gate bipolar transistors (IGBTs). The major changes with respect to the previous edition are mainly of an editorial nature.
Dispositifs à semiconducteurs - Dispositifs discrets - Partie 9: Transistors bipolaires à grille isolée (IGBT)
La présente partie de la CEI 60747 spécifie la terminologie, les symboles littéraux, les valeurs limites et caractéristiques essentielles, la vérification des valeurs limites ainsi que les méthodes de mesure pour les transistors bipolaires à grille isolée (IGBT, insulated-gate bipolar transistors). Les modifications principales par rapport à l'édition précédente sont principalement de nature éditoriale.
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Standards Content (Sample)
IEC 60747-9
Edition 2.0 2007-09
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Semiconductor devices – Discrete devices –
Part 9: Insulated-gate bipolar transistors (IGBTs)
Dispositifs à semiconducteurs – Dispositifs discrets –
Partie 9: Transistors bipolaires à grille isolée (IGBT)
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IEC 60747-9
Edition 2.0 2007-09
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Semiconductor devices – Discrete devices –
Part 9: Insulated-gate bipolar transistors (IGBTs)
Dispositifs à semiconducteurs – Dispositifs discrets –
Partie 9: Transistors bipolaires à grille isolée (IGBT)
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
PRICE CODE
INTERNATIONALE
XA
CODE PRIX
ICS 31.080.01; 31.080.30 ISBN 2-8318-9321-6
– 2 – 60747-9 © IEC:2007
CONTENTS
FOREWORD.5
1 Scope.7
2 Normative references .7
3 Terms and definitions .7
3.1 Graphical symbol of IGBT.7
3.2 General terms .8
3.3 Terms related to ratings and characteristics; voltages and currents.8
3.4 Terms related to ratings and characteristics; other characteristics.10
4 Letter symbols.12
4.1 General .12
4.2 Additional general subscripts.12
4.3 List of letter symbols .13
5 Essential ratings and characteristics.14
5.1 Ratings (limiting values) .14
5.2 Characteristics .15
6 Measuring methods .17
6.1 General .17
6.2 Verification of ratings (limiting values) .17
6.3 Methods of measurement .26
7 Acceptance and reliability.45
7.1 General requirements.45
7.2 Specific requirements.45
7.3 Type tests and routine tests .48
Annex A (normative) Measuring method for collector-emitter breakdown voltage .50
Annex B (normative) Measuring method for inductive load turn-off current under
specified conditions .52
Annex C (normative) Forward biased safe operating area (FBSOA) .54
Annex D (normative) Case non-rupture .58
Bibliography.59
Figure 1 – Circuit for measuring the collector-emitter voltages V , V , V .18
CES CER CEX
Figure 2 – Circuit for testing the gate-emitter voltage ±V .19
GES
Figure 3 – Circuit for measuring collector current.20
Figure 4 – Circuit for measuring peak collector current .21
Figure 5 – Test circuit of reverse safe operating area (RBSOA) .22
Figure 6 – Waveforms of gate-emitter voltage V and collector current I during
GE C
turn-off.22
Figure 7 – Circuit for testing safe operating pulse width at load short circuit (SCSOA1) .23
Figure 8 – Waveforms of gate-emitter voltage V , collector current I and voltage
GE C
V during load short-circuit condition SCSOA1 .24
CE
Figure 9 – Short-circuit safe operating area 2 (SCSOA2) .25
60747-9 © IEC:2007 – 3 –
Figure 10 – Waveforms during SCSOA2 .25
Figure 11 – Circuit for measuring the collector-emitter sustaining voltage V .26
CE*sus
Figure 12 – Operating locus of the collector current .27
Figure 13 – Circuit for measuring the collector-emitter saturation voltage V .28
CEsat
Figure 14 – Basic circuit for measuring the gate-emitter threshold voltage .29
Figure 15 – Circuit for measuring the collector cut-off current .30
Figure 16 – Circuit for measuring the gate leakage current .31
Figure 17 – Circuit for measuring the input capacitance.32
Figure 18 – Circuit for measuring the output capacitance.33
Figure 19 – Circuit for measuring the reverse transfer capacitance .34
Figure 20 – Circuit for measuring the gate charge.35
Figure 21 – Basic gate charge waveform .35
Figure 22 – Circuit for measuring the short-circuit internal gate resistance.36
Figure 23 – Circuit for measuring turn-on times and energy .37
Figure 24 – Waveforms during turn-on times.38
Figure 25 – Circuit for measuring turn-off times and energy .39
Figure 26 – Waveforms during turn-off times.39
Figure 27 – Circuit for measuring the variation with temperature of the collector-
emitter voltage V at a low measuring current I and for heating up the IGBT by a
CE C1
high current I .41
C2
Figure 28 – Typical variation of the collector-emitter voltage V at a low measuring
CE
current I with the case temperature T (when heated from outside, i.e. T = T ) .42
C1 c c vj
Figure 29 – Circuit for measuring thermal resistance and transient thermal impedance:
method 2 .43
Figure 30 – Typical variation of the gate-emitter threshold voltage V at a low
GE(th)
measuring current I with the case temperature T (when heated from the outside, i.e.
C2 c
T = T ) .44
c vj
Figure 31 – I , V and T with time .45
C GE c
Figure 32 – Circuit for high-temperature blockings .46
Figure 33 – Circuit for high-temperature gate bias .47
Figure 34 – Circuit for intermittent operating life .47
Figure 35 – Expected number of cycles versus temperature rise ΔT .48
vj
Figure A.1 – Circuit for testing the collector-emitter breakdown voltage .50
Figure B.1 – Measuring circuit for inductive load turn-off current.52
Figure B.2 – Waveforms of collector current I and collector voltage V during turn-off .52
C CE
Figure C.1 – Test circuit of forward biased safe operating area (method 1) .54
Figure C.2 – Typical ΔV versus collector-emitter voltage V characteristics.55
CE CE
Figure C.3 – Typical forward biased safe operating area.55
Figure C.4 – Circuit testing forward biased safe operating area (method 2).56
Figure C.5 – Latching mode operation waveforms.57
Figure C.6 – Latching mode I-V characteristic.57
– 4 – 60747-9 © IEC:2007
Table 1 – Acceptance-defining characteristics .17
Table 2 – Acceptance-defining characteristics for endurance and reliability tests.46
Table 3 – Minimum type and routine tests for IGBTs when applicable .49
60747-9 © IEC:2007 – 5 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
___________
SEMICONDUCTOR DEVICES –
DISCRETE DEVICES –
Part 9: Insulated-gate bipolar transistors (IGBTs)
FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
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indispensable for the correct application of this publication.
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patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 60747-9 has been prepared by subcommittee 47E: Discrete
semiconductor devices, of IEC technical committee 47: Semiconductor devices.
This second edition of IEC 60747-9 cancels and replaces the first edition (1998) and its
amendment 1 (2001).
The main changes with respect to the previous edition are listed below.
a) Clause 3 was amended by adding terms that should be included.
b) Clauses 4 and 5 were amended by suitable additions and deletions that should be
included.
c) Clauses 6 and 7 in Amendment 1 were combined into Clause 6 with suitable additions and
corrections that should be included.
d) Clause 8 in Amendment 1 was renumbered as Clause 7.
This standard is to be read in conjunction with IEC 60747-1.
– 6 – 60747-9 © IEC:2007
The text of this standard is based on the following documents:
FDIS Report on voting
47E/333/FDIS 47E/341/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
A list of all parts of the IEC 600747 series, under the general title: Semiconductor devices –
Discrete devices, can be found on the IEC website.
The committee has decided that the contents of this publication will remain unchanged until
the maintenance result date indicated on the IEC web site under "http://webstore.iec.ch" in
the data related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
60747-9 © IEC:2007 – 7 –
SEMICONDUCTOR DEVICES –
DISCRETE DEVICES –
Part 9: Insulated-gate bipolar transistors (IGBTs)
1 Scope
This part of IEC 60747 gives product specific standards for terminology, letter symbols,
essential ratings and characteristics, verification of ratings and methods of measurement for
insulated-gate bipolar transistors (IGBTs).
2 Normative references
The following referenced documents are indispensable for the application of this document.
For dated references, only the edition cited applies. For undated references, the latest edition
of the referenced document (including any amendments) applies.
IEC 60747-1:2006, Semiconductor devices – Part 1: General
IEC 60747-2, Semiconductor devices – Discrete devices and integrated circuits – Part 2:
Rectifier diodes
IEC 60747-6, Semiconductor devices – Part 6: Thyristors
IEC 61340 (all parts), Electrostatics
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
3.1 Graphical symbol of IGBT
The graphical symbol as shown below is used in this edition of IEC 60747-9.
C
G
E
Graphical symbol
NOTE Only the graphical symbol for N-channel IGBT is used in this standard. It equally applies for the
measurement of P-channel devices. In the case of P-channel devices polarity must be adapted.
– 8 – 60747-9 © IEC:2007
3.2 General terms
3.2.1
insulated-gate bipolar transistor
IGBT
transistor having a conduction channel and a PN junction. The current flowing through the
channel and the junction is controlled by an electric field resulting from a voltage applied
between the gate and emitter terminals
See IEV 521-04-05.
NOTE With collector-emitter voltage applied, the PN junction is forward biased.
3.2.2
N-channel IGBT
IGBT that has one or more N-type conduction channels
See IEV 521-05-06.
3.2.3
P-channel IGBT
IGBT that has one or more P-type conduction channels
See IEV 521-04-05.
3.2.4
collector current (of an IGBT)
I
c
direct current that is switched (controlled) by the IGBT
3.2.5
collector terminal, collector (of an IGBT)
C
for an N-channel (a P-channel) IGBT, the terminal to (from) which the collector current flows
from (to) the external circuit
See IEV 521-07-05 and IEV 521-05-02.
3.2.6
emitter terminal, emitter (of an IGBT)
E
for an N-channel (a P-channel) IGBT, the terminal from (to) which the collector current flows
to (from) the external circuit
See IEV 521-07-04.
3.2.7
gate terminal, gate (of an IGBT)
G
terminal to which a voltage is applied against the emitter terminal in order to control the
collector current
See IEV 521-07-09.
3.3 Terms related to ratings and characteristics; voltages and currents
3.3.1
collector-emitter (d.c.) voltage
voltage between collector and emitter
3.3.2
collector-emitter voltage with gate-emitter short-circuited
V
CES
collector-emitter voltage at which the collector current has a specified low (absolute) value
with gate-emitter short-circuited
60747-9 © IEC:2007 – 9 –
3.3.3
collector-emitter sustaining voltage
V
CE*sus
collector-emitter breakdown voltage at relatively high values of collector current where the
breakdown voltage is relatively insensitive to changes in collector current, for a specified
termination between gate and emitter terminals
NOTE 1 The specified termination between gate and emitter terminals is indicated in the letter symbol by the third
subscript ‘*’; see 4.1.2 of IEC 60747-7.
NOTE 2 When necessary, a suitable qualifier is added to the basic term to indicate a specific termination between
gate and emitter terminals.
Example: Collector-emitter sustaining voltage with gate and emitter terminals short-circuited V .
CESsus
NOTE 3 The basic term may be shortened if the meaning is clear from the letter symbol used.
Example: Collector-emitter sustaining voltage V .
CERsus
NOTE 4 This term is important for high-voltage devices, for example more than 4 kV.
3.3.4
collector-emitter breakdown voltage
V
(BR)CES
voltage between collector and emitter above which the collector current rises steeply, with
gate to emitter short-circuited
See IEV 521-05-06.
3.3.5
collector-emitter saturation voltage
V
CEsat
collector-emitter voltage under conditions of gate-emitter voltage at which the collector current
is essentially independent of the gate-emitter voltage
3.3.6
gate-emitter (d.c.) voltage
voltage between gate and emitter
3.3.7
gate-collector (d.c.) voltage
voltage between gate and collector
3.3.8
gate-emitter threshold voltage
V
GE(th)
gate-emitter voltage at which the collector current has a specified low (absolute) value
3.3.9
electrostatic discharge voltage
voltage that can be applied to the gate terminal without destruction of the isolation layer
See IEV 521-05-27
3.3.10
collector cut-off current
collector current at a specific collector-emitter voltage below the breakdown region and gate
off-state
3.3.11
collector current
current through collector
– 10 – 60747-9 © IEC:2007
3.3.12
tail current
I
CZ
collector current during the tail time
3.3.13
gate leakage current
I
GES
leakage current into the gate terminal at a specified gate-emitter voltage with the collector
terminal short-circuited to the emitter terminal
3.3.14
safe operating area
SOA
collector current versus collector emitter voltage where the IGBT is able to turn-on and turn-
off without failure
3.3.14.1
forward bias safe operating area
FBSOA
collector current versus collector emitter voltage where the IGBT is able to turn-on and is able
to be on-state without failure
3.3.14.2
reverse bias safe operating area
RBSOA
collector current versus collector emitter voltage where the IGBT is able to turn-off without
failure
3.3.14.3
short circuit safe operating area
SCSOA
short circuit duration and collector emitter voltage where the IGBT is able to turn-on and turn-
off without failure
3.4 Terms related to ratings and characteristics; other characteristics
3.4.1
input capacitance
C
ies
capacitance between the gate and emitter terminals with the collector terminal short-circuited
to the emitter terminal for a.c.
3.4.2
output capacitance
C
oes
capacitance between the collector and emitter terminals with the gate terminal short-circuited
to the emitter terminal for a.c.
3.4.3
reverse transfer capacitance
C
res
capacitance between the collector and gate terminals
3.4.4
gate charge
Q
G
charge required to raise the gate-emitter voltage from a specified low to a specified high level
60747-9 © IEC:2007 – 11 –
3.4.5
internal gate resistance
r
g
internal series resistance
3.4.6
turn-on energy (per pulse)
E
on
energy dissipated inside the IGBT during the turn-on of a single collector current pulse
NOTE The corresponding turn-on power dissipation under periodic pulse conditions is obtained by multiplying E
on
by the pulse frequency.
3.4.7
turn-off energy (per pulse)
E
off
energy dissipated inside the IGBT during the turn-off time plus the tail time of a single
collector current pulse
NOTE The corresponding turn-off power dissipation under periodic pulse conditions is obtained by multiplying E
off
by the pulse frequency.
3.4.8
turn-on delay time
t , t
d(on d
)
time interval between the beginning of a voltage pulse across the input terminals which
switches the IGBT from the off-state to the on-state and the beginning of the rise of the
collector current
NOTE Usually, the time is measured between points corresponding to 10 % of the input and output pulse
amplitudes.
3.4.9
rise time
t
r
time interval between the instants at which the rise of the collector current reaches specified
lower and upper limits, respectively, when the IGBT is being switched from the off-state to the
on-state
NOTE Usually the lower and upper limits are 10 % and 90 % of the pulse amplitude.
3.4.10
turn-on time
t
on
sum of the turn-on delay time and the rise time
3.4.11
turn-off delay time
, t
t
d(off) s
time interval between the end of the voltage pulse across the input terminals which has held
the IGBT in its on-state and the beginning of the fall of the collector current when the IGBT is
switched from the on-state to the off-state
NOTE Usually, the time is measured between points corresponding to 90 % of the input and output pulse
amplitudes.
3.4.12
fall time
t
f
time interval between the instants at which the fall of the collector current reaches specified
upper and lower limits, respectively, when the IGBT is switched from the on-state to the
off-state
NOTE Usually, the upper and lower limits are 90 % and 10 % of the pulse amplitude.
– 12 – 60747-9 © IEC:2007
3.4.13
turn-off time
t
off
sum of the turn-off delay time and the fall time
3.4.14
tail time
t
z
time interval from the end of the turn-off time to the instant at which the collector current has
fallen to 2 % or lower specified value
4 Letter symbols
4.1 General
General letter symbols for IGBTs are defined in Clause 4 of IEC 60747-1.
4.2 Additional general subscripts
C,c collector
E,e emitter
G,g gate
sat saturation
th threshold
Z,z tail
S termination with a short circuit
R termination with a resistor
X termination with specified gate emitter voltage
sus sustaining
60747-9 © IEC:2007 – 13 –
4.3 List of letter symbols
Name and designation Letter symbol
4.3.1 Voltages
Collector-emitter voltage V
CE
Collector-emitter voltage, gate-emitter short-circuited V
CES
Collector-emitter sustaining voltage V
CE*sus
Collector-emitter breakdown voltage, gate-emitter short-circuited V
(BR)CES
Collector-emitter saturation voltage V
CEsat
Gate-emitter voltage V
GE
Gate-emitter voltage, collector-emitter short-circuited V
GES
Gate-emitter threshold voltage V
GE(th)
Collector-gate voltage, gate-emitter resistance specified V
CGR
4.3.2 Currents
Collector current I
C
Peak collector current I
CM
Repetitive peak collector current I
CRM
Collector-emitter cut-off current, gate-emitter short-circuited I
CES
Tail current I
CZ
Gate current I
G
Gate leakage current, collector-emitter short-circuited I
GES
4.3.3 Other electrical magnitudes
Input capacitance C
ies
Output capacitance C
oes
Reverse transfer capacitance C
res
Gate charge Q
G
Internal gate resistance r
g
Turn-on power dissipation P
on
Turn-on energy E
on
Turn-off power dissipation P
off
Turn-off energy E
off
Conducting state power dissipation P
cond
Conducting state energy E
cond
Total power dissipation P
tot
4.3.4 Time
Tail time
t
z
4.3.5 Thermal magnitudes
Thermal resistance junction to heatsink R
th(j-c)
Transient thermal impedance junction to heatsink Z
th(j-c)
– 14 – 60747-9 © IEC:2007
5 Essential ratings and characteristics
5.1 Ratings (limiting values)
Ratings shall be valid for the whole range of operating conditions as stated for the particular
device, with reference to a curve where appropriate.
5.1.1 Ambient or case or virtual junction operating temperature (T or T or T )
a c vj
Maximum and minimum values.
5.1.2 Storage temperature (T )
stg
Maximum and minimum values.
5.1.3 Collector-emitter voltage with gate-emitter short-circuited (V )
CES
Maximum value.
NOTE This rating should not be less than V . (See 5.2.1.)
(BR)CES
5.1.4 Gate-emitter voltages with collector emitter short circuit (V )
GES
Maximum positive and negative values.
5.1.5 Continuous collector current (I )
C
Maximum value.
5.1.6 Repetitive peak collector current (I )
CRM
Maximum value for rectangular pulses with specified pulse duration and duty cycle.
5.1.7 Non-repetitive peak collector current (I )
CSM
Maximum value for a rectangular pulse with specified pulse duration.
5.1.8 Total power dissipation (P )
tot
Maximum value with a derating curve where appropriate.
5.1.9 Maximum safe operating area
Diagram showing the maximum rated collector current I after turn-on, which may not be
c
exceeded, even under best cooling conditions, as a function of the collector-emitter voltage
V before and during turn-on for direct current and various pulse durations at 25 °C case
CE
temperature.
5.1.10 Maximum reverse biased safe operating area (RBSOA)
Diagram showing the area of collector current I and collector-emitter voltage V which the
C CE
IGBTs will sustain simultaneously for a short period of time during turn-off without failure
under the specified conditions.
5.1.11 Maximum short circuit safe operating area (SCSOA)
SCSOA is given by a pair of values of short-circuit duration t and collector-emitter voltage
psc
V which may not be exceeded under the load short-circuit conditions. The device may be
CE
turned on and turned off again for shorting a voltage source without failure.
60747-9 © IEC:2007 – 15 –
5.1.12 Maximum terminal current (I ) (where appropriate)
tRMS
Maximum r.m.s. value of the current through the main terminal.
5.1.13 Mounting force (F)
Maximum and minimum values, where appropriate.
5.1.14 Mounting torque (M)
Maximum and minimum values, where appropriate.
5.2 Characteristics
Characteristics shall be given at T = 25 °C except where otherwise stated; and at one other
vj
specified temperature.
5.2.1 Collector-emitter breakdown voltage (V )
(BR)CES
Minimum value with gate-emitter short-circuited and at specified collector current.
5.2.2 Collector-emitter sustaining voltage (V )
CE*sus
Where appropriate, minimum value at specified collector current and gate conditions.
5.2.3 Collector-emitter saturation voltage (V )
CEsat
Maximum value at specified gate voltage and collector current.
5.2.4 Gate-emitter threshold voltage (V )
GE(th)
Minimum and maximum values at specified collector-emitter voltage and collector current.
5.2.5 Collector-emitter cut-off current (I )
CE*
Maximum value at specified high collector-emitter voltage and for a specified termination
between gate and emitter terminals.
5.2.6 Gate leakage current (l )
GES
Maximum value at the maximum rated gate-emitter voltage.
5.2.7 Capacitances
Typical values of the following, at specified collector-emitter voltage and test frequency.
5.2.7.1 Input capacitance (C )
ies
Typical input capacitance as small-signal value, in common-emitter configuration, under
specified bias conditions and at a specified frequency, with the output short-circuited to a.c.
5.2.7.2 Output capacitance (C )
oes
Typical output capacitance as small-signal value, in common-emitter configuration, under
specified bias conditions and at a specified frequency, with the input short-circuited to a.c.
– 16 – 60747-9 © IEC:2007
5.2.7.3 Reverse transfer capacitance (C )
res
Typical reverse transfer capacitance as small-signal value, in common-emitter configuration,
under specified bias conditions and at a specified frequency.
5.2.8 Gate charge (Q )
G
Typical value at specified values of gate-emitter voltage, collector-emitter voltage before turn-
on and collector current after turn-on.
5.2.9 Internal gate resistance (r )
g
Maximum and/or typical value with collector short circuited to emitter in a.c. at the specified
values of gate -emitter voltage, collector -emitter voltage and frequency
5.2.10 Turn-on energy (E )
on
Maximum value per pulse under the following specified conditions:
• collector-emitter voltage before turn-on;
• collector current after turn-on;
• load conditions;
• gate-emitter voltage;
• resistance in the gate-emitter circuit;
• case or ambient temperature or virtual junction temperature.
5.2.11 Turn-off energy (E )
off
Maximum value per pulse under the following specified conditions:
• collector current before turn-off;
• collector-emitter voltage after turn-off;
• load conditions;
• gate-emitter voltage;
• resistance in the gate-emitter circuit;
• case or ambient temperature or virtual junction temperature.
5.2.12 Switching times
5.2.12.1 Turn-on delay time (t ) and rise time (t )
d(on) r
Maximum values under the following specified conditions:
• collector-emitter voltage before turn-on;
• collector current after turn-on,
• load conditions;
• gate-emitter voltage;
• resistance in the gate-emitter circuit.
5.2.12.2 Turn-off delay time (t ), faIl time (t ) and tail time (t )
d(off) f z
Maximum values with a free-wheeling diode connected under the following specified
conditions:
60747-9 © IEC:2007 – 17 –
• collector-emitter voltage after turn-off;
• collector current before turn-off;
• load conditions;
• gate-emitter voltage;
• resistance in the gate-emitter circuit.
5.2.13 Thermal resistance junction to case (R )
th(j-c)
Maximum value for case-rated IGBTs.
5.2.14 Thermal resistance junction to ambient (R )
th(j-a)
Maximum value for ambient-rated IGBTs.
5.2.15 Transient thermal impedance junction to case (Z )
th(j-c)
For case-rated IGBTs, diagram showing the maximum values against the time elapsed after a
step change in power dissipation, or analytical elements.
5.2.16 Transient thermal impedance junction to ambient (Z )
th(j-a)
For ambient-rated IGBTs, diagram showing the maximum values against the time elapsed
after a step change in power dissipation.
6 Measuring methods
6.1 General
The polarities shown in these circuits are applicable to N channel devices. The circuits can be
adapted for P channel devices by inverting the polarities of the meters, generators and power
supplies. The handling precautions given in IEC 61340 and the measuring method procedures
given in 60747-1 apply.
6.2 Verification of ratings (limiting values)
After the following test, confirm the IGBT characteristics specified in Table 1.
Table 1 – Acceptance-defining characteristics
Characteristics Acceptance criteria
I I < USL
CES CES
I I < USL
GES GES
V V < USL
CE(sat) CE(sat)
V V < USL or > LSL
GE(th) GE(th)
NOTE USL: upper specification limit
LSL: lower specification limit
6.2.1 Collector-emitter voltages (V , V , V )
CES CER CEX
6.2.1.1 Purpose
To verify that an IGBT withstands the rated collector-emitter voltages V , V or V
CES CER CEX
under specified conditions.
– 18 – 60747-9 © IEC:2007
6.2.1.2 Circuit diagram (see Figure 1)
I R
R 1
I 1
C
A
D
C
V
V DUT
V C
CER CES
V
CEX
+
V
V
CE
G
V
V CC ~
CC
-
-
R
V V 2
GG
E
+
d.c. method a.c. method
IEC 1859/07
DUT (device under test)
Figure 1 – Circuit for measuring the collector-emitter voltages V , V , V
CES CER CEX
6.2.1.3 Circuit description
V and V are the voltage supply. R is a circuit protection resistor.
CC GG 1
6.2.1.4 Test procedure
There are two methods, i.e. the d.c. method and the a.c. method, with circuits according to
Figure 1.
The specified conditions between gate and emitter shall be applied. The collector-emitter
voltage is set to the specified value.
6.2.1.5 Specified conditions
– Collector-emitter voltage V
CE
– Ambient or case or virtual junction temperature T or T or T
a c vj
– V : gate-emitter voltage –V
CEX GG
– V : resistor connected between gate and emitter
CER
– V : short circuit between gate and emitter
CES
6.2.2 Gate-emitter voltage with collector emitter short circuit (±V )
GES
6.2.2.1 Purpose
To verify that an IGBT withstands the rated gate emitter voltage ±V under specified
GE
conditions.
60747-9 © IEC:2007 – 19 –
6.2.2.2 Circuit diagram (see Figure 2)
C
DUT
I
G
R
G
A
E
±V
GG
V
V
GE
IEC 1860/07
Figure 2 – Circuit for testing the gate-emitter voltage ±V
GES
6.2.2.3 Circuit description
V is the voltage supply. R is a circuit protection resistor.
GG
6.2.2.4 Test procedure
is set to the specified value. A small protective resistor R is to
The gate-emitter voltage V
GE
be provided.
6.2.2.5 Specified conditions
– Ambient or case or virtual junction temperature T or T or T
a c vj
– Gate-emitter leakage current I
GES
– Short circuit between collector and emitter
6.2.3 Maximum collector current (I )
C
6.2.3.1 Purpose
To verify that the collector current capability of an IGBT is not less than the maximum rated
value I under specified conditions.
C
– 20 – 60747-9 © IEC:2007
6.2.3.2 Circuit diagram (see Figure 3)
I
C
R
A
DUT
C
+
R
G
V
CC
-
+
E
V
V
GE
V
GG
-
IEC 1861/07
Figure 3 – Circuit for measuring collector current
6.2.3.3 Circuit description
V and V are the voltage supply. R is a circuit protection resistor.
CC GG 1
6.2.3.4 Test procedure
The temperature (T or T ) and the gate-emitter voltage are set and kept to the specified
a c
values. The supply voltage (V ) is increased until I reaches the specified value. The
CC C
thermal equilibrium might be reached.
6.2.3.5 Specified conditions
– Ambient or case or virtual junction temperature T or T
a c
– Collector current I
C
– Gate-emitter voltage V
GE
6.2.4 Maximum peak collector current (I )
CM
6.2.4.1 Purpose
To verify that the peak collector current capability of an IGBT is not less than the maximum
rated value I under specified conditions.
CM
60747-9 © IEC:2007 – 21 –
6.2.4.2 Circuit diagram (see Figure 4)
R
I 1
C
DUT
C
R
+
G
V
CC
+
E
V -
V G
GG
-
IEC 1862/07
Figure 4 – Circuit for measuring peak collector current
6.2.4.3 Circuit description
V is the voltage supply and V is the gate pulse generator. R is a circuit protection
CC GG 1
resistor.
6.2.4.4 Test procedure
The temperature (T or T or T ) and the gate-emitter voltage are set and kept at the
a c vj
specified values. The supply voltage (V ) is increased until I reaches the specified value.
cc C
6.2.4.5 Specified conditions
– Ambient or case or virtual junction temperature T or T or T
a c vj
– Collector current I
CM
– Gate emitter voltage, pulse width and duty cycle
6.2.5 Maximum reverse biased safe operating area (RBSOA)
6.2.5.1 Purpose
To verify that the IGBT operates reliably without failure in RBSOA.
– 22 – 60747-9 © IEC:2007
6.2.5.2 Circuit diagram and waveforms (see Figure 5 and Figure 6)
L
s
V
C
I
C
L
D
C
DUT
S
G
+ +
R
R E
V V
- CC
CE(clamp)
V
G
+
-
V
GG2
-
V
GG1
+
-
IEC 1863/07
Figure 5 – Test circuit of reverse safe operating area (RBSOA)
v
GE
V
GE1
t
V
GE2
IEC 1864/07
v
CE
0,9 I
CP
i
C
V
CE(clamp)
I
CP
t
IEC 1865/07
Figure 6 – Waveforms of gate-emitter voltage V and collector current I
GE C
during turn-off
6.2.5.3 Circuit description and requirements
The value of load inductance L shall be high enough to maintain the specified I and
C
V to the DUT for least the whole duration of the fall and tail time. V is a low voltage
CE(clamp) CC
to supply the on-state collector current I . V must be capable of carrying a reverse
C CE(clamp)
current equal to I , while maintaining the specified voltage. Alternatively, a single voltage
C
source capable of supplying the special I at the specified V and with diode D in parallel
C CE
with inductor L may be used. R and R are circuit protection resistors. L is an inductor
s
1 2
representing the maximum permitted unclamped stray inductance.
60747-9 © IEC:2007 – 23 –
6.2.5.4 Test procedure
DUT is turned off at specified I .
C
V and I are
...








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