Mechanical standardization of semiconductor devices - Part 6-20: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ)

IEC 60191-6-20:2010 specifies methods to measure package dimensions of small outline J-lead-packages (SOJ), package outline form E in accordance with IEC 60191-4.

Normalisation mécanique des dispositifs à semiconducteurs - Partie 6-20: Règles générales pour la préparation des dessins d'encombrement des boîtiers pour dispositifs à semiconducteurs pour montage en surface - Méthodes de mesure pour les dimensions des boîtiers à sortie en J (SOJ) de faible encombrement

La CEI 60191-6-20:2010 spécifie les méthodes destinées à mesurer les dimensions des boîtiers à sortie en J (SOJ) de faible encombrement, l'encombrement des boîtiers de forme E conformément à la CEI 60191-4.

General Information

Status
Published
Publication Date
29-Aug-2010
Drafting Committee
WG 2 - TC 47/SC 47D/WG 2
Current Stage
PPUB - Publication issued
Start Date
30-Sep-2010
Completion Date
30-Aug-2010

Overview

IEC 60191-6-20:2010 is an international standard that provides mechanical standardization rules for semiconductor devices, specifically focusing on the measurement methods for package dimensions of small outline J-lead packages (SOJ). The standard is part of the IEC 60191 series which addresses general rules for the preparation of outline drawings for surface-mounted semiconductor device packages.

This standard governs the accurate mechanical measurement techniques needed to validate the package dimensions of SOJ devices, which are crucial in ensuring consistent manufacturing quality, reliable device performance, and interoperability in electronic assemblies. It aligns with IEC 60191-4 for package outline form E and sets out normative principles widely adopted by semiconductor manufacturers, quality assurance teams, and designers.

Key Topics

1. Measurement Scope and Methods

  • Definition of package dimensions such as mounting height (A), stand-off (A1), body thickness (A2), lead widths (bp, b1), and lead thickness (c, c1).
  • Practical measurement techniques applicable either manually or automatically, using calibrated instruments like micrometers and slide calipers.
  • Measurement of the package while mounted on a printed circuit board (PCB) to replicate real-world conditions.
  • Alternative measurement methods permitted if they provide equivalent accuracy and ease of use.

2. Outline Drawings and Reference Characters

  • Usage of detailed SOJ outline drawings to define sample points for measurement, including lead shape, seating plane, and terminal positions.
  • Clear identification of critical dimensions and tolerances represented graphically for precision manufacturing.

3. Detailed Lead and Body Dimension Measurements

  • Methods to measure soldered portion length (Lp), positional tolerance of terminal centers (x), and lead coplanarity (y).
  • Instructions for handling dimensions that are difficult to measure directly, such as those requiring package destruction, by calculating or estimating representative values.

4. Tolerances and Accuracy Assessment

  • Procedures to analyze the positional tolerance of terminals and soldered portion center positioning within specified tolerance limits.
  • Guidance on acceptable deviations to maintain device functionality and mechanical compatibility with PCBs and sockets.

Practical Applications

Semiconductor Manufacturing

IEC 60191-6-20:2010 serves as a benchmark for manufacturers to ensure SOJ packages are fabricated to precise dimensional standards, supporting consistency, and interchangeability in mass semiconductor production.

Quality Control and Inspection

Inspectors and quality assurance engineers utilize the standard’s measurement methods to verify that semiconductor devices meet specification requirements before shipping, minimizing field failures due to mechanical incompatibilities.

Electronic Design and Assembly

Design engineers apply these measurement standards during PCB layout and device selection to guarantee proper fit and solder joint reliability of SOJ surface-mounted devices, optimizing device mounting height and lead positioning.

Supplier and Customer Communication

Clear mechanical dimensioning guided by IEC 60191-6-20 enables effective technical communication between semiconductor vendors and their clients, facilitating seamless integration in electronic systems.

Related Standards

  • IEC 60191-4: Coding system and classification into forms of package outlines for semiconductor device packages - complements this standard by defining the form E package outlines which SOJ packages adhere to.
  • IEC 60191-6: General rules for the preparation of outline drawings for surface mounted semiconductor device packages - provides overarching rules for the preparation and interpretation of package outline drawings relevant to this part.
  • Other parts of the IEC 60191 series focus on mechanical standardization of various semiconductor device packages, supporting consistency across different device types.

Keywords

  • IEC 60191-6-20
  • Small Outline J-lead packages (SOJ)
  • Semiconductor device mechanical standardization
  • Surface mounted package outline
  • Measuring methods for SOJ dimensions
  • Package mounting height A
  • Lead width and thickness measurement
  • Terminal positional tolerance
  • Surface mount technology standards
  • Electronic device package dimension standards

IEC 60191-6-20:2010 ensures standardized, reliable measurements for SOJ semiconductor packages - fundamental for high-quality electronic manufacturing and design. Applying these measuring methods improves accuracy in package dimensioning, supporting both component manufacturers and electronic system integrators worldwide.

Standard

IEC 60191-6-20:2010 - Mechanical standardization of semiconductor devices - Part 6-20: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ)

English and French language
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Frequently Asked Questions

IEC 60191-6-20:2010 is a standard published by the International Electrotechnical Commission (IEC). Its full title is "Mechanical standardization of semiconductor devices - Part 6-20: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ)". This standard covers: IEC 60191-6-20:2010 specifies methods to measure package dimensions of small outline J-lead-packages (SOJ), package outline form E in accordance with IEC 60191-4.

IEC 60191-6-20:2010 specifies methods to measure package dimensions of small outline J-lead-packages (SOJ), package outline form E in accordance with IEC 60191-4.

IEC 60191-6-20:2010 is classified under the following ICS (International Classification for Standards) categories: 31.080.01 - Semiconductor devices in general. The ICS classification helps identify the subject area and facilitates finding related standards.

You can purchase IEC 60191-6-20:2010 directly from iTeh Standards. The document is available in PDF format and is delivered instantly after payment. Add the standard to your cart and complete the secure checkout process. iTeh Standards is an authorized distributor of IEC standards.

Standards Content (Sample)


IEC 60191-6-20 ®
Edition 1.0 2010-08
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Mechanical standardization of semiconductor devices –
Part 6-20: General rules for the preparation of outline drawings of surface
mounted semiconductor device packages – Measuring methods for package
dimensions of small outline J-lead packages (SOJ)

Normalisation mécanique des dispositifs à semiconducteurs –
Partie 6-20: Règles générales pour la préparation des dessins d'encombrement
des boîtiers pour dispositifs à semiconducteurs pour montage en surface –
Méthodes de mesure pour les dimensions des boîtiers à sortie en J (SOJ) de
faible encombrement
All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized in any form or by
any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from either IEC or
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IEC 60191-6-20 ®
Edition 1.0 2010-08
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Mechanical standardization of semiconductor devices –
Part 6-20: General rules for the preparation of outline drawings of surface
mounted semiconductor device packages – Measuring methods for package
dimensions of small outline J-lead packages (SOJ)

Normalisation mécanique des dispositifs à semiconducteurs –
Partie 6-20: Règles générales pour la préparation des dessins d'encombrement
des boîtiers pour dispositifs à semiconducteurs pour montage en surface –
Méthodes de mesure pour les dimensions des boîtiers à sortie en J (SOJ) de
faible encombrement
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
PRICE CODE
INTERNATIONALE
L
CODE PRIX
ICS 31.080.01 ISBN 978-2-88912-167-0
– 2 – 60191-6-20 © IEC:2010
INTERNATIONAL ELECTROTECHNICAL COMMISSION
______________
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –

Part 6-20: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Measuring methods for package dimensions
of small outline J-lead packages (SOJ)

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
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between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
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assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
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expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 60191-6-20 has been prepared by subcommittee 47D: Mechanical
standardization of semiconductor devices, of IEC technical committee 47: Semiconductor
devices.
The text of this standard is based on the following documents:
FDIS Report on voting
47D/771/FDIS 47D/775/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directive, Part 2.

60191-6-20 © IEC:2010 – 3 –
A list of all the parts in the IEC 60191 series, under the general title Mechanical
standardization of semiconductor devices, can be found on the IEC website.
The committee has decided that the contents of this publication will remain unchanged until
the stability date indicated on the IEC web site under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
– 4 – 60191-6-20 © IEC:2010
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –

Part 6-20: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Measuring methods for package dimensions
of small outline J-lead packages (SOJ)

1 Scope
This part of IEC 60191 specifies methods to measure package dimensions of small outline J-
lead-packages (SOJ), package outline form E in accordance with IEC 60191-4.
2 Normative references
The following referenced documents are indispensable for the application of this document.
For dated references, only the edition cited applies. For undated references, the latest edition
of the referenced document (including any amendments) applies.
IEC 60191-4, Mechanical standardization of semiconductor devices – Part 4: Coding system
and classification into forms of package outlines for semiconductor device packages
IEC 60191-6, Mechanical standardization of semiconductor devices – Part 6: General rules for
the preparation of outline drawings of surface mounted semiconductor device packages
3 Terms and definitions
For the purposes of this document, the terms and definitions given in IEC 60191-6 apply.
4 Measuring methods
4.1 Description of measuring methods
The measuring methods described in this standard are for dimension values guaranteed to
users on the basis of the following items.
a) In general, measuring the dimensions shall be made with the semiconductor packages
mounted on a printed circuit board as the guarantee is made to user.
b) In general, measurement may be made either by hand or automatically.
c) Even if a measuring method deviates from the original definition of dimensions, it is
defined as an alternative measuring method as long as it is equivalent in view of accuracy
and can be used easily. See 4.6.3b.
d) The dimensions that cannot be measured unless the package is destroyed may be
calculated from other dimensions or replaced by representative values.

60191-6-20 © IEC:2010 – 5 –
4.2 Reference characters and outline drawings
An outline drawing is given in Figure 1.
A1
D
A2
A
n n/2+1
Terminal 1
index area
n/2
L
B
IEC  2258/09 A
IEC  2259/09
Figure 1a – Top view Figure 1b – Side view

Seating plane
S
e
y
S
ZD x
M S A-B
IEC  2260/09
Figure 1c – Side view
b2
P
bp
b1
Lp
t
M P A-B
S
bp
IEC  2263/09
IEC  2261/09
IEC  2262/09
Figure 1d – Lead shape Figure 1e – Lead side view Figure 1f – Lead
section
e
b3
IEC  2264/09
Figure 1g – Pattern of terminal position areas
Figure 1 – SOJ outline drawings
E
L1 L2
l1
HE
A3
eE
eE
c1
c
– 6 – 60191-6-20 © IEC:2010
4.3 Mounting height A
4.3.1 Description
Let the height of a package from the seating plane to the top of the package be denoted as
the mounting height A. See Figure 2.

S
S
IEC  2023/10
Figure 2 – Mounting height
4.3.2 Measuring method
The measuring method shall be as follows.
a) Put the package on the surface plate to establish the seating plane.
b) From the seating plane, measure the distance to a highest point. Let the distance be
denoted as the mounting height A.
4.4 Stand-off A1
4.4.1 Description
Let a distance from the seating plane to the lowest point of a package be denoted as the
stand-off A1. See Figure 3.
S
S
IEC  2024/10
Figure 3 – Stand-off
4.4.2 Measuring method
The measuring method shall be as follows.
a) Put the package on the surface plate to establish the reference surface (seating plane).
b) Measure the distance from the reference surface (surface plate) to the lowest point of the
package. Let the distance be denoted as the stand-off A1.

60191-6-20 © IEC:2010 – 7 –
4.5 Body thickness A2
4.5.1 Description
The body thickness is defined as a distance between two parallel planes. It is tangent to the
highest and lowest points of the body. Let the distance be denoted as the body thickness A2.
See Figure 4.
IEC  2025/10
Figure 4 – Body thickness A2
4.5.2 Measuring method
The measuring method shall be as follows.
a) Put the package between vertically parallel surface plates. Never touch the leads.
b) Measure the total thickness including the surface plates with a micrometer and subtract
the thickness of surface plates from the total thickness so as to obtain the thickness of
package.
4.5.3 Quick measuring method
Measure the thickness of the package with a slide calipers along each diagonal line. Let the
maximum value be denoted as the body thickness A2.
4.6 Lead widths bp and b1, lead thickness c and c1
4.6.1 Description
a) The outmost width bp in the range of gage height A3 from seating plane. The outmost
width before surface plating shall be defined as b1. See Figures 5 and 6.
b) The outmost width shall be defined as b2 except the range of L2 and number remaining.
See Figure 6.
c) The outmost thickness c in the range of gage height A3 from the seating plane. The
outmost thickness before surface plating shall be defined as c1. The lead width and lead
thickness, as shown in Figure 6, include burrs, crushing, and sagging.
bp
IEC  2026/10
Figure 5 – Lead width and thickness

– 8 – 60191-6-20 © IEC:2010
bp
IEC  2027/10
Figure 6 – Measuring points of lead width and thickness
4.6.2 Measuring method
The measuring method shall be as follows.
a) Put the package on the surface plate to establish the reference surface (seating plane).
b) Measure the lead width and thickness in Figure 5.
4.6.3 Remarks
Remarks are as follows.
a) b1 and c1 may be measured before lead forming. In this case, measure b1 and c1 at the
specified area in Figure 5 after lead forming.
b) The lead thickness may be measured at 4 points on the four corners of the package as
representative values.
4.7 Soldered portion length Lp
4.7.1 Description
The distance between point a and point b which are crossing points of outer surface of lead
and gage plane A3. See Figure 7.

IEC  2028/10
Figure 7 – Soldered portion length Lp
L2
60191-6-20 © IEC:2010 – 9 –
4.7.2 Measuring method
The measuring method shall be as follows.
a) Put the package on the surface plate.
b) Make the datum parallel with the measuring reference.
c) Observe the lead toward the package side (in the seating plane direction). Measure
positions of points a and b as the soldered position length.
4.7.3 Remarks
As this measuring method can be done from the side, the values of the leads observable from
the side are allowed as representative values.
4.8 The allowable value t of the center of the soldered portion length Lp
4.8.1 Description
The center of the soldered portion length Lp shall be located within the range t centering on
the position that is at a theoretically correct distance of e1/2 from the body center. See
Figure 8.
t
t
IEC  2029/10
Figure 8 – The allowable value t of Lp center
4.8.2 Measuring method
The measuring method shall be as follows.
a) Put the package on the surface plane to establish the reference surface (seating plane).
b) Find the theoretically precise distance e1/2 from the body center. Then, check if the
center of the soldered portion length Lp is within the tolerance t (range) specified as the
center.
4.8.3 Remarks
As this measuring method can only be done from the side, the values of the leads observable
from the side are allowed as representative values.

– 10 – 60191-6-20 © IEC:2010
4.9 Positional tolerance of terminal x
4.9.1 Description
Let S, A denote datum as shown in the above figures. Obtain differences from the theoretical
positions. Acceptable differences are defined as the tolerance at center positions of terminal.
See Figure 9.
n/2+1
D
IEC  2030/10
Figure 9 – Positional tolerance of terminal
4.9.2 Measuring method
The measuring method shall be as follows.
a) Put the package on the surface plate.
b) Make the datum parallel with the measuring reference.
c) Obtain positions of the c
...

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