Mechanical standardization of semiconductor devices - Part 6-20: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ)

IEC 60191-6-20:2010 specifies methods to measure package dimensions of small outline J-lead-packages (SOJ), package outline form E in accordance with IEC 60191-4.

Normalisation mécanique des dispositifs à semiconducteurs - Partie 6-20: Règles générales pour la préparation des dessins d'encombrement des boîtiers pour dispositifs à semiconducteurs pour montage en surface - Méthodes de mesure pour les dimensions des boîtiers à sortie en J (SOJ) de faible encombrement

La CEI 60191-6-20:2010 spécifie les méthodes destinées à mesurer les dimensions des boîtiers à sortie en J (SOJ) de faible encombrement, l'encombrement des boîtiers de forme E conformément à la CEI 60191-4.

General Information

Status
Published
Publication Date
29-Aug-2010
Current Stage
PPUB - Publication issued
Start Date
30-Sep-2010
Completion Date
30-Aug-2010
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IEC 60191-6-20:2010 - Mechanical standardization of semiconductor devices - Part 6-20: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ)
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IEC 60191-6-20 ®
Edition 1.0 2010-08
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Mechanical standardization of semiconductor devices –
Part 6-20: General rules for the preparation of outline drawings of surface
mounted semiconductor device packages – Measuring methods for package
dimensions of small outline J-lead packages (SOJ)

Normalisation mécanique des dispositifs à semiconducteurs –
Partie 6-20: Règles générales pour la préparation des dessins d'encombrement
des boîtiers pour dispositifs à semiconducteurs pour montage en surface –
Méthodes de mesure pour les dimensions des boîtiers à sortie en J (SOJ) de
faible encombrement
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IEC 60191-6-20 ®
Edition 1.0 2010-08
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Mechanical standardization of semiconductor devices –
Part 6-20: General rules for the preparation of outline drawings of surface
mounted semiconductor device packages – Measuring methods for package
dimensions of small outline J-lead packages (SOJ)

Normalisation mécanique des dispositifs à semiconducteurs –
Partie 6-20: Règles générales pour la préparation des dessins d'encombrement
des boîtiers pour dispositifs à semiconducteurs pour montage en surface –
Méthodes de mesure pour les dimensions des boîtiers à sortie en J (SOJ) de
faible encombrement
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
PRICE CODE
INTERNATIONALE
L
CODE PRIX
ICS 31.080.01 ISBN 978-2-88912-167-0
– 2 – 60191-6-20 © IEC:2010
INTERNATIONAL ELECTROTECHNICAL COMMISSION
______________
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –

Part 6-20: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Measuring methods for package dimensions
of small outline J-lead packages (SOJ)

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
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Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
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governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
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Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
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expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 60191-6-20 has been prepared by subcommittee 47D: Mechanical
standardization of semiconductor devices, of IEC technical committee 47: Semiconductor
devices.
The text of this standard is based on the following documents:
FDIS Report on voting
47D/771/FDIS 47D/775/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directive, Part 2.

60191-6-20 © IEC:2010 – 3 –
A list of all the parts in the IEC 60191 series, under the general title Mechanical
standardization of semiconductor devices, can be found on the IEC website.
The committee has decided that the contents of this publication will remain unchanged until
the stability date indicated on the IEC web site under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
– 4 – 60191-6-20 © IEC:2010
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –

Part 6-20: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Measuring methods for package dimensions
of small outline J-lead packages (SOJ)

1 Scope
This part of IEC 60191 specifies methods to measure package dimensions of small outline J-
lead-packages (SOJ), package outline form E in accordance with IEC 60191-4.
2 Normative references
The following referenced documents are indispensable for the application of this document.
For dated references, only the edition cited applies. For undated references, the latest edition
of the referenced document (including any amendments) applies.
IEC 60191-4, Mechanical standardization of semiconductor devices – Part 4: Coding system
and classification into forms of package outlines for semiconductor device packages
IEC 60191-6, Mechanical standardization of semiconductor devices – Part 6: General rules for
the preparation of outline drawings of surface mounted semiconductor device packages
3 Terms and definitions
For the purposes of this document, the terms and definitions given in IEC 60191-6 apply.
4 Measuring methods
4.1 Description of measuring methods
The measuring methods described in this standard are for dimension values guaranteed to
users on the basis of the following items.
a) In general, measuring the dimensions shall be made with the semiconductor packages
mounted on a printed circuit board as the guarantee is made to user.
b) In general, measurement may be made either by hand or automatically.
c) Even if a measuring method deviates from the original definition of dimensions, it is
defined as an alternative measuring method as long as it is equivalent in view of accuracy
and can be used easily. See 4.6.3b.
d) The dimensions that cannot be measured unless the package is destroyed may be
calculated from other dimensions or replaced by representative values.

60191-6-20 © IEC:2010 – 5 –
4.2 Reference characters and outline drawings
An outline drawing is given in Figure 1.
A1
D
A2
A
n n/2+1
Terminal 1
index area
n/2
L
B
IEC  2258/09 A
IEC  2259/09
Figure 1a – Top view Figure 1b – Side view

Seating plane
S
e
y
S
ZD x
M S A-B
IEC  2260/09
Figure 1c – Side view
b2
P
bp
b1
Lp
t
M P A-B
S
bp
IEC  2263/09
IEC  2261/09
IEC  2262/09
Figure 1d – Lead shape Figure 1e – Lead side view Figure 1f – Lead
section
e
b3
IEC  2264/09
Figure 1g – Pattern of terminal position areas
Figure 1 – SOJ outline drawings
E
L1 L2
l1
HE
A3
eE
eE
c1
c
– 6 – 60191-6-20 © IEC:2010
4.3 Mounting height A
4.3.1 Description
Let the height of a package from the seating plane to the top of the package be denoted as
the mounting height A. See Figure 2.

S
S
IEC  2023/10
Figure 2 – Mounting height
4.3.2 Measuring method
The measuring method shall be as follows.
a) Put the package on the surface plate to establish the seating plane.
b) From the seating plane, measure the distance to a highest point. Let the distance be
denoted as the mounting height A.
4.4 Stand-off A1
4.4.1 Description
Let a distance from the seating plane to the lowest point of a package be denoted as the
stand-off A1. See Figure 3.
S
S
IEC  2024/10
Figure 3 – Stand-off
4.4.2 Measuring method
The measuring method shall be as follows.
a) Put the package on the surface plate to establish the reference surface (seating plane).
b) Measure the distance from the reference surface (surface plate) to the lowest point of the
package. Let the distance be denoted as the stand-off A1.

60191-6-20 © IEC:2010 – 7 –
4.5 Body thickness A2
4.5.1 Description
The body thickness is defined as a distance between tw
...

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