Mechanical standardization of semiconductor devices - Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guidelines for fine-pitch land grid array (FLGA)

IEC 60191-6-12:2011 provides standard outline drawings, dimensions, and recommended variations for all fine-pitch land grid array packages (FLGA) with terminal pitch of 0,8 mm or less. This edition includes the following significant changes with respect to the previous edition:
- scope is expanded so that this standard include the square type FLGA. The title of this standard has been changed accordingly: "Rectangular type" has been deleted from the title;
- ball pitch of 0,3 mm has been added;
- datum is changed from the body datum to the ball datum;
- combination lists of D, E, MD, and ME have been revised.

Normalisation mécanique des dispositifs à semiconducteurs - Partie 6-12: Règles générales pour la préparation des dessins d'encombrement des boîtiers des dispositifs à semiconducteurs à montage en surface - Lignes directrices de conception pour les boîtiers matriciels à plots et à pas fins (FLGA)

La CEI 60191-6-12:2011 fournit les dessins d'encombrement, les dimensions, et les variations recommandées, normalisés pour tous les boîtiers matriciels à plots et à pas fins (FLGA: Fine-Pitch Ball Grid Array Package) comportant des pas de bornes inférieurs ou égaux à 0,8 mm. La présente édition inclut les modifications significatives suivantes par rapport à l'édition antérieure:
- le domaine d'application est étendu afin que la présente norme couvre aussi les FLGA de type carré. Le titre de la norme a été modifié en conséquence. "Type rectangulaire" a été supprimé du titre;
- le pas de bille de 0,3 mm a été ajouté;
- la référence passe de "référence du corps" à "référence de la bille";
- les listes de combinaison de D, E, MD, et ME ont été révisées.

General Information

Status
Published
Publication Date
07-Jun-2011
Drafting Committee
WG 2 - TC 47/SC 47D/WG 2
Current Stage
PPUB - Publication issued
Start Date
31-Aug-2011
Completion Date
08-Jun-2011

Relations

Effective Date
05-Sep-2023

Overview

IEC 60191-6-12:2011 is an international standard established by the International Electrotechnical Commission (IEC) focused on the mechanical standardization of semiconductor devices. Specifically, it provides comprehensive general rules for the preparation of outline drawings for surface-mounted semiconductor device packages, laying out design guidelines for Fine-Pitch Land Grid Array (FLGA) packages.

This standard covers FLGA packages with a terminal pitch of 0.8 mm or less, including both rectangular and square types of FLGA. IEC 60191-6-12:2011 represents the second edition, expanding scope and refining dimensions and tolerances to support the evolving semiconductor packaging industry. It emphasizes standardization to promote interchangeability, reliability, and ease of integration for semiconductor device manufacturers and electronics designers.

Key Topics

  • Scope and Package Types: The standard applies to FLGA packages with terminal pitches of 0.8 mm or less, including flange-type and rectangle-type FLGAs. The scope was expanded in the 2011 revision to explicitly cover square FLGA packages, removing previous restrictions on "rectangular type" only.

  • Terminal Pitch and Dimensions: It introduces new terminal pitches down to 0.3 mm, addressing miniaturization trends in semiconductor devices. The document defines nominal package dimensions and tolerances for widths (E) and lengths (D), specifying detailed dimensional limits suitable for surface mounting technology.

  • Datum Reference: The 2011 edition changes the reference datums from body datum to ball datum. This shift better aligns with package body constructions and terminal positioning, enhancing accuracy in manufacturing and inspection.

  • Terminal Position Numbering: The standard defines a clear alphanumeric system for identifying terminal positions using row letters (excluding confusing letters like I, O, Q, S, X, Z) and numeric columns to facilitate precise communication and documentation.

  • Outline Drawings and Mechanical Gauges: Provides detailed illustrations and mechanical gauge drawings indicating terminal placement and dimensions for flange and rectangle-type FLGAs. These visual standards allow manufacturers to ensure mechanical compatibility and consistent device footprint across different products.

  • Dimensional Tolerances and Variation Lists: The publication includes combination lists of key dimensions (D, E, MD, ME) and strict tolerances to ensure interchangeability and mounting precision, supporting high-density circuit board assembly and reliable electrical connections.

Applications

IEC 60191-6-12:2011 serves as a critical reference for a range of applications, including:

  • Semiconductor Device Manufacturing: Enables standardization of FLGA package designs, assuring consistent device outlines, terminal positions, and dimensions that improve assembly processes and reduce defects.

  • Surface Mount Technology (SMT) Assembly: Assists PCB designers and assembly engineers in designing pads, solder masks, and inspection procedures matching FLGA package outlines and ball pitches.

  • Component Integration: Facilitates cross-supplier compatibility, enabling electronics manufacturers to source semiconductor devices interchangeably from multiple vendors without redesigning PCB layouts.

  • Quality Control and Inspection: Provides mechanical gauges and dimensional standards for verifying compliance with package specifications, reducing product failures during high-volume production.

  • Miniaturized Electronics: Supports developments in compact electronic devices by defining standards for fine-pitch packages down to 0.3 mm pitch, advancing high-density circuit integration in smartphones, laptops, and IoT devices.

Related Standards

  • IEC 60191 (All Parts): The broader series on mechanical standardization of semiconductor devices, which includes general rules and specific packaging styles beyond FLGA, ensuring consistent mechanical specifications across various package types.

  • IEC 60191-6: Focuses on general rules for preparing outline drawings of surface-mounted semiconductor device packages, providing foundational principles applied in Part 6-12.

  • ISO/IEC Directives, Part 2: Guidelines on preparing international standards, ensuring harmonization between ISO and IEC standards development processes.

By adhering to IEC 60191-6-12:2011, semiconductor manufacturers and electronics designers gain an authoritative framework to standardize FLGA package designs with tight mechanical tolerances, facilitating global interoperability, enhanced manufacturing quality, and improved electronic device performance.


Keywords: IEC 60191-6-12, FLGA package standard, fine-pitch land grid array, semiconductor package outline, surface-mounted semiconductor device, terminal pitch 0.8 mm, semiconductor device mechanical standardization, semiconductor package dimensions, surface mount technology, semiconductor industry standards, electronics packaging guidelines.

Standard

IEC 60191-6-12:2011 - Mechanical standardization of semiconductor devices - Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guidelines for fine-pitch land grid array (FLGA)

English and French language
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Frequently Asked Questions

IEC 60191-6-12:2011 is a standard published by the International Electrotechnical Commission (IEC). Its full title is "Mechanical standardization of semiconductor devices - Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guidelines for fine-pitch land grid array (FLGA)". This standard covers: IEC 60191-6-12:2011 provides standard outline drawings, dimensions, and recommended variations for all fine-pitch land grid array packages (FLGA) with terminal pitch of 0,8 mm or less. This edition includes the following significant changes with respect to the previous edition: - scope is expanded so that this standard include the square type FLGA. The title of this standard has been changed accordingly: "Rectangular type" has been deleted from the title; - ball pitch of 0,3 mm has been added; - datum is changed from the body datum to the ball datum; - combination lists of D, E, MD, and ME have been revised.

IEC 60191-6-12:2011 provides standard outline drawings, dimensions, and recommended variations for all fine-pitch land grid array packages (FLGA) with terminal pitch of 0,8 mm or less. This edition includes the following significant changes with respect to the previous edition: - scope is expanded so that this standard include the square type FLGA. The title of this standard has been changed accordingly: "Rectangular type" has been deleted from the title; - ball pitch of 0,3 mm has been added; - datum is changed from the body datum to the ball datum; - combination lists of D, E, MD, and ME have been revised.

IEC 60191-6-12:2011 is classified under the following ICS (International Classification for Standards) categories: 31.080.01 - Semiconductor devices in general. The ICS classification helps identify the subject area and facilitates finding related standards.

IEC 60191-6-12:2011 has the following relationships with other standards: It is inter standard links to IEC 60191-6-12:2002. Understanding these relationships helps ensure you are using the most current and applicable version of the standard.

You can purchase IEC 60191-6-12:2011 directly from iTeh Standards. The document is available in PDF format and is delivered instantly after payment. Add the standard to your cart and complete the secure checkout process. iTeh Standards is an authorized distributor of IEC standards.

Standards Content (Sample)


IEC 60191-6-12 ®
Edition 2.0 2011-06
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Mechanical standardization of semiconductor devices –
Part 6-12: General rules for the preparation of outline drawings of surface
mounted semiconductor device packages – Design guidelines for fine-pitch land
grid array (FLGA)
Normalisation mécanique des dispositifs à semiconducteurs –
Partie 6-12: Règles générales pour la préparation des dessins d'encombrement
des boîtiers des dispositifs à semiconducteurs à montage en surface – Lignes
directrices de conception pour les boîtiers matriciels à plots et à pas fins (FLGA)

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IEC 60191-6-12 ®
Edition 2.0 2011-06
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Mechanical standardization of semiconductor devices –
Part 6-12: General rules for the preparation of outline drawings of surface
mounted semiconductor device packages – Design guidelines for fine-pitch land
grid array (FLGA)
Normalisation mécanique des dispositifs à semiconducteurs –
Partie 6-12: Règles générales pour la préparation des dessins d'encombrement
des boîtiers des dispositifs à semiconducteurs à montage en surface – Lignes
directrices de conception pour les boîtiers matriciels à plots et à pas fins (FLGA)

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
PRICE CODE
INTERNATIONALE
CODE PRIX R
ICS 31.080.01 ISBN 978-2-88912-527-2

– 2 – 60191-6-12 © IEC:2011
CONTENTS
FOREWORD . 3
1 Scope . 5
2 Normative references . 5
3 Terms and definitions . 5
4 Terminal position numbering . 6
5 Nominal package dimension . 6
6 Outline drawings and principle dimensions . 7
7 Dimensions . 10

Figure 1 – Flange-type FLGA . 6
Figure 2 – Rectangle-type FLGA . 6
Figure 3 – Flange-type FLGA . 7
Figure 4 – Rectangle-type FLGA . 8
e
Figure 5 – Mechanical gauge drawing . 9
f
Figure 6 – Pattern of terminal position area . 9

Table 1 – Group 1: Dimensions appropriate to mounting and interchangeability . 10
Table 2 – Group 2: Dimensions and tolerances . 14
Table 3 – Combination list of D, E, M , and M – e = 0,80mm pitch . 15
D E
Table 4 – Combination list of D, E, M , and M – e = 0,65 mm pitch . 16
D E
Table 5 – Combination list of D, E, M , and M – e = 0,50 mm pitch . 17
D E
Table 6 – Combination list of D, E, M , and M – e = 0,40 mm pitch . 18
D E
Table 7 – Combination list of D, E, M , and M – e = 0,30 mm pitch . 19
D E
60191-6-12 © IEC:2011 – 3 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –

Part 6-12: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Design guidelines for fine-pitch land grid array (FLGA)

FOREWORD
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patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 60191-6-12 has been prepared by subcommittee 47D: Mechanical
standardization of semiconductor devices, of IEC technical committee 47: Semiconductor
devices.
This second edition of IEC 60191-6-12 cancels and replaces the first edition, published in
2002 and constitutes a technical revision. This edition includes the following significant
changes with respect to the previous edition:
a) scope is expanded so that this standard include the square type FLGA. The title of this
standard has been changed accordingly: “Rectangular type” has been deleted from the
title.
b) ball pitch of 0,3 mm has been added;
c) datum is changed from the body datum to the ball datum;
d) combination lists of D, E, M , and M have been revised.
D E
– 4 – 60191-6-12 © IEC:2011
The text of this standard is based on the following documents:
CDV Report on voting
47D/784/CDV 47D/795/RVC
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
A list of all the parts in the IEC 60191 series, under the general title Mechanical
standardization of semiconductor devices, can be found on the IEC website.
The committee has decided that the contents of this publication will remain unchanged until
the stability date indicated on the IEC web site under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
IMPORTANT – The 'colour inside' logo on the cover page of this publication indicates
that it contains colours which are considered to be useful for the correct
understanding of its contents. Users should therefore print this document using a
colour printer.
60191-6-12 © IEC:2011 – 5 –
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –

Part 6-12: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Design guidelines for fine-pitch land grid array (FLGA)

1 Scope
This part of IEC 60191 provides standard outline drawings, dimensions, and recommended
variations for all fine-pitch land grid array packages (FLGA) with terminal pitch of 0,8 mm or
less.
2 Normative references
The following referenced documents are indispensable for the application of this document.
For dated references, only the edition cited applies. For undated references, the latest edition
of the referenced document (including any amendments) applies.
IEC 60191(all parts), Mechanical standardization of semiconductor devices
IEC 60191-6, Mechanical standardization of semiconductor devices – Part 6: General rules for
the preparation of outline drawings of surface mounted semiconductor device packages
3 Terms and definitions
For the purposes of this document, the terms and definitions given IEC 60191 series and the
following apply.
3.1
fine-pitch land grid array
FLGA
package with metal lands on one side of a substrate in a matrix of at least three rows and
three columns on a pitch of 0,8 mm or less, wherein the maximum standoff height is 0,10 mm
or less
NOTE Terminals may be missing from some row-column intersections.
3.2
flange-type FLGA
FLGA with a package outline (length, width) defined by a package flange part, mostly
substrate, extending outward beyond the perimeter of a molded part or of a flip-chip-bonded
part
NOTE Flange-type FLGA, shown in Figure 1, is generally cut by singulation press, thus resulting in larger
dimensional errors than the singulation by dicing saw

– 6 – 60191-6-12 © IEC:2011
IEC  1163/11
Figure 1 – Flange-type FLGA
3.3
rectangle-type FLGA
FLGA with a package outline (length, width) defined by a molded part with no extending
flange part
NOTE Rectangle-type FLGA, shown in Figure 2, is generally cut by dicing, thus resulting in less dimensional
errors than the singulation by press machine.

IEC  1164/11
Figure 2 – Rectangle-type FLGA
4 Terminal position numbering
When a package is viewed from the terminal side with the index corner in the bottom left
corner position, terminal rows are lettered from bottom to top starting with A, then B, C,,,, AA,
AB, etc,, whereas terminal columns are numbered from left to right starting with 1. Terminal
positions are designated by a row-column grid system and shown as alphanumeric
identification, e.g., A1, B1.
The letters I, O, Q, S, X and Z shall not be used for naming the terminal rows.
5 Nominal package dimension
A nominal package dimension is defined as “the package width (E) × length (D)”, which is
expressed in the tenths place in millimeter.

60191-6-12 © IEC:2011 – 7 –
6 Outline drawings and principle dimensions
The FLGA outline is shown in Figures 3 and 4.

E
B
b
Top view
y
S
a
S
y
CZ
Side view
e
D
C
B
A
1 2 3 4
d c
(Z )
E n × ∅b
x M
S A M B M
x
M S
Bottom view
IEC  1165/11
NOTE For footnotes relating to this figure, see Figure 4.
Figure 3 – Flange-type FLGA
(Z )
e
D
D
A
A
A
– 8 – 60191-6-12 © IEC:2011
E
B
b
Top view
y
S
a
S
y
CZ
Side view
e
D
C
B
A
1 2 3 4
d
c
(Z )
E n × ∅b
x M
S A M B M
Bottom view x M S
IEC  1166/11
NOTES relating to Figures 3 and 4:
a
Datum S is defined as the seating plane on which a package free stands by contact of the balls.
b
The hatched zone is an index-marking area, where whole index mark will be basically contained in 1/16 of the
body size, In case it is physically difficult, index mark can extend more than 1/16 but no more than a quarter of
the body size.
c
True positional tolerances of terminals, x and x , are applied to all terminals.
1 2
d
The terminal diameter b is the maximum diameter of individual balls as measured in the plane parallel to the
seating plane.
e
An array of terminal-existence areas with regard to the datum S, A, and B is shown in the mechanical gauge
drawing in Figure 5.
f
The array of terminal-existence areas with regard to the datum S is shown in Figure 6.
Figure 4 – Rectangle-type FLGA
e
(Z )
D
D
A
A
A
60191-6-12 © IEC:2011 – 9 –
E
max
e e
∅b
3 ∅b
IEC  1167/11 IEC  1168/11
NOTE The symbols in this figure are explained in IEC 60191-6.
e f
Figure 5 – Mechanical gauge drawing Figure 6 – Pattern of terminal position area

e
D
max
e
– 10 – 60191-6-12 © IEC:2011
7 Dimensions
Table 1 – Group 1: Dimensions appropriate to mounting and interchangeability
Dimensions in millimeters
Term Symbol Specification Recommended
value
Package E x D A package nominal dimension is defined as “the package width (E) x
-
nominal length (D), which is expressed in the tenths place in millimeter.
dimension
-
(1) Range of D : from 1,5 to 21,0
nom
(2) Interval of D
nom
For square FLGA with D ≥ 15,0, D is an integer.
nom nom
For other FLGA, the number in the tenths place of D is either 0 or
nom
5.
(3) Tolerance of D
For Flange-type:
Package length D
When D ≤ 21,0, v = ±0,15
nom D
When D > 21,0, v = ±0,20
nom D
where v denotes a tolerance.
D
For Rectangle-type:
When D ≤12,0, v = ±0,08
nom D
When 12,0 < D ≤ 21,0, v = ±0,10
nom D
When D > 21,0, v = ±0,15
nom D
where v denotes a tolerance.
D
60191-6-12 © IEC:2011 – 11 –
Table 1 (continued)
Dimensions in millimeters
Term Symbol Specification Recommended
value
(1) Range of E : from 1,5 to 21,0
nom
(2) Interval of E
nom
For square FLGA with E ≥ 15,0, E is an integer.
nom nom
For other FLGA, the number in the tenths place of E is either 0 or
nom
5.
(3) Tolerance of “E”
For flange-type:
Package width E
-
When E ≤ 21,0, v = ±0,15
nom E
When E > 21,0, v = ±0,20
nom E
where v denotes a tolerance.
E
For rectangle-type:
When E ≤12,0, v = ±0,08
nom E
When 12,0 < E ≤ 21,0, v = ±0,10
nom E
When E > 21,0, v = ±0,15
nom E
where v denotes a tolerance.
E
A = 0,30
0,40
0,50
0,65
0,80
Maximum
A
-
profile height
1,00
1,20
1,70
2,00
“A” includes heat slug thickness, package warpage, and tilt errors.
Stand-off A max ≤ 0,10
A
1 -
height
e = 0,80
0,65
Terminal grid
0,50
e -
pitch
0,40
0,30
– 12 – 60191-6-12 © IEC:2011
Table 1 (continued)
Dimensions in millimeters
Term Symbol Specification Recommended
value
For C-FLGA:
e
min.  nom.  max.
0,80  0,45  0,50  0,55
0,65  0,35  0,40  0,45
0,50  0,25  0,30  0,35
0,40  0,20  0,25  0,30
Terminal
For P-FLGA and T-FLGA
b
diameter
e
min.  nom. max.
0,80  0,35  0,40  0,45
0,65  0,30  0,35  0,40
0,50  0,20  0,25  0,30
0,40  0,15  0,20  0,25
0,30  0,12  0,15  0,18
For flange-type:
e    x
0,80   0,20
0,65   0,20
Datum-
0,50   0,20
based
positional x
1 0,40   0,15 -
tolerance of
terminals
0,30   0,15
For rectangle-type:
x is 0,15, irrespective of e.
60191-6-12 © IEC:2011 – 13 –
Table 1 (continued)
Dimensions in millimeters
Term Symbol Specification Recommended
value
e    x
0,80   0,08
Relative
positional
0,65   0,08
x
-
tolerance of
0,50   0,05
terminals
0,40   0,05
0,30   0,03
e    y
0,80   0,10
0,65   0,10
Coplanarity y
-
0,50   0,08
0,40   0,08
0,30   0,05
Parallelism
of the top y
y = 0,20 -
surface
n = M  x M
max E D
Number of
n
(M -1) x M
terminals E D
M  x (M -1)
E D
(M -1) x (M -1)
E D
(M +1) x M
E D
Maximum
matrix size in M
D    M  x (M +1)
E D
length
(M +1) x (M +1)
E D
-
M ≤( D - b – v -X - x - 2u)/ e+1
D nom max D 1 2
M ≤( E - b – v - x - x - 2u)/ e+1
E nom max E 1 2
Maximum
u = 0,11
matrix size in M
E
width
Numbers of matrices in M and M are shown in Table 3.
E D
“u” denotes edge clearance.
– 14 – 60191-6-12 © IEC:2011
Table 2 – Group 2: Dimensions and tolerances
Dimensions in millimeters
Term Symbol Specification Recommended
value
Overhang
(Z ) = {D - (M - 1) x e } /2
D nom D
dimension in (Z ) -
D
(Z ) is a reference value.
D
length
Overhang
(Z ) = {E - (M - 1) x e } /2
E nom E
dimension in (Z ) -
E
(Z ) is a reference value.
E
width
Datum- defined
terminal- b b = b + x -
3 3 max 1
existence area
Relative
terminal- b b = b + x -
4 4 max 2
existence area
60191-6-12 © IEC:2011 – 15 –
Table 3 – Combination list of D, E, M , and M – e = 0,80mm pitch
D E
D or E
nom nom
M or M M -1 or M -1 M +1 or M +1
Square body Rectangular body
D E D E D E
(D = E ) (D ≠ E )
nom nom nom nom
1,5 1,5 - - 2
2,0 2,0
2 - 3
2,5 2,5
3,0 3,0
3 2 4
3,5 3,5
4,0 4,0 4 3 5
4,5 4,5
5 4 6
5,0 5,0
5,5 5,5 6 5 7
6,0 6,0
7 6 8
6,5 6,5
7,0 7,0
8 7 9
7,5 7,5
8,0 8,0 9 8 10
8,5 8,5
10 9 11
9,0 9,0
9,5 9,5 11 10 12
10,0 10,0
12 11 13
10,5 10,5
11,0 11,0
13 12 14
11,5 11,5
12,0 12,0 14 13 15
12,5 12,5
15 14 16
13,0 13,0
13,5 13,5 16 15 17
14,0 14,0
17 16 18
14,5 14,5
15,0 15,0
18 17 19
- 15,5
16,0 16,0 19 18 20
- 16,5
20 19 21
17,0 17,0
- 17,5 21 20 22
18,0 18,0
22 21 23
- 18,5
19,0 19,0
23 22 24
- 19,5
20,0 20,0 24 23 25
- 20,5
25 24 26
21,0 21,0
– 16 – 60191-6-12 © IEC:2011
Table 4 – Combination list of D, E, M , and M – e = 0,65 mm pitch
D E
D or E
nom nom
M or M M -1 or M -1 M +1 or M +1
Square body Rectangular body
D E D E D E
(D = E ) (D ≠ E )
nom nom nom nom
1,5 1,5 - - 2
2,0 2,0 2 - 3
2,5 2,5
3 2 4
3,0 3,0
3,5 3,5 4 3 5
4,0 4,0 5 4 6
4,5 4,5 6 5 7
5,0 5,0
7 6 8
5,5 5,5
6,0 6,0 8 7 9
6,5 6,5 9 8 10
7,0 7,0
10 9 11
7,5 7,5
8,0 8,0 11 10 12
8,5 8,5 12 11 13
9,0 9,0
13 12 14
9,5 9,5
10,0 10,0 14 13 15
10,5 10,5 15 14 16
11,0 11,0 16 15 17
11,5 11,5
17 16 18
12,0 12,0
12,5 12,5 18 17 19
13,0 13,0 19 18 20
13,5 13,5
20 19 21
14,0 14,0
14,5 14,5 21 20 22
15,0 15,0 22 21 23
15,5
16,0 23 22 24
16,0
- 16,5 24 23 25
17,0 17,0 25 24 26
- 17,5 26 25 27
18,0
18,0 27 26 28
18,5
19,0 19,0 28 27 29
- 19,5 29 28 30
20,0
20,0 30 29 31
20,5
21,0 21,0 31 30 32
60191-6-12 © IEC:2011 – 17 –
Table 5 – Combination list of D, E, M , and M – e = 0,50 mm pitch
D E
D or E
nom nom
M or M M -1 or M -1 M +1 or M +1
Square body Rectangular body
D E D E D E
(D = E ) (D ≠ E )
nom nom nom nom
1,0 1,0 - - 2
1,5 1,5 2 - 3
2,0 2,0 3 2 4
2,5 2,5 4 3 5
3,0 3,0 5 4 6
3,5 3,5 6 5 7
4,0 4,0 7 6 8
4,5 4,5 8 7 9
5,0 5,0 9 8 10
5,5 5,5 10 9 11
6,0 6,0 11 10 12
6,5 6,5 12 11 13
7,0 7,0 13 12 14
7,5 7,5 14 13 15
8,0 8,0 15 14 16
8,5 8,5 16 15 17
9,0 9,0 17 16 18
9,5 9,5 18 17 19
10,0 10,0 19 18 20
10,5 10,5 20 19 21
11,0 11,0 21 20 22
11,5 11,5 22 21 23
12,0 12,0 23 22 24
12,5 12,5 24 23 25
13,0 13,0 25 24 26
13,5 13,5 26 25 27
14,0 14,0 27 26 28
14,5 14,5 28 27 29
15,0 15,0 29 28 30
- 15,5 30 29 31
16,0 16,0 31 30 32
- 16,5 32 31 33
17,0 17,0 33 32 34
- 17,5 34 33 35
18,0 18,0 35 34 36
- 18,5 36 35 37
19,0 19,0 37 36 38
- 19,5 38 37 39
20,0 20,0 39 38 40
- 20,5 40 39 41
21,0 21,0 41 40 42
– 18 – 60191-6-12 © IEC:2011
Table 6 – Combination list of D, E, M , and M –
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