IEC 60191-6-13:2007
(Main)Mechanical standardization of semiconductor devices - Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array (FBGA/FLGA)
Mechanical standardization of semiconductor devices - Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array (FBGA/FLGA)
IEC 60191-6-13:2007 gives a design guideline of open-top-type semiconductor sockets for Fine-pitch Ball Grid Array ("FBGA" hereafter) and Fine-pitch Land Grid Array ("FLGA" hereafter). This standard is intended to establish the outline drawings and dimensions of the open-top-type socket out of the test and burn-in sockets applied to FBGA and FLGA.
Normalisation mécanique des dispositifs à semiconducteurs - Partie 6-13: Guide de conception pour les supports sans couvercle pour les boîtiers matriciels à billes et à pas fins et les boîtiers matriciels à zone de contact plate et à pas fins (FBGA/FLGA)
La CEI 60191-6-13:2007 fournit un guide de conception des supports à semi-conducteurs sans couvercle pour les boîtiers matriciels à billes et à pas fins (désignés ci-après "FBGA" abréviation de Fine-pitch Ball Grid Array) et les boîtiers matriciels à zone de contact plate et à pas fins (désignés ci-après "FLGA", Fine-pitch Land Grid Array). La présente norme est destinée à établir les dessins et dimensions d'encombrement du support sans couvercle parmi les supports d'essai et de rodage appliqués aux FBGA et aux FLGA.
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INTERNATIONAL IEC
STANDARD 60191-6-13
First edition
2007-06
Mechanical standardization of
semiconductor devices –
Part 6-13:
Design guideline of open-top-type sockets for
Fine-pitch Ball Grid Array and Fine-pitch Land
Grid Array (FBGA/FLGA)
Reference number
All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized in any form
or by any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from
either IEC or IEC's member National Committee in the country of the requester.
If you have any questions about IEC copyright or have an enquiry about obtaining additional rights to this publication,
please contact the address below or your local IEC member National Committee for further information.
IEC Central Office
3, rue de Varembé
CH-1211 Geneva 20
Switzerland
Email: inmail@iec.ch
Web: www.iec.ch
About the IEC
The International Electrotechnical Commission (IEC) is the leading global organization that prepares and publishes
International Standards for all electrical, electronic and related technologies.
About IEC publications
The technical content of IEC publications is kept under constant review by the IEC. Please make sure that you have the
latest edition, a corrigenda or an amendment might have been published.
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INTERNATIONAL IEC
STANDARD 60191-6-13
First edition
2007-06
Mechanical standardization of
semiconductor devices –
Part 6-13:
Design guideline of open-top-type sockets for
Fine-pitch Ball Grid Array and Fine-pitch Land
Grid Array (FBGA/FLGA)
PRICE CODE
Commission Electrotechnique Internationale P
International Electrotechnical Commission
МеждународнаяЭлектротехническаяКомиссия
For price, see current catalogue
– 2 – 60191-6-13 © IEC:2007(E)
CONTENTS
FOREWORD.3
1 Scope.5
2 Normative references .5
3 Terms and definitions .5
4 Socket code .5
4.1 Construction of socket code .5
4.2 Symbols .6
5 Terminal number .6
6 Socket nominal dimension .6
7 Socket length and width .7
8 Reference symbols and schematics.7
8.1 Outline drawings .7
8.2 Reference symbols and schematics of recommended socket mounting
pattern on printed circuit board.9
8.3 Overall dimensions.10
8.4 Recommended dimensions of socket mounting pattern on printed circuit
board .14
9 Individual outline drawing standard registration .15
Table 1 – Overall dimensions.10
Table 2 – Socket dimensions .12
Table 2a – Socket dimensions for Group 1, 2 and 3（square socket）.12
Table 2b – Socket dimension for Group 4 (square or rectangular socket).13
Table 3 – Socket mounting dimensions .14
Table 4 – Registration table .15
Figure 1 – Outline drawings of the socket .8
Figure 2 – Applicable package outline.8
Figure 3 – Socket mounting pattern .9
60191-6-13 © IEC:2007(E) – 3 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
_______________
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –
Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball
Grid Array and Fine-pitch Land Grid Array (FBGA/FLGA)
FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC provides no marking procedure to indicate its approval and cannot be rendered responsible for any
equipment declared to be in conformity with an IEC Publication.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 60191-6-13 has been prepared by subcommittee 47D: Mechanical
standardization for semiconductor devices, of IEC technical committee 47: Semiconductor
devices.
The text of this standard is based on the following documents:
FDIS Report on voting
47D/681/FDIS 47D/692/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
– 4 – 60191-6-13 © IEC:2007(E)
A list of all the parts in the IEC 60191 series, under the general title Mechanical
standardization of semiconductor devices, can be found on the IEC website.
The committee has decided that the contents of this publication will remain unchanged until
the maintenance result date indicated on the IEC web site under "http://webstore.iec.ch" in
the data related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
A bilingual version of this publication may be issued at a later date.
60191-6-13 © IEC:2007(E) – 5 –
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –
Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball
Grid Array and Fine-pitch Land Grid Array (FBGA/FLGA)
1 Scope
This part of IEC 60191 gives a design guideline of open-top-type semiconductor sockets for
Fine-pitch Ball Grid Array (“FBGA” hereafter) and Fine-pitch Land Grid Array (“FLGA”
hereafter). This standard is intended to establish the outline drawings and dimensions of the
open-top-type socket out of the test and burn-in sockets applied to FBGA and FLGA.
2 Normative references
The following referenced documents are indispensable for the application of this document.
For dated references, only the edition cited applies. For undated references, the latest edition
of the referenced document (including any amendments) applies.
IEC 60191-2, Mechanical standardization of semiconductor devices – Part 2: Dimensions
IEC 60191-6:2004, Mechanical standardization of semiconductor devices – Part 6: General
rules for the preparation of outline drawings of surface mounted semiconductor device
packages
3 Terms and definitions
For the purposes of this document, the terms and definitions of IEC 60191-6 apply.
4 Socket code
4.1 Construction of socket code
A socket code is constructed as follows.
Symbol Symbol of Symbol of Terminal
Number of
of socket socket nominal pitch
terminal
type dimension
arrays
4.2 d)
[ ][ ][ ][ ][ ]
4.2 a) 4.2 b) 4.2 c) 4.2 e)
Example SFB TX 2120AB 1616 080
– 6 – 60191-6-13 © IEC:2007(E)
4.2 Symbols
a) Semiconductor sockets symbol
The symbol for socket shall be expressed in 3 characters. The first character, “S”, refers to
socket and the rest to the package code. FBGA shall be expressed as “FB”, FLGA shall be
expressed as “FL”.
b) Socket type symbol
The symbol for socket type shall be expressed in 2 characters. The first character “T” refers
to open top type and the rest remains option “X”. Clamshell type socket is referred to as “C”.
c) Socket nominal dimension symbol
The symbol for nominal dimension shall be expressed in 6 characters, which are 4 numeric
characters and 2 alphabetical characters. The first 4 numeric characters comply with nominal
dimension E x D which refers to applicable maximum width and length of FBGA/FLGA
package.
The last 2 alphabetical characters refer to socket base matrix size either an even or an odd.
It refers to an odd contact row by “A” and an even contact row by “B” in order socket width
direction and next socket length direction.
Namely, it refers to “AA” in case row number is an odd both for width and length direction,
“BB” in case row number is an even both for width and length direction, “AB” in case row
number is an odd at width direction and an even at length direction and “BA” in case row
number is an even at width direction and an odd at length direction.
d) Number of terminal arrays
The symbol for number of terminal arrays shall be expressed by 4 numeric characters
applying applicable package matrix size in E direction and D direction.
e) Terminal pitch
The symbol for terminal pitch of applicable package shall be expressed in 3 numeric
characters. A decimal [.] is omitted.
5 Terminal number
The terminal number is provided in the following manner when the socket is viewed with the
angle from topside. The horizontal row nearest to the index corner when the index is placed
on the left topside is referred to as A.
As the row moves down, the number changes in the order of B, C, ……. AA, AB.
1 is defined for the vertical row nearest to the index corner. As the row moves rightward, the
number is increased 2, 3, …… The terminal number is combined with these alphabets and
numbers and expressed as A1 or B1. I, O, Q, S, X and Z are not used as symbols for a
horizontal row.
6 Socket nominal dimension
The applic
...
IEC 60191-6-13
Edition 1.0 2007-06
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Mechanical standardization of semiconductor devices –
Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid
Array and Fine-pitch Land Grid Array (FBGA/FLGA)
Normalisation mécanique des dispositifs à semiconducteurs –
Partie 6-13: Guide de conception pour les supports sans couvercle pour les
boîtiers matriciels à billes et à pas fins et les boîtiers matriciels à zone de
contact plate et à pas fins (FBGA/FLGA)
All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized in any form or by
any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from either IEC or
IEC's member National Committee in the country of the requester.
If you have any questions about IEC copyright or have an enquiry about obtaining additional rights to this publication,
please contact the address below or your local IEC member National Committee for further information.
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publication, utilisez les coordonnées ci-après ou contactez le Comité national de la CEI de votre pays de résidence.
IEC Central Office
3, rue de Varembé
CH-1211 Geneva 20
Switzerland
Email: inmail@iec.ch
Web: www.iec.ch
About the IEC
The International Electrotechnical Commission (IEC) is the leading global organization that prepares and publishes
International Standards for all electrical, electronic and related technologies.
About IEC publications
The technical content of IEC publications is kept under constant review by the IEC. Please make sure that you have the
latest edition, a corrigenda or an amendment might have been published.
ƒ Catalogue of IEC publications: www.iec.ch/searchpub
The IEC on-line Catalogue enables you to search by a variety of criteria (reference number, text, technical committee,…).
It also gives information on projects, withdrawn and replaced publications.
ƒ IEC Just Published: www.iec.ch/online_news/justpub
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IEC 60191-6-13
Edition 1.0 2007-06
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Mechanical standardization of semiconductor devices –
Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid
Array and Fine-pitch Land Grid Array (FBGA/FLGA)
Normalisation mécanique des dispositifs à semiconducteurs –
Partie 6-13: Guide de conception pour les supports sans couvercle pour les
boîtiers matriciels à billes et à pas fins et les boîtiers matriciels à zone de
contact plate et à pas fins (FBGA/FLGA)
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
PRICE CODE
INTERNATIONALE
N
CODE PRIX
ICS 31.080.01 ISBN 978-2-88910-064-4
– 2 – 60191-6-13 © IEC:2007
CONTENTS
FOREWORD.3
1 Scope.5
2 Normative references .5
3 Terms and definitions .5
4 Socket code .5
4.1 Construction of socket code .5
4.2 Symbols .6
5 Terminal number .6
6 Socket nominal dimension .7
7 Socket length and width .7
8 Reference symbols and schematics.7
8.1 Outline drawings .7
8.2 Reference symbols and schematics of recommended socket mounting
pattern on printed circuit board.9
8.3 Overall dimensions.10
8.4 Recommended dimensions of socket mounting pattern on printed circuit
board .14
9 Individual outline drawing standard registration .15
Figure 1 – Outline drawings of the socket .8
Figure 2 – Applicable package outline.8
Figure 3 – Socket mounting pattern .9
Table 1 – Overall dimensions.10
Table 2 – Socket dimensions .12
Table 2a – Socket dimensions for Group 1, 2 and 3（square socket）.12
Table 2b – Socket dimension for Group 4 (square or rectangular socket).13
Table 3 – Socket mounting dimensions .14
Table 4 – Registration table .15
60191-6-13 © IEC:2007 – 3 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
_______________
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –
Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball
Grid Array and Fine-pitch Land Grid Array (FBGA/FLGA)
FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC provides no marking procedure to indicate its approval and cannot be rendered responsible for any
equipment declared to be in conformity with an IEC Publication.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 60191-6-13 has been prepared by subcommittee 47D: Mechanical
standardization for semiconductor devices, of IEC technical committee 47: Semiconductor
devices.
This bilingual version, published in 2008-09, corresponds to the English version.
The text of this standard is based on the following documents:
FDIS Report on voting
47D/681/FDIS 47D/692/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
The French version of this standard has not been voted upon.
– 4 – 60191-6-13 © IEC:2007
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
A list of all the parts in the IEC 60191 series, under the general title Mechanical
standardization of semiconductor devices, can be found on the IEC website.
The committee has decided that the contents of this publication will remain unchanged until
the maintenance result date indicated on the IEC web site under "http://webstore.iec.ch" in
the data related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
60191-6-13 © IEC:2007 – 5 –
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –
Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball
Grid Array and Fine-pitch Land Grid Array (FBGA/FLGA)
1 Scope
This part of IEC 60191 gives a design guideline of open-top-type semiconductor sockets for
Fine-pitch Ball Grid Array (“FBGA” hereafter) and Fine-pitch Land Grid Array (“FLGA”
hereafter). This standard is intended to establish the outline drawings and dimensions of the
open-top-type socket out of the test and burn-in sockets applied to FBGA and FLGA.
2 Normative references
The following referenced documents are indispensable for the application of this document.
For dated references, only the edition cited applies. For undated references, the latest edition
of the referenced document (including any amendments) applies.
IEC 60191-2, Mechanical standardization of semiconductor devices
...
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