WG 15 - TC 91/WG 15

IEC 61636-2:2023 (E) provides the definition of an exchange format, utilizing XML, for exchanging maintenance action information (MAI) associated with the removal, repair, and replacement of system components to maintain/support an operational system. This standard is published as a double log IEC-IEEE standard.

IEC 61671-4:2016(E) defines an exchange format, utilizing extensible markup language (XML), for identifying all of the hardware, software, and documentation that is needed to test and diagnose a unit under test (UUT) on an ATS.

IEC 61671-6:2016(E) defines an exchange format, utilizing eXtensible Markup Language (XML), for both the static description of a test station, and the specific description of test station instance information.

IEC 61672-5:2016(E) defines an exchange format, utilizing extensible markup language (XML), for both the static description of a test adapter by defining the interface between the unit under test (UUT) and the test station, and the specific description of test adapter instance information.

IEC 61671-2:2016(E) defines an exchange format, utilizing extensible markup language (XML), for both the static description of instrument models, and the specific description of instrument instance information.

IEC 62243:2012(E) defines formal specifications for supporting system diagnosis. These specifications support the exchange and processing of diagnostic information and the control of diagnostic processes. Diagnostic processes include, but are not limited to, testability analysis, diagnosability assessment, diagnostic reasoning, maintenance support, and diagnostic maturation.

IEC 61671:2012(E) defines a standard exchange medium for sharing information between components of ATSs. This information includes test data, resource data, diagnostic data, and historic data. The exchange medium is defined using XML. This standard specifies the framework for the family of ATML standards.

IEC 61445:2012(E) defines the information content and the data formats for the interchange of digital test program data between DATPGs and automatic test equipment (ATE) for board-level printed circuit assemblies. This information can be broadly grouped into data that defines the following:
a) UUT Model;
b) Stimulus and Response;
c) Fault Dictionary;
d) Probe.

IEC 62529:2012(E) provides the means to define and describe signals used in testing. It provides a set of common basic signal definitions, built upon formal mathematical specifications, so that signals can be combined to form complex signals usable across all test platforms. The standard provides support for structural textual languages and programming language interfaces for interoperability. This second edition cancels and replaces the first edition, published in 2007, and constitutes a technical revision.

Defines a test description language that: Facilitates the transfer of large volumes of digital test vector data from CAE environments to automated test equipment ATE environments; Specifies pattern, format, and timing information sufficient to define the application of digital test vectors to a device under test (DUT); Supports the volume of test vector data generated from structured tests such as scan/automatic test pattern generation (ATPG), integral test techniques such as built-in self test (BIST), and functional test specifications for IC designs and their assemblies, in a format optimized for application in ATE environments.

STIL language constructs are defined to specify the DC conditions necessary to excute digital vectors on automated test equipment(ATE). STIL language extensions include structures for:(a) specifying the DC conditions for a device under test; specifying DC conditions either globally, by pattern burst, by pattern, or by vector;(c) specifying alternate DC levels;and (d) selecting DC levels and alternate levels within a period, much the same as timed format events.

Defines a mechanism for the test of core designs within a system on chip (SoC).This mechanism constitutes a hardware architecture and leverages the core test language (CTL)to faciliate communication between core designers and core integrators.

Provides an interface between digital test generation tools and test equipment. A test description language is defined that:(a) facilitates the transfer of digital test vector data from CAE to ATE environments;(b) specifies patten, format, and timing information sufficant to define the application of digital test vectors to a DUT;and (c) supports the volume of test vector data generated from structured tests.

Defines a high order language for electronics testing independent of any specific test system. Can be implemented on automatic test equipement (ATE)