Semiconductor devices - Micro-electromechanical devices - Part 45: Silicon based MEMS fabrication technology - Measurement method of impact resistance of nanostructures

IEC 62047-45:2025 specifies the requirements and testing method to measure the impact resistance of nanostructures which are fabricated by micromachining technology used in silicon-based micro-electromechanical system (MEMS).
This document is applicable to the in-situ impact resistance measurement of nanostructures manufactured by microelectronic technology process and other micromachining technology.
In the production of MEMS devices, due to the micro/nano size, the non-ideal effect of fabrication is greatly amplified compared with the macroscale. Surface defects, line width loss, and residual stress can occur in the fabricated object, resulting in severe fluctuations in the mechanical strength of MEMS devices. This document specifies an in-situ measurement method for the impact resistance of nanostructures based on MEMS technology to extract the impact strength of actual manufactured structures. This test method does not need intricated instruments (such as scanning probe microscopy and nanoindenter) and special test specimens.
Since the in-situ on-chip tester in this document can be implanted in device fabrication as a standard detection pattern, this document can provide a bridge, by which the fabrication part can give some quantitative reference for the design part.

General Information

Status
Published
Publication Date
19-Mar-2025
Current Stage
PPUB - Publication issued
Start Date
20-Mar-2025
Completion Date
11-Apr-2025

Overview

IEC 62047-45:2025 defines an in‑situ, on‑chip measurement method for the impact resistance of nanostructures fabricated by silicon‑based micromachining for MEMS (micro‑electromechanical systems). The standard specifies design, fabrication and test‑method requirements for an on‑chip tester that applies controlled impact energy to nanostructures (for example cantilevers or fixed beams) and extracts their actual impact strength without specialized external instruments such as scanning probe microscopy or nanoindenters.

Key topics and requirements

  • Scope: Measurement method for nanostructures made by microelectronic and other micromachining processes; intended for use in real manufacturing environments.
  • In‑situ on‑chip tester: Integrates a testing structure and a testing device on a single chip (test structure, shock hammer, energy‑storage beam, fuse, baffle, anchor, load beam). The tester is axisymmetric and aligned so the impact hammer strikes the test structure along its symmetry axis.
  • Design constraints: Energy‑storage beam dimensions (length l, width w), fuse width W, and displacement D must be chosen so the fuse will break at the designed stored energy while other tester parts remain intact. Designs must respect etch limits for line/gap sizes; Annex A gives example thermal‑drive designs and recommended dimensions.
  • Fabrication: Tester must be fabricated with the same processes and materials as the target MEMS device (e.g., crystalline silicon movable layers). This allows implantation of the tester as a standard detection pattern on production wafers.
  • Test method: A drive (off‑chip probe, on‑chip thermal drive, or on‑chip electrostatic drive) slowly increases force, moving the baffle until the fuse is broken and the impact hammer is released. Damage and deformation are then observed (electron or confocal microscope). Tests are repeated with different D values to find the minimum displacement that causes fracture; impact energy is computed per the method (see clause 5.4).
  • Environment: Testing occurs in the actual manufacturing environment (on‑chip, on‑wafer) to capture process‑related variability (surface defects, linewidth loss, residual stress).

Applications and users

  • Who benefits: MEMS process engineers, device designers, quality assurance teams, and reliability engineers.
  • Practical uses: Inline process control, wafer‑level reliability assessment, design‑for‑manufacturing feedback, and bridging fabrication variability to design margins. Implanting the on‑chip tester as a standard detection pattern enables quantitative manufacturing feedback without specialized lab equipment.
  • SEO keywords: IEC 62047-45:2025, MEMS impact resistance, in‑situ on‑chip tester, nanostructure testing, silicon MEMS fabrication, micromachining impact test.

Related standards

  • Other parts of the IEC 62047 series addressing semiconductor MEMS topics and general ISO/IEC directives for standards development (see IEC website for the series list).
Standard

IEC 62047-45:2025 - Semiconductor devices - Micro-electromechanical devices - Part 45: Silicon based MEMS fabrication technology - Measurement method of impact resistance of nanostructures Released:20. 03. 2025 Isbn:9782832703045

English language
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Frequently Asked Questions

IEC 62047-45:2025 is a standard published by the International Electrotechnical Commission (IEC). Its full title is "Semiconductor devices - Micro-electromechanical devices - Part 45: Silicon based MEMS fabrication technology - Measurement method of impact resistance of nanostructures". This standard covers: IEC 62047-45:2025 specifies the requirements and testing method to measure the impact resistance of nanostructures which are fabricated by micromachining technology used in silicon-based micro-electromechanical system (MEMS). This document is applicable to the in-situ impact resistance measurement of nanostructures manufactured by microelectronic technology process and other micromachining technology. In the production of MEMS devices, due to the micro/nano size, the non-ideal effect of fabrication is greatly amplified compared with the macroscale. Surface defects, line width loss, and residual stress can occur in the fabricated object, resulting in severe fluctuations in the mechanical strength of MEMS devices. This document specifies an in-situ measurement method for the impact resistance of nanostructures based on MEMS technology to extract the impact strength of actual manufactured structures. This test method does not need intricated instruments (such as scanning probe microscopy and nanoindenter) and special test specimens. Since the in-situ on-chip tester in this document can be implanted in device fabrication as a standard detection pattern, this document can provide a bridge, by which the fabrication part can give some quantitative reference for the design part.

IEC 62047-45:2025 specifies the requirements and testing method to measure the impact resistance of nanostructures which are fabricated by micromachining technology used in silicon-based micro-electromechanical system (MEMS). This document is applicable to the in-situ impact resistance measurement of nanostructures manufactured by microelectronic technology process and other micromachining technology. In the production of MEMS devices, due to the micro/nano size, the non-ideal effect of fabrication is greatly amplified compared with the macroscale. Surface defects, line width loss, and residual stress can occur in the fabricated object, resulting in severe fluctuations in the mechanical strength of MEMS devices. This document specifies an in-situ measurement method for the impact resistance of nanostructures based on MEMS technology to extract the impact strength of actual manufactured structures. This test method does not need intricated instruments (such as scanning probe microscopy and nanoindenter) and special test specimens. Since the in-situ on-chip tester in this document can be implanted in device fabrication as a standard detection pattern, this document can provide a bridge, by which the fabrication part can give some quantitative reference for the design part.

IEC 62047-45:2025 is classified under the following ICS (International Classification for Standards) categories: 31.080.99 - Other semiconductor devices. The ICS classification helps identify the subject area and facilitates finding related standards.

You can purchase IEC 62047-45:2025 directly from iTeh Standards. The document is available in PDF format and is delivered instantly after payment. Add the standard to your cart and complete the secure checkout process. iTeh Standards is an authorized distributor of IEC standards.

Standards Content (Sample)


IEC 62047-45 ®
Edition 1.0 2025-03
INTERNATIONAL
STANDARD
Semiconductor devices – Micro-electromechanical devices –
Part 45: Silicon based MEMS fabrication technology – Measurement method of
impact resistance of nanostructures

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IEC 62047-45 ®
Edition 1.0 2025-03
INTERNATIONAL
STANDARD
Semiconductor devices – Micro-electromechanical devices –

Part 45: Silicon based MEMS fabrication technology – Measurement method of

impact resistance of nanostructures

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 31.080.99  ISBN 978-2-8327-0304-5

– 2 – IEC 62047-45:2025 © IEC 2025
CONTENTS
FOREWORD . 3
1 Scope . 5
2 Normative references . 5
3 Terms and definitions . 5
4 Requirements . 6
4.1 General . 6
4.2 In situ on-chip tester design requirements . 6
4.3 In-situ on-chip tester fabrication requirements . 9
4.4 Testing environment requirements . 9
5 Testing method. 9
5.1 General . 9
5.2 Operation process . 9
5.3 Nanostructure impact resistance testing method operation requirements . 10
5.4 Nanostructure impact resistance testing method result process . 10
6 Test report . 11
Annex A (informative) Example of thermal-drive in-situ on-chip nanostructure impact
tester . 12
A.1 General . 12
A.2 Design dimensions of the testing device . 12
A.3 Microstructures bending strength test . 14
Bibliography . 15

Figure 1 – The in-situ on-chip nanostructure impact tester . 7
Figure 2 – The three-view drawing of the in-situ on-chip tester . 8
Figure 3 – Nanostructure impact resistance testing method operation process . 10
Figure A.1 – Scheme of the thermal-drive impact tester . 12
Figure A.2 – The three-view drawing of the thermal-drive impact tester . 13
Figure A.3 – Test area . 14

Table A.1 – Dimensions for testing device . 13
Table A.2 – Microstructure bending strength test results . 14

INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
SEMICONDUCTOR DEVICES –
MICRO-ELECTROMECHANICAL DEVICES –

Part 45: Silicon based MEMS fabrication technology –
Measurement method of impact resistance of nanostructures

FOREWORD
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IEC 62047-45 has been prepared by subcommittee 47F: Microelectromechanical systems, of
IEC technical committee 47: Semiconductor devices. It is an International Standard.
The text of this International Standard is based on the following documents:
Draft Report on voting
47F/497/FDIS 47F/504/RVD
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.

– 4 – IEC 62047-45:2025 © IEC 2025
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available
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devices – Micro-electromechanical devices, can be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under webstore.iec.ch in the data related to the
specific document. At this date, the document will be
• reconfirmed,
• withdrawn, or
• revised.
SEMICONDUCTOR DEVICES –
MICRO-ELECTROMECHANICAL DEVICES –

Part 45: Silicon based MEMS fabrication technology –
Measurement method of impact resistance of nanostructures

1 Scope
This part of IEC 62047 specifies the requirements and testing method to measure the impact
resistance of nanostructures which are fabricated by micromachining technology used in silicon-
based micro-electromechanical system (MEMS).
This document is applicable to the in-situ impact resistance measurement of nanostructures
manufactured by microelectronic technology process and other micromachining technology.
In the production of MEMS devices, due to the micro/nano size, the non-ideal effect of
fabrication is greatly amplified compared with the macroscale. Surface defects, line width loss,
...

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