EN 16602-70-38:2019

SLOVENSKI STANDARD
01-julij-2019
Zagotavljanje kakovosti proizvodov v vesoljski tehniki - Visoka zanesljivost
spajkanja za površinsko montažo in mešano tehnologijo
Space product assurance - High-reliability soldering for surface-mount and mixed
technology
Raumfahrtproduktsicherung - Hochzuverlässiges Löten von Oberflächen-Befestigungen
und gemischte Technologien
Assurance produit spatiale - Soudure haute fiabilité pour technologies à montage de
surface et mixte
Ta slovenski standard je istoveten z: EN 16602-70-38:2019
ICS:
25.160.50 Trdo in mehko lotanje Brazing and soldering
49.140 Vesoljski sistemi in operacije Space systems and
operations
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

EUROPEAN STANDARD
EN 16602-70-38
NORME EUROPÉENNE
EUROPÄISCHE NORM
April 2019
ICS 25.160.50; 49.140
English version
Space product assurance - High-reliability soldering for
surface-mount and mixed technology
Assurance produit des projets spatiaux - Soudure Raumfahrtproduktsicherung - Hochzuverlässiges
haute fiabilité pour technologies à montage de surface Löten von Oberflächen-Befestigungen und gemischte
et mixte Technologien
This European Standard was approved by CEN on 5 October 2018.

CEN and CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for
giving this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical
references concerning such national standards may be obtained on application to the CEN-CENELEC Management Centre or to
any CEN and CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by
translation under the responsibility of a CEN and CENELEC member into its own language and notified to the CEN-CENELEC
Management Centre has the same status as the official versions.

CEN and CENELEC members are the national standards bodies and national electrotechnical committees of Austria, Belgium,
Bulgaria, Croatia, Cyprus, Czech Republic, Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany,
Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, Netherlands, Norway, Poland, Portugal, Romania,
Serbia, Slovakia, Slovenia, Spain, Sweden, Switzerland, Turkey and United Kingdom.

CEN-CENELEC Management Centre:
Rue de la Science 23, B-1040 Brussels
© 2019 CEN/CENELEC All rights of exploitation in any form and by any means Ref. No. EN 16602-70-38:2019 E
reserved worldwide for CEN national Members and for
CENELEC Members.
Table of contents
European Foreword . 11
Introduction . 12
1 Scope . 15
2 Normative references . 16
3 Terms, definitions and abbreviated terms . 18
3.1 Terms from other standards . 18
3.2 Terms specific to the present standard . 18
3.3 Abbreviated terms. 20
3.4 Nomenclature . 21
3.4.1 Formal verbs . 21
4 Principles of reliable soldered connections . 22
5 Process identification document (PID) . 23
5.1 General . 23
5.1.1 Purpose . 23
5.1.2 Document preparation . 23
5.1.3 <> . 23
5.1.4 Approval . 23
5.1.5 SMT contact person . 24
5.2 <> . 24
5.3 Process identification document updating . 24
6 Preparatory conditions . 25
6.1 Calibration . 25
6.2 Facility cleanliness . 25
6.3 Environmental conditions . 25
6.4 Precautions against static charges . 25
6.5 Lighting requirements . 25
6.6 Equipment and tools . 25
6.6.1 Brushes . 25
6.6.2 Cutters and Pliers . 26
6.6.3 Bending tools . 26
6.6.4 Clinching tools . 26
6.6.5 Insulation strippers . 26
6.6.6 Soldering tools . 26
6.6.7 Soldering irons and resistance soldering equipment . 26
6.6.8 <> . 26
6.6.9 Solder baths for degolding and pretinning . 26
6.7 Soldering machines and equipment . 27
6.7.1 General . 27
6.7.2 Dynamic wave-solder machines . 27
6.7.3 Condensation (vapour phase) reflow machines . 28
6.7.4 Hot gas reflow machines . 28
6.7.5 <> . 28
6.7.6 Convection and radiation reflow systems . 28
6.7.7 Other equipment for reflow soldering . 29
6.8 Ancillary equipment . 29
6.8.1 General . 29
6.8.2 Solder deposition equipment . 29
6.8.3 Automatic device placement equipment . 29
6.8.4 <> . 29
6.8.5 Cleanliness testing equipment . 30
6.8.6 Magnification aids . 30
6.8.7 X-ray inspection equipment . 30
6.8.8 Metallographic equipment . 30
7 Material selection . 31
7.1 General . 31
7.2 Solder . 31
7.2.1 Form . 31
7.2.2 Composition . 31
7.2.3 Solder paste . 31
7.2.4 Maintenance of paste purity . 33
7.3 Flux . 33
7.3.1 Rosin based flux . 33
7.3.2 Corrosive acid flux. 33
7.3.3 Flux controls for wave-soldering equipment . 33
7.4 Solvents . 33
7.5 Flexible insulation materials . 34
7.6 Terminals . 34
7.7 Wires . 34
7.8 Printed circuit substrates. 34
7.8.1 <> . 34
7.8.2 <> . 34
7.8.3 <> . 34
7.8.4 <> . 34
7.8.5 <> . 35
7.8.6 <> . 35
7.9 Devices . 35
7.9.1 General . 35
7.9.2 <> . 36
7.9.3 Moisture sensitive devices . 36
7.9.4 <> . 36
7.10 Adhesives, encapsulants and conformal coatings . 36
8 Preparation for soldering . 38
8.1 Preparation of devices and terminals . 38
8.1.1 Preparation of wires and terminals . 38
8.1.2 Preparation of surfaces to be soldered . 38
8.1.3 Degolding and pretinning of conductors . 38
8.1.4 Alloying of pure tin finish . 38
8.2 Preparation of solder bit . 39
8.3 Handling . 39
8.4 Storage . 39
8.5 Baking of PCBs and moisture sensitive devices . 39
9 Mounting of devices prior to soldering . 40
9.1 General requirements . 40
9.2 Lead bending and cutting requirements . 40
9.3 Mounting of terminals to PCBs. 40
9.4 Lead attachment to through holes . 40
9.5 Mounting of devices to terminals . 40
9.6 Mounting of through hole connectors to PCBs . 40
9.7 Surface mount requirements . 41
9.7.1 General . 41
9.7.2 Stress relief . 41
9.7.3 Registration of devices and footprints . 42
9.7.4 Lead forming . 42
9.7.5 Mounting devices in solder paste . 42
9.7.6 Leadless devices . 43
9.7.7 Leaded devices . 43
9.7.8 <> . 43
9.7.9 Stacking and bonding of heavy devices . 43
10 Attachment of conductors to terminals, solder cups and cables . 45
11 Soldering to printed circuit boards . 46
11.1 General . 46
11.2 <> . 46
11.3 Solder applications to PCBs . 46
11.4 Wicking . 46
11.5 Soldering of SMDs . 46
11.5.1 General requirements . 46
11.5.2 End-capped and end-metallized devices . 47
11.5.3 Bottom terminated chip devices . 49
11.5.4 Cylindrical and square end-capped devices . 50
11.5.5 Castellated chip carrier devices. 52
11.5.6 Flat pack and Gull-wing leaded devices with round, rectangular,
ribbon leads . 53
11.5.7 Devices with “J” leads . 54
11.5.8 Area array devices . 54
11.5.9 Devices with ribbon terminals without stress relief . 56
11.5.10 L-Shape inwards devices . 57
11.5.11 Stacked modules devices with leads protruding vertically from bottom. 58
11.5.12 Leaded device with plane termination . 59
11.5.13 Moulded magnetics . 59
11.6 <> . 60
11.7 <> . 60
11.8 <> . 60
12 Cleaning of PCB assemblies . 61
12.1 General . 61
12.2 Ultrasonic cleaning . 61
12.3 Monitoring for cleanliness . 61
13 Final inspection . 62
13.1 General . 62
13.2 Acceptance criteria . 62
13.3 Visual rejection criteria . 63
13.4 X-ray rejection criterion . 65
13.5 Warp and twist of populated boards . 65
13.6 Inspection records . 65
14 Verification procedure. 66
14.1 General . 66
14.2 Verification by similarity . 68
14.2.1 General . 68
14.2.2 Conditions for similarity . 69
14.3 Verification programme . 71
14.4 Electrical testing of devices . 75
14.4.1 General . 75
14.5 Vibration and shock . 78
14.6 Temperature cycling test. 78
14.7 Microsection . 79
14.7.1 Microsection facilities . 79
14.7.2 Microsectioning . 79
14.8 <> . 95
14.9 Special verification testing for hermetic ceramic area array packages . 95
14.9.1 <> . 95
14.9.2 <> . 95
14.9.3 General . 95
14.9.4 Evaluation of capability samples . 98
14.9.5 Verification . 98
14.10 Verification acceptance and rejection criteria . 99
14.11 Approval of verification . 108
14.12 Withdrawal of approval status . 108
14.13 Conditions for delta verification . 108
14.14 Verification of cleanliness . 111
14.15 Verification approval procedure . 111
14.15.1 Request for verification . 111
14.15.2 Technology sample . 111
14.15.3 Audit of assembly processing . 111
14.15.4 Verification programme . 112
14.15.5 Final verification review . 112
14.15.6 Certification approval of assembly line . 112
15 Quality assurance . 113
15.1 General . 113
15.2 Data . 113
15.3 Nonconformance . 113
15.4 Calibration . 113
15.5 Traceability . 113
15.6 Workmanship standards . 113
15.7 Inspection . 114
15.8 Operator and inspector training and certification . 114
15.9 Quality records . 114
16 <> . 115
Annex A (informative) <> . 116
Annex B (informative) < Annex H>> . 117
Annex C (informative) <> . 118
Annex D (informative) Example of an SMT audit report . 119
Annex E (informative) Additional information . 128
E.1 <> . 128
E.2 Melting temperatures and choice . 128
Annex F (normative) Process Identification Document (PID) - DRD . 129
F.1 DRD identification . 129
F.1.1 Requirement identification and source document . 129
F.1.2 Purpose and objective . 129
F.2 Expected response . 129
F.2.1 Scope and content . 129
F.2.2 Special remarks . 131
Annex G (normative) Verification programme report - DRD . 132
G.1 DRD identification . 132
G.1.1 Requirement identification and source document . 132
G.1.2 Purpose and objective . 132
G.2 Expected response . 132
G.2.1 Scope and content . 132
G.2.2 Special remarks . 133
Annex H (normative) SMT summary table - DRD . 134
H.1 DRD identification . 134
H.1.1 Requirement identification and source document . 134
H.1.2 Purpose and objective . 134
H.2 Expected response . 134
H.2.1 Scope and content . 134
H.2.2 Special remarks . 134
Annex I (informative) Visual and X-ray workmanship standards . 136
I.1 Workmanship illustrations for standard SMDs . 136
I.1.1 Chip components . 136
I.1.2 MELF components . 139
I.1.3 Gull-wing leaded devices with round, rectangular, ribbon shape . 140
I.1.4 “J” leaded devices . 142
I.1.5 L-shape Inward leaded component . 144
I.1.6 LCC devices. 144
I.1.7 Miscellaneous soldering defects. 145
I.2 Workmanship illustrations for ball grid array devices . 146
I.3 Workmanship illustrations for column grid array devices . 148
Bibliography . 151

Figures
Figure 9-1: Exposed element. 43
Figure 11-1: Mounting of rectangular and square end-capped and end-metallized
devices . 48
Figure 11-2: Mounting of bottom terminated chip devices . 49
Figure 11-3: Mounting of cylindrical end-capped devices . 50
Figure 11-4: Mounting of square end-capped devices . 51
Figure 11-5: Mounting of castellated chip carrier devices . 52
Figure 11-6: Mounting of gull-wing leaded devices with round, rectangular, ribbon leads . 53
Figure 11-7: Mounting of devices with “J” leads . 54
Figure 11-8: <> . 55
Figure 11-9: Typical ceramic area array showing ball grid array configuration on left
and column grid array on right (CBGA & CCGA) . 55
Figure 11-10: Typical assembled CCGA device . 55
Figure 11-11: Mounting of devices without stress relief . 56
Figure 11-12: Mounting of devices with “L-shape inwards” leads (1 = Toe, 2 = Heel) . 57
Figure 11-13: Mounting of stacked modules devices with leads protruding vertically
from bottom . 58
Figure 11-14: Mounting of leaded devices with leads with plane termination . 59
Figure 11-15: <> . 60
Figure 14-1: Verification programme flow chart (standard flow) . 74
Figure 14-2: Verification programme flow chart (electrical testing) . 77
Figure 14-3: Verification programme flow chart (AAD) . 97
Figure 14-4: <> . 100

Figure I-1 : Preferred solder (see also Table 11-1) . 136
Figure I-2 : Acceptable, maximum solder (see also Table 11-1) . 136
Figure I-3 : Acceptable, minimum Solder (see also Table 11-1) . 137
Figure I-4 : Unacceptable, excessive solder (see also Table 11-1) . 137
Figure I-5 : Unacceptable, poor wetting (see also Table 11-1) . 137
Figure I-6 : Unacceptable, excessive tilt (see also Table 11-1) . 138
Figure I-7 : Unacceptable, tombstone effect . 138
Figure I-8 : Examples of Unacceptable solder joints - (see also Table 11-1) . 138
Figure I-9 : Acceptable, terminal wetted along end, face and sides (see also Table 11-1) . 139
Figure I-10 : Acceptable, maximum solder joint (see also Table 11-3) . 139
Figure I-11 : Not Acceptable, insufficient solder joint (see also Table 11-3) . 139
Figure I-12 : Unacceptable overhang . 139
Figure I-13 : Examples of Gullwing leads: Acceptable . 140
Figure I-14 : Examples of gull-wing device with rectangular lead: Acceptable . 140
Figure I-15 : Acceptable, minimum solder joint . 140
Figure I-16 : Unacceptable, insufficient heel fillet . 141
Figure I-17 : Unacceptable, excessive solder . 141
Figure I-18 : Unacceptable, excessive solder . 141
Figure I-19 : Preferred solder joint . 142
Figure I-20 : Acceptable solder joint . 142
Figure I-21 : Unacceptable, excessive solder joint . 143
Figure I-22 : Unacceptable, excessive degolding. 143
Figure I-23 : Acceptable, preferred solder joint . 144
Figure I-24 : LCC General view, acceptable solder joints . 144
Figure I-25 : Examples of unacceptable soldering . 145
Figure I-26 : Angled-transmission X-radiograph showing solder paste shadow due to
partial reflow: Reject . 146
Figure I-27 : Micrograph showing . 146
Figure I-28 : Perpendicular transmission X-radiograph showing unacceptable defects . 147
Figure I-29 : Perpendicular transmission X-radiograph showing non-wetted footprint . 147
Figure I-30 : Underside view showing missing column. 148
Figure I-31 : CGA mounted on PCB showing columns tilted < 10°: Accept . 148
Figure I-32 : X-radiograph of CGA mounted on PCB showing solder bridge: Reject . 149
Figure I-33 : X-radiograph of CGA showing solder fillets at base of columns: acceptable . 149
Figure I-34 : Micrograph of CGA mounted on PCB, bent column: reject . 150
Figure I-35 : Micrograph of CGA mounted on PCB . 150

Tables
Table 7-1: Chemical composition of spacecraft solders . 32
Table 7-2: <> . 34
Table 11-1: Dimensional and solder fillet for rectangular and square end capped
devices . 48
Table 11-2: Dimensional and solder fillet for bottom terminated chip devices . 49
Table 11-3: Dimensional and solder fillet for cylindrical end-capped devices . 50
Table 11-4: Dimensional and solder fillet for square end-capped devices . 51
Table 11-5: Dimensional and solder fillet for castellated chip carrier devices . 52
Table 11-6: Dimensional and solder fillet for gull-wing leaded devices with round,
rectangular, ribbon leads . 53
Table 11-7: Dimensional and solder fillet for devices with “J” leads . 54
Table 11-8: Dimensional and solder fillet for area array devices . 55
Table 11-9: Dimensional and solder fillet for devices without stress relief . 56
Table 11-10: Dimensional and solder fillet for “L-shape inwards” devices . 57
Table 11-11: Dimensional and solder fillet for stacked modules devices with leads
protruding vertically from bottom . 58
Table 11-12: Dimensional and solder fillet for leaded devices with plane termination . 59
Table 14-1: Device type classification . 68
Table 14-2: Device microsection location . 81
Table 14-3: Critical zone definition per device type and acceptance criteria . 101
Table 14-4: Conditions invoking verification . 110

Table E-1 : Guide for choice of solder type . 128
Table H-1 : Device type preparation and mounting configuration . 135

European Foreword
This document (EN 16602-70-38:2019) has been prepared by Technical
Committee CEN-CENELEC/TC 5 “Space”, the secretariat of which is held by
DIN.
This standard (EN 16602-70-38:2019) originates from ECSS-Q-ST-70-38C Rev.1.
This European Standard shall be given the status of a national standard, either
by publication of an identical text or by endorsement, at the latest by October
2019, and conflicting national standards shall be withdrawn at the latest by
October 2019.
Attention is drawn to the possibility that some of the elements of this document
may be the subject of patent rights. CEN [and/or CENELEC] shall not be held
responsible for identifying any or all such patent rights.
This document has been prepared under a standardization request given to
CEN by the European Commission and the European Free Trade Association.
This document has been developed to cover specifically space systems and has
therefore precedence over any EN covering the same scope but with a wider
domain of applicability (e.g. : aerospace).
According to the CEN-CENELEC Internal Regulations, the national standards
organizations of the following countries are bound to implement this European
Standard: Austria, Belgium, Bulgaria, Croatia, Cyprus, Czech Republic,
Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France,
Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania,
Luxembourg, Malta, Netherlands, Norway, Poland, Portugal, Romania, Serbia,
Slovakia, Slovenia, Spain, Sweden, Switzerland, Turkey and the United
Kingdom.
Introduction
This Standard prescribes requirements for electrical connections of leadless and
leaded surface mounted devices (SMD) on spacecraft and associated
equipment, utilising a range of substrate assemblies and employing solder as
the interconnection media. The principal types of SMDs can be gathered in the
following families:
Rectangular and square end-capped or end-metallized
device with rectangular body, leadless chip (see 11.5.2)
e.g. end capped chip resistors and end capped chip capacitors.

Cylindrical and square end-capped devices with
cylindrical body, leadless chip (see 11.5.4)

e.g. MELF for cylindrical end capped or
e.g. D-5A for square end capped

Bottom terminated chip device (see 11.5.3)
This type of device has metallised terminations on the bottom
side only.
e.g. inductors and SMD0.5, SMD1, SMD2, SMD0.2, SMD0.22

e.g. Quad Flat Pack No lead (QFN)

Castellated chip carrier device (see 11.5.5)
The main device of this type is leadless ceramic chip carrier
(LCCC).
e.g. LCC6
Flat pack and gull-wing leaded device with round,
rectangular , ribbon leads (see 11.5.6)
e.g. small-outline transistor (SOT), small—outline package (SO),
flat pack and quad flat pack (QFP) and SMD connectors with
stress-relief.
This family also comprises devices for through-hole mounting
that have been reconfigured to surface mounting.
Moulded magnetics (see 11.5.13)
e.g. 1553 interface transformers or specific transformers

“J” leaded device (see 11.5.7)
e.g. ceramic leaded chip carriers (CLCC) and plastic
leaded chip carriers (PLCC).
Area array devices (AAD) (see 11.5.8)
The interconnections between solder footprints on the devices
and solder footprints on the PCB consist entirely of solder.
The devices have either solder balls (Ball Grid Array - BGA) or
solder columns (Column Grid Array - CGA) applied to the
solder footprints on the devices prior to mounting on a PCB
(normally done by the device manufacturer). The solder balls on
the BGAs can consist of either eutectic solder or high
temperature solder (5 - 10 % Sn) whereas the solder columns on

the CGAs always consist of high temperature solder. Although
BGAs are usually presented as a device family, there exist a
large number of BGA devices with wide-ranging properties. The
vast majority of BGA devices are non hermetic.
Devices with ribbon terminals without stress relief (flat
lug leads) (see 11.5.9)
This package has flat leads extending from the sides

Device with Inward formed L-shaped leads (see 11.5.10)
e.g. moulded tantalum chip capacitors.

Stacked modules devices with leads protruding
vertically from bottom (see 11.5.11)

Leaded device with plane termination (see 11.5.12)
e.g. Diode PAcKage (DPAK or TO252)

Scope
This Standard defines the technical requirements and quality
assurance provisions for the manufacture and verification of high-reliability
electronic circuits based on surface mounted device (SMD) and mixed
technology.
The Standard defines acceptance and rejection criteria for high-reliability
manufacture of surface-mount and mixed-technology circuit assemblies
intended to withstand normal terrestrial conditions and the vibrational g-loads
and environment imposed by space flight.
The proper tools, correct materials, design and workmanship are covered by
this
...