IEC TR 61189-5-506:2019

IEC TR 61189-5-506 ®
Edition 1.0 2019-06
TECHNICAL
REPORT
colour
inside
Test methods for electrical materials, printed boards and other interconnection
structures and assemblies –
Part 5-506: General test methods for materials and assemblies – An
intercomparison evaluation to implement the use of fine-pitch test structures for
surface insulation resistance (SIR) testing of solder fluxes in accordance with
IEC 61189-5-501
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IEC TR 61189-5-506 ®
Edition 1.0 2019-06
TECHNICAL
REPORT
colour
inside
Test methods for electrical materials, printed boards and other interconnection

structures and assemblies –
Part 5-506: General test methods for materials and assemblies – An

intercomparison evaluation to implement the use of fine-pitch test structures for

surface insulation resistance (SIR) testing of solder fluxes in accordance with

IEC 61189-5-501
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 31.180 ISBN 978-2-8322-7083-7

– 2 – IEC TR 61189-5-506:2019 © IEC 2019
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 7
2 Normative references . 7
3 Terms and definitions . 7
4 Test board concept for intercomparison . 7
4.1 The need for a fine-pitch SIR pattern . 7
4.2 Test board design . 8
4.3 Test board fluxing . 9
5 Test procedure for intercomparison . 10
5.1 Sample preparation . 10
5.2 Preparation of samples for humidity chamber . 11
5.3 Placement of samples inside the humidity chamber . 11
5.4 Resistance measurements . 12
5.5 Evaluation of results . 12
5.6 Additional information . 12
6 Results . 12
Bibliography . 23

Figure 1 – TB144 . 9
Figure 2 – Connector arrangement . 11
Figure 3 – Sample orientation in test chamber . 12
Figure 4 – Participants (a to f) resistance measurements for the six test patterns on
the checker board . 13
Figure 5 – Participant A control boards . 13
Figure 6 – Participant A flux loaded boards . 14
Figure 7 – Participant B control boards . 14
Figure 8 – Participant B flux loaded boards . 14
Figure 9 – Participant C control boards . 15
Figure 10 – Participant C flux loaded boards . 15
Figure 11 – Participant D control boards . 15
Figure 12 – Participant D flux loaded boards . 16
Figure 13 – Participant E control boards . 16
Figure 14 – Participant E flux loaded boards . 16
Figure 15 – Participant F control boards . 17
Figure 16 – Participant F flux loaded boards . 17
Figure 17 – Participant G control boards . 17
Figure 18 – Participant G flux loaded boards . 18
Figure 19 – Participant D, and evidence of a fibre and the effect on the SIR . 18
Figure 20 – Participant E and evidence or corrosion shorting across the gap . 18
Figure 21 – Participant G and evidence of a water droplet and the resulting drop in
SIR and dendrite like failure . 19
Figure 22 – Participant G and a corrosion defect probably from a flux residue . 19

Figure 23 – Participant C dendrites and corrosions formed on all SIR patterns of all
fluxed samples tested at 85°C/85% . 19
Figure 24 – The average final SIR value for the control boards . 20
Figure 25 – The average final SIR value for the flux loaded boards . 20
Figure 26 – The average final SIR for flux-loaded patterns by participant . 21
Figure 27 – Final SIR plotted as ohm.squares . 21
Figure 28 – Ratio of the log Ω.square value to the 500-µm pattern . 22

Table 1 – SIR pattern information . 9
Table 2 – Flux to be used for SIR evaluation test . 10
Table 3 – Samples for SIR evaluation testing . 10

– 4 – IEC TR 61189-5-506:2019 © IEC 2019
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
TEST METHODS FOR ELECTRICAL MATERIALS, PRINTED BOARDS AND
OTHER INTERCONNECTION STRUCTURES AND ASSEMBLIES –

Part 5-506: General test methods for materials and assemblies – An
intercomparison evaluation to implement the use of fine-pitch test
structures for surface insulation resistance (SIR) testing of solder fluxes
in accordance with IEC 61189-5-501

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
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The main task of IEC technical committees is to prepare International Standards. However, a
technical committee may propose the publication of a Technical Report when it has collected
data of a different kind from that which is normally published as an International Standard, for
example "state of the art".
IEC/TR 61189-5-506, which is a technical report, has been prepared by IEC technical
committee 91: Electronics assembly technology.

The text of this Technical Report is based on the following documents:
Draft TR Report on voting
91/1500/DTR 91/1530A/RVDTR
Full information on the voting for the approval of this Technical Report can be found in the
report on voting indicated in the above table.
This document has been drafted in accordance with the ISO/IEC Directives, Part 2.
A list of all parts in the IEC 61189 series, published under the general title Test methods for
electrical materials, printed boards and other interconnection structures and assemblies, can
be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under "http://webstore.iec.ch" in the data related to
the specific document. At this date, the document will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
A bilingual version of this publication may be issued at a later date.

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– 6 – IEC TR 61189-5-506:2019 © IEC 2019
INTRODUCTION
This document addresses the development of IEC 61189-5-501 and the introduction of a fine-
pitch test pattern. The introduction of this pattern is needed to meet the need for IEC 61189-
5-501 to reflect current assembly technology. This document describes an intercomparison
that tests a new test pattern and benchmarks it to existing test patterns. The work validates
the introduction of the new fine-pitch test pattern.
It is well known that structures at fine pitches with flux residues are more susceptible to
corrosion issues and electrochemical migration (ECM) problems. Characterization of flux
residues in terms of ECM are commonly characterized using SIR testing. A key parameter of
the SIR test is the comb pattern used and gap between the electrodes. The current B24 and
B25 with their 500-µm and 318-µm gap patterns are not representative of fine pitches. It has
been proposed to use a 200-µm gap pattern, and this document describes an intercomparison
that validates the introduction of the 200-µm gap pattern.
This document describes an exercise that used a new test board that included the B24 and
B25 patterns with an additional 200-µm pattern, with each pattern duplicated, giving six
patterns in all on each test board. This work was motivated by an update to IEC 61189-5-501.
A protocol for the testing was developed that took a standardised test rosin flux and defined
the flux loading and thermal conditioning. Seven laboratories took part from five countries.
The test boards were prepared centrally and then tested in the seven laboratories, and the
results analysed to validate the usage of the 200-µm pattern. The document describes the
intercomparison and the data analysis.

TEST METHODS FOR ELECTRICAL MATERIALS, PRINTED BOARDS AND
OTHER INTERCONNECTION STRUCTURES AND ASSEMBLIES –

Part 5-506: General test methods for materials and assemblies – An
intercomparison evaluation to implement the use of fine-pitch test
structures for surface insulation resistance (SIR) testing of solder fluxes
in accordance with IEC 61189-5-501

1 Scope
This Technical Report is an intercomparison supporting the development of IEC 61189-5-501
in relation to the SIR method. This document sets out to validate the introduction of a new
200-µm gap SIR pattern, and was benched marked against existing SIR gap patterns of
318 µm and 500 µm.
2 Normative references
There are no normative references in this document.
3 Terms and definitions
No terms and definitions are listed in this document.
ISO and IEC maintain terminological databases for use in standardization at the following
addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp
4 Test board concept for intercomparison
4.1 The need for a fine-pitch SIR pattern
The pursuit of higher quality and reliability leads to the requirement of proving that electronic
assemblies are not susceptible to electrochemical failure. Such robustness will lead to proven
lifetime performance in the field. Electrochemical failure can occur at the surface or sub-
surface, and in this paper we focus on surface failure phenomena and its characterisation.
Electrochemical failure needs three factors to be present simultaneously for a failure to occur:
a continuous water film, an applied electric filed, and soluble ionic material. Under condensing
conditions, a macroscopic water film will form and in most instances an uncoated assembly
will fail instantly. But for high humidity conditions, an invisible sub-micron water film will form
that will support low levels of conduction, and certainly no fast dramatic loss of isolation.
Applied electric fields can cause electrochemical failure, from 25V/mm and upwards, by
driving ions down an electric field. Ionic material is needed as pure water has very high
resistivity, hence dissolved ions increase conductivity and polarization at electrodes resulting
in corrosion at anodes. Sources of contamination can appear on the surface of the assembly
from the manufacturing process or the environment. If the contamination is water soluble and
dissociates to form ionic species, these ions migrate under an electric field.
It is of course of interest as to what ionic materials are present, but more importantly, the
question is what will be the impact of these residues or contamination. The industry many
years ago developed the basis of the “Surface Insulation Resistance” test, which applies an

– 8 – IEC TR 61189-5-506:2019 © IEC 2019
electrical bias across an interdigitated comb in a damp heat environment at elevated
temperatures and measures the resistance stability. This test is a simulation of what will
happen in the field, and hence the outcome is relevant to that performance. The IPC TM650
2.6.3.3, 2.6.3.6 and 2.6.3.7 describe the SIR test for various applications, providing various
test geometries and voltage conditions. The B24 has a 500-µm gap in the comb pattern, and
this is typically a lot greater than the minimum distances found on high-density circuit
assemblies, where the gap can easily be down to 200 µm and below. The B24 was proposed
circa 1990 and reflected the needs of those days, and of course since then there has been a
move to finer pitches. At finer gaps, the electrochemical behaviour can accelerate and is
sensitive to the applied electric field (see NPL work from 2000). In this work, it was shown for
certain residues that as the test voltage dropped, so did the measured resistance, hence the
electrochemical pathway did not behave in a simple ohmic manner. A conclusion of this work
was that the gap in the SIR pattern and the applied voltage should be representative of the
intended use environment. Hence, within IPC 2.6.3.7 there is a recommendation to use a 200-
µm pattern with a 25V/mm field strength. No SIR pattern is given there. However, within the
IPC-B-52 there are 200-µm SIR patterns used, specifically below the QFP devices.
Therefore, there is a strong i
...