Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 3-302: Detection of plating defects in unpopulated circuit boards by computed tomography (CT)

IEC 61189-3-302:2025 describes a method for the detection of plating defects in unpopulated circuit boards using computed tomography (CT).
This document is applicable to non-destructive testing of metallized holes.

Méthodes d’essai pour les matériaux électriques, les cartes imprimées et autres structures d’interconnexion et ensembles – Partie 3-302: Détection des défauts de métallisation dans les cartes de circuits imprimés nus par tomographie informatisée (TI)

L’IEC 61189-3-302:2025 décrit la méthode de détection des défauts de métallisation des cartes de circuits imprimés nus par tomographie informatisée (TI).
Le présent document s’applique aux essais non destructifs des trous métallisés.

General Information

Status
Published
Publication Date
21-Oct-2025
Drafting Committee
Current Stage
PPUB - Publication issued
Start Date
22-Oct-2025
Completion Date
14-Nov-2025
Ref Project
Standard
IEC 61189-3-302:2025 - Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 3-302: Detection of plating defects in unpopulated circuit boards by computed tomography (CT) Released:22. 10. 2025 Isbn:9782832707777
English language
17 pages
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Standard
IEC 61189-3-302:2025 - Méthodes d’essai pour les matériaux électriques, les cartes imprimées et autres structures d’interconnexion et ensembles – Partie 3-302: Détection des défauts de métallisation dans les cartes de circuits imprimés nus par tomographie informatisée (TI) Released:22. 10. 2025 Isbn:9782832707777
French language
17 pages
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Preview
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Standard
IEC 61189-3-302:2025 - Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 3-302: Detection of plating defects in unpopulated circuit boards by computed tomography (CT) Released:22. 10. 2025 Isbn:9782832707777
English and French language
34 pages
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Standards Content (Sample)


IEC 61189-3-302 ®
Edition 1.0 2025-10
INTERNATIONAL
STANDARD
Test methods for electrical materials, printed boards and other interconnection
structures and assemblies -
Part 3-302: Detection of plating defects in unpopulated circuit boards by
computed tomography (CT)
ICS 31.180  ISBN 978-2-8327-0777-7

All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized in any form or
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CONTENTS
FOREWORD . 3
1 Scope . 5
2 Normative references . 5
3 Terms and definitions . 5
4 Test principle . 5
5 Equipment . 6
5.1 X-ray CT scanner . 6
5.1.1 X-ray source system . 6
5.1.2 Mechanical scanning system . 6
5.1.3 Detector system . 6
5.1.4 Shielding facilities . 7
5.2 Software systems . 7
6 Test environment . 7
7 Test the steps . 7
7.1 Equipment preparation . 7
7.2 Sample clamping . 7
7.3 Parameter settings . 8
7.3.1 X-ray sources . 8
7.3.2 Scanning methods . 8
7.3.3 Scanning the field of view . 8
7.3.4 Number of frames scanned . 8
7.3.5 Scan time . 8
7.4 Scanning. 8
7.5 Image reconstruction . 9
7.5.1 3D reconstruction . 9
7.5.2 Image quality . 9
7.5.3 Visualization . 9
7.5.4 Image analysis and data processing . 9
7.5.5 Image saving . 9
8 Reports . 9
8.1 Basic information . 9
8.2 Device information . 9
8.3 Sample information . 9
8.4 Sweep parameters . 10
8.5 Measurement results . 10
Annex A (informative) Typical images of plating defects . 11
A.1 Typical image of plating voids . 11
A.2 Typical image of blind via copper filling defects. 11
A.3 Typical image of nodulation . 12
A.4 Typical image of plating folds . 12
A.5 Typical image of interlayer coincidence . 13
Annex B (informative) Void identification and statistical analysis . 14
B.1 Void identification . 14
B.1.1 Principle . 14
B.1.2 Via . 14
B.1.3 Fill hole . 15
B.2 Statistical analysis . 15
B.2.1 Number of voids . 15
B.2.2 Calculation of the maximum length of the voids/board thickness ratio . 15
B.2.3 Calculation of filled holes void rate . 16
Bibliography . 17

Figure 1 – Typical process of CT analysis . 5
Figure A.1 – Plating voids . 11
Figure A.2 – Blind via copper filling defects . 12
Figure A.3 – Plating nodulation . 12
Figure A.4 – Plating folds . 13
Figure A.5 – Interlayer coincidence . 13
Figure B.1 – Plating holes voids recognition image . 14
Figure B.2 – Identification of the void along the board thickness direction . 14
Figure B.3 – Fill holes voids recognition image . 15
Figure B.4 – Microvia void image . 15

Table 1 – Reference examples of focal size and spatial resolution correspondence for
source focus size . 6
Table 2 – Reference examples of the imaging resolution of the detector system
corresponding to the imaging field of view . 6

INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
Test methods for electrical materials, printed boards
and other interconnection structures and assemblies -
Part 3-302: Detection of plating defects in unpopulated
circuit boards by computed tomography (CT)

FOREWORD
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IEC 61189-3-302 has been prepared by IEC technical committee 91: Electronics assembly
technology. It is an International Standard.
The text of this International Standard is based on the following documents:
Draft Report on voting
91/2060/FDIS 91/2071/RVD
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
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at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are
described in greater detail at www.iec.ch/publications.
A list of all parts in the IEC 61189 series, published under the general title Test methods for
electrical materials, printed boards and other interconnection structures and assemblies, can
be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under webstore.iec.ch in the data related to the
specific document. At this date, the document will be
– reconfirmed,
– withdrawn, or
– revised.
1 Scope
This part of IEC 61189 describes a method for the detection of plating defects in unpopulated
circuit boards using computed tomography (CT).
This document is applicable to non-destructive testing of metallized holes.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies.
For undated references, the latest edition of the referenced document (including any
amendments) applies.
ISO 15708-3, Non-destructive testing - Radiation methods for computed tomography - Part 3:
Operation and interpretation
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
ISO and IEC maintain terminology databases for use in standardization at the following
addresses:
– IEC Electropedia: available at https://www.electropedia.org/
– ISO Online browsing platform: available at https://www.iso.org/obp
3.1
imaging resolution
value of the physical size of the detector's pixels divided by the magnification ratio which is the
ratio of the distance between the detector and the ray source to the distance between the
sample centre and the ray source
4 Test principle
The principle of computer tomography (CT) analysis of the plating defects in the metallization
holes of the circuit board consists in using the cone beam X-rays emitted by the X-ray source
to obtain multiple X-ray projecti
...


IEC 61189-3-302 ®
Edition 1.0 2025-10
NORME
INTERNATIONALE
Méthodes d’essai pour les matériaux électriques, les cartes imprimées et autres
structures d’interconnexion et ensembles -
Partie 3-302: Détection des défauts de métallisation dans les cartes de circuits
imprimés nus par tomographie informatisée (TI)
ICS 31.180  ISBN 978-2-8327-0777-7

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SOMMAIRE
AVANT-PROPOS . 3
1 Domaine d’application . 5
2 Références normatives . 5
3 Termes et définitions . 5
4 Principe d’essai . 5
5 Appareil . 6
5.1 Scanneur TI à rayons X . 6
5.1.1 Système source de rayons X . 6
5.1.2 Dispositif de balayage mécanique . 6
5.1.3 Système de détection . 6
5.1.4 Installations de protection . 7
5.2 Systèmes logiciels . 7
6 Environnement d’essai . 7
7 Essai des étapes . 7
7.1 Préparation de l’équipement . 7
7.2 Serrage de l’échantillon . 8
7.3 Paramétrage . 8
7.3.1 Sources de rayons X . 8
7.3.2 Méthodes de balayage . 8
7.3.3 Balayage du champ de vision . 8
7.3.4 Nombre de trames balayées . 8
7.3.5 Temps de balayage . 9
7.4 Balayage. 9
7.5 Reconstruction d’image . 9
7.5.1 Reconstruction 3D . 9
7.5.2 Qualité d’image . 9
7.5.3 Visualisation . 9
7.5.4 Analyse d’images et traitement des données . 9
7.5.5 Enregistrement de l’image . 10
8 Rapports. 10
8.1 Informations de base . 10
8.2 Informations sur le dispositif . 10
8.3 Informations sur l’échantillon . 10
8.4 Paramètres de balayage . 10
8.5 Résultat des mesures . 10
Annexe A (informative) Images types de défauts de métallisation . 11
A.1 Images types des vides de métallisation . 11
A.2 Image type de défauts de remplissage du cuivre du trou de liaison borgne . 11
A.3 Image type de nodulation . 12
A.4 Images types des plis de métallisation . 12
A.5 Image type de coïncidence entre couches . 13
Annexe B (informative) Identification des vides et analyse statistique . 14
B.1 Identification des vides . 14
B.1.1 Principe . 14
B.1.2 Trou de liaison . 14
B.1.3 Trou de remplissage . 15
B.2 Analyse statistique . 16
B.2.1 Nombre de vides . 16
B.2.2 Calcul de la longueur maximale du rapport vides/épaisseur de la carte . 16
B.2.3 Taux de vide calculé des trous remplis . 16
Bibliographie . 17

Figure 1 – Processus classique d’une analyse TI . 5
Figure A.1 – Vides de métallisation . 11
Figure A.2 – Défauts de remplissage du cuivre du trou de liaison borgne . 12
Figure A.3 – Nodulation de métallisation . 12
Figure A.4 – Plis de métallisation . 13
Figure A.5 – Coïncidence entre couches . 13
Figure B.1 – Image de reconnaissance des vides de trous de métallisation . 14
Figure B.2 – Identification du vide dans le sens de l’épaisseur de la carte . 15
Figure B.3 – Image de reconnaissance des vides de trous de remplissage . 15
Figure B.4 – Image du vide de microtrou de liaison empilé . 15

Tableau 1 – Exemples de référence de la correspondance entre la taille de foyer et
la résolution spatiale pour la taille de foyer source . 6
Tableau 2 – Exemples de référence de la résolution d’imagerie du système de
détection correspondant au champ de vision d’imagerie . 6

COMMISSION ÉLECTROTECHNIQUE INTERNATIONALE
____________
Méthodes d’essai pour les matériaux électriques, les cartes imprimées
et autres structures d’interconnexion et ensembles –
Partie 3-302: Détection des défauts de métallisation dans les cartes de
circuits imprimés nus par tomographie informatisée (TI)

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L’IEC 61189-3-302 a été établie par le comité d’études 91 de l’IEC: Techniques d’assemblage
des composants électroniques. Il s’agit d’une Norme internationale.
Le texte de cette Norme internationale est issu des documents suivants:
Projet Rapport de vote
91/2060/FDIS 91/2071/RVD
Le rapport de vote indiqué dans le tableau ci-dessus donne toute information sur le vote ayant
abouti à son approbation.
La langue employée pour l’élaboration de cette Norme internationale est l’anglais.
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Une liste de toutes les parties de la série IEC 61189, publiées sous le titre général Méthodes
d’essai pour les matériaux électriques, les cartes imprimées et autres structures
d’interconnexion et ensembles, se trouve sur le site web de l’IEC.
Le comité a décidé que le contenu de ce document ne sera pas modifié avant la date de stabilité
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recherché. À cette date, le document sera
– reconduit,
– supprimé, ou
– révisé.
1 Domaine d’application
La présente partie de l’IEC 61189 décrit la méthode de détection des défauts de métallisation
des cartes de circuits imprimés nus par tomographie informatisée (TI).
Le présent document s’applique aux essais non destructifs des trous métallisés.
2 Références normatives
Les documents suivants sont cités dans le texte de sorte qu’ils constituent, pour tout ou partie
de leur contenu, des exigences du présent document. Pour les références datées, seule
l’édition citée s’applique. Pour les références non datées, la dernière édition du document de
référence s’applique (y compris les éventuels amendements).
ISO 15708-3, Essais non destructifs - Méthodes par rayonnements pour la tomographie
informatisée - Partie 3: Fonctionnement et interprétation
3 Termes et définitions
Pour les besoins du présent document, les termes et définitions suivants s’appliquent.
L’ISO et l’IEC tiennent à jour des bases de données terminologiques destinées à être utilisées
en normalisation, consultables aux adresses suivantes:
– IEC Electropedia: disponible à l’adresse https://www.electropedia.org/
– ISO Online browsing platform: disponible à l’adresse https://www.iso.org/obp
3.1
résolution d’imagerie
valeur de la taille physique des pixels du détecteur divisée par le facteur de multiplication, qui
est le rapport de la distance entre le détecteur et la source de rayonnement sur la distance
entre le centre de l’échantillon et la source de rayonnement
4 Principe d’essai
Le principe de l’analyse par tomographie informatisée (TI) des défauts de métallisation dans
les trous de la carte de circuits imprimés consiste à utiliser les rayons X à faisceau conique
émis par la source, afin d’obtenir plusieurs projections de rayons X selon différents angles de
l’échantillon, avec un paramètre de reconstruction spécifique en utilisant le logiciel dédié, à
reconstruire la structure tridimensionnelle de l’échantillon réel de l’image de projection, à
afficher les trous de l’échantillon en échelle de gris, et à obtenir la structure des défauts de
métallisation et les nombres associés. Avec cette méthode, le défaut minimal détectable est
égal à trois fois la taille de pixel de la résolution d’imagerie du dispositif. Le processus classique
est présenté à la Figure 1.
Figure 1 – Processus classique d’une analyse TI
5 Appareil
5.1 Scanneur TI à rayons X
5.1.1 Système source de rayons X
Pour une source de rayons X pouvant émettre de manière stable des rayons X, si la taille du
défaut de la cible est plus petite, il convient d’utiliser un système source de rayons X avec une
taille de foyer plus petite. La résolution spatiale la plus élevée de l’imagerie aux
...


IEC 61189-3-302 ®
Edition 1.0 2025-10
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Test methods for electrical materials, printed boards and other interconnection
structures and assemblies -
Part 3-302: Detection of plating defects in unpopulated circuit boards by
computed tomography (CT)
Méthodes d’essai pour les matériaux électriques, les cartes imprimées et autres
structures d’interconnexion et ensembles -
Partie 3-302: Détection des défauts de métallisation dans les cartes de circuits
imprimés nus par tomographie informatisée (TI)
ICS 31.180  ISBN 978-2-8327-0777-7

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CONTENTS
FOREWORD . 3
1 Scope . 5
2 Normative references . 5
3 Terms and definitions . 5
4 Test principle . 5
5 Equipment . 6
5.1 X-ray CT scanner . 6
5.1.1 X-ray source system . 6
5.1.2 Mechanical scanning system . 6
5.1.3 Detector system . 6
5.1.4 Shielding facilities . 7
5.2 Software systems . 7
6 Test environment . 7
7 Test the steps . 7
7.1 Equipment preparation . 7
7.2 Sample clamping . 7
7.3 Parameter settings . 8
7.3.1 X-ray sources . 8
7.3.2 Scanning methods . 8
7.3.3 Scanning the field of view . 8
7.3.4 Number of frames scanned . 8
7.3.5 Scan time . 8
7.4 Scanning. 8
7.5 Image reconstruction . 9
7.5.1 3D reconstruction . 9
7.5.2 Image quality . 9
7.5.3 Visualization . 9
7.5.4 Image analysis and data processing . 9
7.5.5 Image saving . 9
8 Reports . 9
8.1 Basic information . 9
8.2 Device information . 9
8.3 Sample information . 9
8.4 Sweep parameters . 10
8.5 Measurement results . 10
Annex A (informative) Typical images of plating defects . 11
A.1 Typical image of plating voids . 11
A.2 Typical image of blind via copper filling defects. 11
A.3 Typical image of nodulation . 12
A.4 Typical image of plating folds . 12
A.5 Typical image of interlayer coincidence . 13
Annex B (informative) Void identification and statistical analysis . 14
B.1 Void identification . 14
B.1.1 Principle . 14
B.1.2 Via . 14
B.1.3 Fill hole . 15
B.2 Statistical analysis . 15
B.2.1 Number of voids . 15
B.2.2 Calculation of the maximum length of the voids/board thickness ratio . 15
B.2.3 Calculation of filled holes void rate . 16
Bibliography . 17

Figure 1 – Typical process of CT analysis . 5
Figure A.1 – Plating voids . 11
Figure A.2 – Blind via copper filling defects . 12
Figure A.3 – Plating nodulation . 12
Figure A.4 – Plating folds . 13
Figure A.5 – Interlayer coincidence . 13
Figure B.1 – Plating holes voids recognition image . 14
Figure B.2 – Identification of the void along the board thickness direction . 14
Figure B.3 – Fill holes voids recognition image . 15
Figure B.4 – Microvia void image . 15

Table 1 – Reference examples of focal size and spatial resolution correspondence for
source focus size . 6
Table 2 – Reference examples of the imaging resolution of the detector system
corresponding to the imaging field of view . 6

INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
Test methods for electrical materials, printed boards
and other interconnection structures and assemblies -
Part 3-302: Detection of plating defects in unpopulated
circuit boards by computed tomography (CT)

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
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shall not be held responsible for identifying any or all such patent rights.
IEC 61189-3-302 has been prepared by IEC technical committee 91: Electronics assembly
technology. It is an International Standard.
The text of this International Standard is based on the following documents:
Draft Report on voting
91/2060/FDIS 91/2071/RVD
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available
at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are
described in greater detail at www.iec.ch/publications.
A list of all parts in the IEC 61189 series, published under the general title Test methods for
electrical materials, printed boards and other interconnection structures and assemblies, can
be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under webstore.iec.ch in the data related to the
specific document. At this date, the document will be
– reconfirmed,
– withdrawn, or
– revised.
1 Scope
This part of IEC 61189 describes a method for the detection of plating defects in unpopulated
circuit boards using computed tomography (CT).
This document is applicable to non-destructive testing of metallized holes.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies.
For undated references, the latest edition of the referenced document (including any
amendments) applies.
ISO 15708-3, Non-destructive testing - Radiation methods for computed tomography - Part 3:
Operation and interpretation
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
ISO and IEC maintain terminology databases for use in standardization at the following
addresses:
– IEC Electropedia: available at https://www.electropedia.org/
– ISO Online browsing platform: available at https://www.iso.org/obp
3.1
imaging resolution
value of the physical size of the detector's pixels divided by the magnification ratio which is the
ratio of the distance between the detector and the ray source to the distance between the
sample centre and the ray source
4 Test principle
The principle of computer tomography (CT) analysis of the plating defects in the metallization
holes of the circuit board consists in using the cone beam X-rays emitted by the X-ray source
to obtain multiple X-ray projections from different angles of the sample, with a specific
reconstruction algorithm, using the reconstruction software, to reconstruct the three-
dimensional structure of the actual sample of the projection image, to display the holes in the
sample in grayscale, and obtain the plating defects structure and related numbers. With this
method the minimum detectable defect is three times the pixel size of the device's imaging
resolution. The typical process is shown in Figure 1.

Figure 1 – Typical process of CT analysis
5 Equipment
5.1 X-ray CT scanner
5.1.1 X-ray source system
For an X-ray source that can stably emit X-rays, if the size of the target defect is smaller, then
an X-ray source system with a smaller focal size should be used.The highest spatial resolution
of X-ray imaging is about half the focal point size of the source, and in order to obtain a clear
image of the internal structure, the appropriate X-ray source system is selected according to
Table 1. In addition, the radiation penetration rate of the circuit board should reach more than
20 %, generally between 20 % and 70 %.
Table 1 – Reference examples of focal size and spatial resolution
correspondence for source focus size
a
Spatial resolution (minimum defect size)
Focus size
μm
μm
1 0,5
5 2,5
10 5
a
The focus size is a nominal value provided by the manufacturer of the X-ray tube,
but the actual focus size can be larger.

5.1.2 Mechanical scanning system
The minimum step of the mechanical displacement and vertical and horizontal movement of the
scanning system should be less than or equal to 0,01 mm, and the minimum step of the vertical
axial rotation angle should be less than or equal to 0,01°.
5.1.3 Detector system
X-rays can be received and imaged, and scanned images can be converted into digital signals
and stored in memory. The number of pixels of the detector is usually between 2 000 ~ 4 000,
and the product of the imaging resolution (image pixel size) and the number of pixels is the
imaging field of view. There are two ways to expand the imaging field of view, one is to reduce
the imaging resolution, and the second is to scan and stitch through multiple scans. The
appropriate detector system can be selected according to Table 2. To obtain a sufficiently clear
image of the internal structure of the plated through hole, an imaging resolution of the detector
system as low as possible is recommended.
Table 2 – Reference examples of the imaging resolution of the detector system
corresponding to the imaging field of view
a
Imaging resolution
Imaging field of view
(image pixel size)
μm
μm
0,5 1 000 ~ 2 000
2,5 5 000 ~ 10 000
5 10 000 ~ 20 000
10 20 000 ~ 40 000
30 60 000 ~ 120 000
a
The board size is scanned only once.

For X-ray detectors, there is an important relationship between the imaging resolution and the
pixel resolution. The imaging resolution is assumed to be the value that corresponds to the
sensor manufacturer's technical data. It should be noted that different values can be specified.
Imaging resolution refers to the ability of the system to display fine details in the image. It is
often measured by the modulation transfer function (MTF), which describes how well different
spatial frequencies are transmitted through the system. Pixel resolution, on the other hand,
refers to the number of pixels used to create the image. A higher number of pixels means more
detail. However, the actual image resolution also depends on other factors such as the signal-
to-noise ratio of the detector and the image processing.
5.1.4 Shielding facilities
Shielding facilities should effectively shield radiation leakage to meet safety requirements.
There should be a radiation alarm light that can be used to warn when the radiation source is
turned on. There should be a door interlocking device to prevent misoperation. When the X-ray
source is turned on and operating, the X-ray intensity at each point at 100 mm from the outer
surface of the instrument should be less than 1 μSv/h.
NOTE The limit value of "1 μSv/h" is derived from IAEA Safety Standards Series No. GSR Part 3, Radiation
Protection and Safety of Radiation Sources: International Basic Safety Standards.
5.2 Software systems
The software system should have the following features:
a) it can adjust and control the X-ray source power, detector exposure time, ray source, sample
stage and detector position, sample scanning angle, etc., set the scanning mode, scan and
can store the projection image;
b) it can perform image reconstruction, image processing, artifact removal, image
enhancement and other functions of the projected image according to a specific algorithm;
c) it can analyze 3D models, with functions such as threshold segmentation, dimensional
measurement,statistical analysis.
6 Test environment
Environmental conditions shall comply with the provisions of ISO 15708-3.
7 Test the steps
7.1 Equipment preparation
According to the equipment operating specifications, perform pre-boot safety checks, turn on
the CT scanner, and adjust or preheat the X-ray source system. After the warm-up is completed,
the device self-test is carried out, including connecting the ray source, connecting the detector,
connecting the controller, and returning the motion controller to zero. Offset (darkfield)
correction and gain (lightfield) correction are performed. If necessary, make bad pixel
corrections.
7.2 Sample clamping
Select the appropriate fixture according to the size and shape of the sample to ensure that the
inspection area of the circuit board is within the effective detection field of view, and the area
to be inspected is as close as possible to the centre axis of the turntable. According to the
requirements of the material composition and detection accuracy of the circuit board, auxiliary
detection devices can be added appropriately. For example, when the number of copper layers
on the circuit board is large and the resin is relatively small, a layer of filter can be attached to
the ray outlet to improve resolution and reduce image artifacts.
7.3 Parameter settings
7.3.1 X-ray sources
According to the size and material composition of the circuit board, the energy (such as tube
voltage and tube power) and other parameters of the X-ray source are reasonably selected. If
the number of copper layers that make up the circuit board is small or the thickness of the
copper layer is small (e.g. less than 6 layers or the total thickness of copper foil is less than
230 μm), the X-ray source can easily penetrate and the X-ray source can be selected at a lower
voltage (e.g.130 kV). If the upper limit is exceeded, it is recommended to choose a higher
voltage (e.g.150 kV). To meet the detection of metallized holes plating defects of unpopulated
circuit boards, the resolution is usually 1 μm, and the scanning power is selected as 4 W ~ 5 W.
7.3.2 Scanning methods
According to the size of the circuit board, detection accuracy and detection efficiency
requirements, select the appropriate scanning method. Usually, the sample is first detected by
2D fluoroscopy, and then the CT scan target area is determined; adjust the relative position of
the ray source, detector and sample so that it is located in the centre of the field of view, while
ensuring that the resolution and field of view meet the detection requirements, and then carry
out three-dimensional inspection.
7.3.3 Scanning the field of view
According to the needs of the circuit board detection, the size of the target scanning area is
determined, and the image of the target area of the circuit board is about 2/3 of the whole CT
image compared to the diameter of the field of view.
7.3.4 Number of frames scanned
Combined with the requirements of detection efficiency, image quality and analysis, select the
number of scanned frames (such as 360, 720, 1 080, 1 440, 1 800, etc.). Generally, to meet the
resolution of 1 μm, it is recommended to choose 1 080 and above frame numbers.
7.3.5 Scan time
The scanning time is determined by the number of frames acquired, the sampling time per frame,
and other factors. The smaller the number of frames acquired, the shorter the time required,
but a number of frames which is too small will affect the quality of the reconstructed image, and
the specific sampling frame setting should take into account the size, resolution requirements
and image recognition algorithm capabilities of the circuit board to be measured. Scanning time
which is too short can lead to too low signal-to-noise ratio and thus affect image quality, and
the specific scanning time setting should take into account the thickness of the circuit board to
be measured, the dose rate of the ray source and other factors.
7.4 Scanning
Load the circuit board to be inspected, close the screen door, set the scanning parameters,
operate the control system to move the sample to the centre of the field of view, start the X-ray
source, observe the X-ray source parameters (tube voltage, tube current, etc.), determine the
dose stability and then carry out the detection scan. After the scan, wait for the current and
voltage values to drop to 0 before opening the screen door to take the sample.

7.5 Image reconstruction
7.5.1 3D reconstruction
The scanned projected image is reconstructed in three dimensions according to the
reconstruction algorithm. Additional corrections and processing should be performed during the
reconstruction process, such as noise reduction, removal of common artifacts, correction of
beam hardening, etc.
7.5.2 Image quality
CT images should have good spatial resolution, contrast, and signal-to-noise ratio, and there
should be no image artifacts or edge hardening that affect the judgment.
7.5.3 Visualization
Rely on visualization software to process all images and data. Import the reconstructed 3D raw
image data in the visualization software and perform 2D or 3D visualization operations
according to the inspection requirements. 2D visualization examines data in segments along a
defined axis, while 3D visualization renders a three-dimensional effect of a two-dimensional
image overlay.
7.5.4 Image analysis and data processing
For the purpose of detection, according to the pixel value, shape, size, gray scale and other
conditions of the detailed features on the image, the image analysis software with dimension
measurement, CT value statistical analysis, signal-to-noise ratio analysis and other functions
is used to analyze the image. Complete the automatic identification and positioning of plating
defects such as voids, copper filling defects, rough plating, plating nodulation, plating folds,
plating separation, poor coincidence between layers, etc. Typical images of defects are shown
in Annex A.
The identification of plated voids, as well as the calculation method of the thickness ratio of the
length of the plating void to the board and the void rate of copper filling are shown in Annex B.
NOTE The finished image is the product of the evaluation algorithms of the machine manufacturer's software. These
internal algorithms for evaluation cannot be influenced by the user. Thus, different results can be obtained when
analysing the same sample on different equipment. This is particularly of importance if there are artifacts in the image
that are similar to actual effects. Thus, the physical context of the effect is taken into account to judge, whether a
result can be realistic or not.
7.5.5 Image saving
The image and analysis results are output and saved in a standard format; the integrity of the
original data of the image should be maintained.
8 Reports
8.1 Basic information
The report includes the laboratory name, report number, analyst, auditor, report time.
8.2 Device information
The device information includes the device model, basic parameters, applicable standards.
8.3 Sample information
The sample information includes the circuit board type, number of layers, structure.
8.4 Sweep parameters
The sweep parameters include the scan mode, X-ray source parameters, detector exposure
time, number of scanned frames, resolution, etc.
8.5 Measurement results
The measurement results include the hole wall/void image, number of voids, maximum void
length/plate thickness ratio, coating thickness, plating nodulation, plating folds, plating
separation, and through-hole copper filling defects.
Annex A
(informative)
Typical images of plating defects
A.1 Typical image of plating voids
A typical image of plating voids is shown in Figure A.1.

Figure A.1 – Plating voids
A.2 Typical image of blind via copper filling defects
A typical image of blind via copper filling defects is shown in Figure A.2.
NOTE The picture shows blind via copper filling defects. Voids are completely encapsulated and the total volume
exceeds 25 % of the volume of the filled via.
Figure A.2 – Blind via copper filling defects
A.3 Typical image of nodulation
A typical image of nodulation is shown in Figure A.3.

a) Side view 1 b) Side view 2
Figure A.3 – Plating nodulation
A.4 Typical image of plating folds
A typical image of plating folds is shown in Figure A.4.
Figure A.4 – Plating folds
A.5 Typical image of interlayer coincidence
A typical image of interlayer coincidence is shown in Figure A.5.

a) 2D illustration of the defect b) 3D cross-section of the defect
Figure A.5 – Interlayer coincidence
Annex B
(informative)
Void identification and statistical analysis
B.1 Void identification
B.1.1 Principle
The plating and voids of metallized holes are identified according to the grayscale boundary
values.
B.1.2 Via
An example of through-hole hole identification is shown in Figure B.1.

Figure B.1 – Plating holes voids recognition image
For through-hole, the hole identification should contain the following information: whether the
hole is located at the interface of the inner conductor, whether the hole is a circular hole, and
the maximum size of the hole along the plate thickness direction. The schematic diagram of
identifying the hole along the plate thickness direction is shown in Figure B.2.

b) Identify voids along the board thickness
a) 3D illustration of the defect
direction
Figure B.2 – Identification of the void along the board thickness direction
B.1.3 Fill hole
An example of filling holes identification is shown in Figure B.3.

Figure B.3 – Fill holes voids recognition image
For plating fill holes, the volume of the holes should be identified. A schematic diagram of the
identification of hole-filled holes in electroplating is shown in Figure B.4.

a) 3D illustration of the defect b) 2D cross-section of the defect
Figure B.4 – Microvia void image
B.2 Statistical analysis
B.2.1 Number of voids
Count the number of voids present in the walls of metallized holes.
NOTE A plating thickness below the specified value is considered a void for inspection. The voids in this document
do not contain cases where copper plating thickness is less than the specified value and is considered a void.
B.2.2 Calculation of the maximum length of the voids/board thickness ratio
Calculate the ratio of the maximum size of the identified void to the board thickness, as shown
in Formula (B.1):
P = L /L × 100 %
(B.1)
1 void board thickness
where:
P is the maximum length of the voids/board thickness ratio;
L is the maximum length of the voids;
void
L is the board thickness.
board thickness
B.2.3 Calculation of filled holes void rate
Calculate the filled holes void rate, as shown in Formula (B.2):
P = V /V × 100 %
(B.2)
2 void total
where:
P is the filled holes void rate;
V is the void volume;
void
V is the entire hole volume.
total
NOTE When the relative deviation of the void rate calculated by the same specimen is more than 10 %, the image
and acquisition data will be reconstructed.

Bibliography
IEC 60194-1:2021, Printed board design, manufacture and assembly - Vocabulary - Part 1:
Common usage in printed board and electronic assembly technologies
IEC 60194-2:2025, Printed board design, manufacture and assembly - Vocabulary - Part 2:
Common usage in electronic technologies as well as printed board and electronic assembly
technologies
ISO 15708-1:2024, Non-destructive testing - Radiation methods for computed tomography -
Part 1: Vocabulary
IAEA, Safety Standards Series No. GSR Part 3, Radiation Protection and Safety of Radiation
Sources: International Basic Safety Standards
___________
SOMMAIRE
AVANT-PROPOS . 3
1 Domaine d’application . 5
2 Références normatives . 5
3 Termes et définitions . 5
4 Principe d’essai . 5
5 Appareil . 6
5.1 Scanneur TI à rayons X . 6
5.1.1 Système source de rayons X . 6
5.1.2 Dispositif de balayage mécanique . 6
5.1.3 Système de détection . 6
5.1.4 Installations de protection . 7
5.2 Systèmes logiciels . 7
6 Environnement d’essai . 7
7 Essai des étapes . 7
7.1 Préparation de l’équipement . 7
7.2 Serrage de l’échantillon . 8
7.3 Paramétrage . 8
7.3.1 Sources de rayons X . 8
7.3.2 Méthodes de balayage . 8
7.3.3 Balayage du champ de vision . 8
7.3.4 Nombre de trames balayées . 8
7.3.5 Temps de balayage . 9
7.4 Balayage. 9
7.5 Reconstruction d’image . 9
7.5.1 Reconstruction 3D . 9
7.5.2 Qualité d’image . 9
7.5.3 Visualisation . 9
7.5.4 Analyse d’images et traitement des données . 9
7.5.5 Enregistrement de l’image . 10
8 Rapports. 10
8.1 Informations de base . 10
8.2 Informations sur le dispositif . 10
8.3 Informations sur l’échantillon . 10
8.4 Paramètres de balayage . 10
8.5 Résultat des mesures . 10
Annexe A (informative) Images types de défauts de métallisation . 11
A.1 Images types des vides de métallisation . 11
A.2 Image type de défauts de remplissage du cuivre du trou de liaison borgne . 11
A.3 Image type de nodulation . 12
A.4 Images types des plis de métallisation . 12
A.5 Image type de coïncidence entre couches . 13
Annexe B (informative) Identification des vides et analyse statistique . 14
B.1 Identification des vides . 14
B.1.1 Principe . 14
B.1.2 Trou de liaison . 14
B.1.3 Trou de remplissage . 15
B.2 Analyse statistique . 16
B.2.1 Nombre de vides . 16
B.2.2 Calcul de la longueur maximale du rapport vides/épaisseur de la carte . 16
B.2.3 Taux de vide calculé des trous remplis . 16
Bibliographie . 17

Figure 1 – Processus classique d’une analyse TI .
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