IEC 61643-341:2020

IEC 61643-341 ®
Edition 2.0 2020-05
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Components for low-voltage surge protection –
Part 341: Performance requirements and test circuits for thyristor surge
suppressors (TSS)
Composants pour parafoudres basse tension –
Partie 341: Exigences de performance et circuits d'essai pour parafoudres
à thyristor (TSS)
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IEC 61643-341 ®
Edition 2.0 2020-05
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Components for low-voltage surge protection –

Part 341: Performance requirements and test circuits for thyristor surge

suppressors (TSS)
Composants pour parafoudres basse tension –

Partie 341: Exigences de performance et circuits d'essai pour parafoudres

à thyristor (TSS)
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.080.10 ISBN 978-2-8322-8304-2

– 2 – IEC 61643-341:2020 © IEC 2020
CONTENTS
FOREWORD . 6
1 Scope . 8
2 Normative references . 8
3 Terms, definitions, abbreviated terms and symbols . 8
3.1 Parametric terms, letter symbols and definitions . 9
3.2 General terms . 9
3.3 Main terminal ratings . 9
3.4 Main terminal characteristics . 11
3.5 Additional and derived parameters . 12
3.6 Temperature related parameters . 12
3.7 Gate terminal parameters . 13
3.8 Abbreviated terms . 15
3.9 Circuit symbols . 15
4 TSS types . 16
5 Service conditions . 18
5.1 Normal service conditions . 18
.
5.2 Storage temperature range, T min to T max. . 18
stg stg
6 Mechanical requirements and identification . 18
6.1 Robustness of terminations . 18
6.2 Solderability . 18
6.3 Marking . 18
6.4 Documentation . 18
7 Standard test methods . 19
7.1 Failure rates . 19
7.2 Test conditions . 19
7.2.1 General. 19
7.2.2 Standard atmospheric conditions . 19
7.2.3 Measurement errors . 20
7.2.4 Measurement accuracy . 20
7.2.5 Designated impulse shape and values . 20
7.2.6 Multiple TSS . 20
7.2.7 Gated TSS testing . 20
7.3 Rating test procedures . 20
7.3.1 General. 20
7.3.2 Repetitive peak off-state voltage, V . 21
DRM
7.3.3 Repetitive peak on-state current, I . 21
TRM
7.3.4 Non-repetitive peak on-state current, I . 22
TSM
7.3.5 Non-repetitive peak pulse current, I . 23
PP
7.3.6 Repetitive peak reverse voltage, V . 24
RRM
7.3.7 Non-repetitive surge forward current, I . 24
FSM
7.3.8 Repetitive peak forward current, I . 24
FRM
7.3.9 Critical rate of rise of on-state current, di/dt . 25
7.4 Characteristic test procedures . 26
7.4.1 General. 26
7.4.2 Off-state current, I . 26
D
7.4.3 Repetitive peak off-state current, I . 27
DRM
7.4.4 Repetitive peak reverse current, I . 27
RRM
7.4.5 Breakover voltage, V and current, I . 27
(BO) (BO)
7.4.6 On-state voltage, V . 29
T
7.4.7 Holding current, I . 33
H
7.4.8 Off-state capacitance, C . 34
o
7.4.9 Forward voltage, V . 37
F
7.4.10 Peak forward recovery voltage, V . 37
FRM
7.4.11 Critical rate of off-state voltage rise, dv/dt . 38
7.4.12 Variation of holding current with temperature . 38
7.4.13 Gate-to-adjacent terminal peak off-state voltage and peak off-state
gate current, V , I . 38
GDM GDM
7.4.14 Gate reverse current, adjacent terminal open, I , I . 39
GAO GKO
7.4.15 Gate reverse current, main terminals short-circuited, I , I . 40
GAS GKS
Annex A (informative) Common impulse waveshapes . 41
A.1 General . 41
A.2 Types of impulse generator . 41
A.3 Impulse generator parameters . 41
A.3.1 Glossary of terms. 41
A.3.2 Virtual parameters . 42
A.4 Impulse generators typically used for surge protector testing . 44
A.4.1 General. 44
A.4.2 Impulse generators with a defined voltage waveform . 44
A.4.3 Impulse generators with a defined current waveform . 44
A.4.4 Generators with defined voltage and current waveforms . 45
Annex B (informative) Glossary of IEC 60747-6 [10] thyristor terms . 48
B.1 General . 48
B.2 Thyristor types . 48
B.3 Basic terms defining the static voltage-current characteristics of triode
thyristors . 49
B.4 Basic terms defining the static voltage-current characteristics of diode
thyristors . 51
B.5 Particulars of the static voltage-current characteristics of triode and diode

thyristors . 52
B.6 Terms related to ratings and characteristics; principal voltages . 54
B.7 Terms related to ratings and characteristics; principal currents . 55
B.8 Terms related to ratings and characteristics; gate voltages and currents . 57
B.9 Terms related to ratings and characteristics; powers, energies and losses . 59
B.10 Letter symbols . 61
B.10.1 General. 61
B.10.2 List of letter symbols . 62
Annex C (informative) Additional parametric tests . 64
C.1 General . 64
C.2 Temperature derating. 64
C.3 Thermal resistance, R . 64
th
C.4 Transient thermal impedance, Z (t) . 65
th
C.5 Gate reverse current, on-state, I , I . 66
GAT GKT
C.6 Gate reverse current, forward conducting state, I , I . 67
GAF GKF
C.7 Gate switching charge, Q . 68
GS
C.8 Peak gate switching current, I . 70
GSM
– 4 – IEC 61643-341:2020 © IEC 2020
C.9 Gate-to-adjacent terminal breakover voltage, V , V . 71
GK(BO) GA(BO)
Annex D (normative) Preferred values . 72
D.1 General . 72
D.2 V and V . 72
(BO) DRM
D.3 C , V and I . 73
O DRM PP
D.4 I . 74
H
D.5 I and time to half value (duration) . 74
PP
Bibliography . 75

Figure 1 – Fixed voltage, two terminals: a) reverse blocking and b) reverse conducting . 15
Figure 2 – Gated reverse blocking: a) P gate b) N gate and c) P & N gate . 16
Figure 3 – Gated reverse conducting: a) P gate and b) N gate . 16
Figure 4 – Bidirectional: a) 2 terminal fixed voltage and b) gated . 16
Figure 5 – Switching quadrant characteristics: a) fixed-voltage TSS and b) gated TSS . 17
Figure 6 – TSS non-switching characteristics: a) reverse blocking b) reverse
conducting . 17
Figure 7 – Test circuit for verifying repetitive peak off-state voltage (V ) . 21
DRM
Figure 8 – Test circuit for verifying repetitive peak on-state current, I . 21
TRM
Figure 9 – Repetitive peak on-state current waveforms . 22
Figure 10 – Test circuit for verifying non-repetitive peak on-state current, I . 23
TSM
Figure 11 – Test circuit for verifying non-repetitive peak pulse current, I . 24
PP
Figure 12 – Test circuit for verifying critical rate of rise of on-state current (di/dt) . 25
Figure 13 – Half sine-wave di/dt test circuit . 26
Figure 14 – Test circuit for off-state current, I at V . 27
D D
Figure 15 – Test circuit for breakover, V and I and on-state voltage, V . 28
(BO) (BO) T
Figure 16 – Voltage and current waveforms versus time for a fixed-voltage TSS
showing switch-on, on-state and switch-off events . 28
Figure 17 – Waveform expansions of Figure 16 . 30
Figure 18 – Voltage and current waveforms versus time for a gated TSS showing
switch-on, on-state and switch-off events . 31
Figure 19 – Waveform expansions of Figure 18 . 32
Figure 20 – Test circuit for holding current, I . 33
H
Figure 21 – Test circuit for holding current with additional DC bias . 34
Figure 22 – Test circuit for capacitance measurement . 34
Figure 23 – Test circuit for capacitance measurement with external DC bias . 35
Figure 24 – Test circuit for capacitance measurement of multi-terminal TSS . 36
Figure 25 – Diode voltage and current waveforms versus time showing V and
FRM
rising current di/dt . 37
Figure 26 – Test circuit for exponential critical rate of off-state voltage rise, dv/dt . 38
Figure 27 – Test circuit for gate-to-adjacent terminal peak off-state voltage and
current, V and I . 39
GDM GDM
Figure 28 – Test circuit for gate reverse current, adjacent terminal open, I , I . 39
GAO GKO
Figure 29 – Test circuit for gate reverse current, main terminals short-circuited, I ,
GAS
I . 40
GKS
Figure A.1 – Current or voltage impulse amplitude versus time showing a 10 % to
90 % T front time and T time to half value . 43
1 2
Figure A.2 – Voltage impulse amplitude versus time showing a 30 % to 90 % T front
time and T time to half value . 43
Figure B.1 – Particulars of the static characteristic of unidirectional thyristors. 52
Figure B.2 – Particulars of the static characteristic of bidirectional thyristors . 53
Figure B.3 – a) Approximation of the on-state V -I characteristic b) Approximation of
T T
the reverse V -I characteristic . 60
R R
Figure C.1 – Test circuit for thermal resistance and impedance . 65
Figure C.2 – Thermal impedance versus time . 66
Figure C.3 – Test circuit for gate reverse current, on-state, I , I . 67
GAT GKT
Figure C.4 – Test circuit for gate reverse current, forward conducting state, I ,
GAF
I . 68
GKF
Figure C.5 – Test circuit for gate switching current, gate switching charge and gate-to-
adjacent terminal breakover voltage, I , Q , V , V . 69
GSM GS GK(BO) GA(BO)
Figure C.6 – Test circuit of an integrated gate diode TSS for gate switching current,
gate switching charge and gate-to-adjacent terminal breakover voltage I , Q ,
GSM GS
V , V . 70
GK(BO) GA(BO)
Figure C.7 – Overall and expanded clamping waveforms for a P-type gate TSS
showing V and Q measurement (di /dt = 10 A/µs, V = –72 V) . 71
GK(BO) GS K GG
Figure D.1 – V /V ratio against V . 72
(BO) DRM DRM
Figure D.2 – V vs V . 73
(BO) DRM
Figure D.3 – Capacitance variation with DC bias . 73
Figure D.4 – I versus Duration for various 10/1 000 current ratings . 74
PP
Table 1 – Types of TSS . 17
Table 2 – Breakover ramp rate test values . 29
Table A.1 – Voltage impulse generators . 44
Table A.2 – Current impulse generators . 45
Table A.3 – Voltage and current impulse generators . 46
Table A.4 – Other voltage and current impulse generators . 47
Table B.1 – Additional general subscripts . 61
Table B.2 – Principal voltages, anode-cathode voltages. 62
Table B.3 – Principal currents, anode currents, cathode currents . 62
Table B.4 – Gate voltages . 63
Table B.5 – Gate currents . 63
Table B.6 – Sundry quantities . 63
Table B.7 – Power loss . 63

– 6 – IEC 61643-341:2020 © IEC 2020
INTERNATIONAL ELECTROTECHNICAL COMMISSION
___________
COMPONENTS FOR LOW-VOLTAGE SURGE PROTECTION –

Part 341: Performance requirements and test circuits
for thyristor surge suppressors (TSS)

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
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6) All users should ensure that they have the latest edition of this publication.
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8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 61643-341 has been prepared by subcommittee 37B, Components
for low-voltage surge protection, of IEC technical committee 37: Surge arresters.
This second edition of IEC 61643-341 cancels and replaces the first edition published in 2001.
This edition constitutes a technical revision.
This edition includes the following significant technical changes with respect to the previous
edition: Addition of performance values.

The text of this standard is based on the following documents:
FDIS Report on voting
37B/218/FDIS 37B/220/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
A list of all parts of IEC 61643 series, under the general title Components for low-voltage
surge protective devices, can be found on the IEC website.
The committee has decided that the contents of this publication will remain unchanged until
the stability date indicated on the IEC web site under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• reconfirmed;
• withdrawn;
• replaced by a revised edition, or
• amended.
– 8 – IEC 61643-341:2020 © IEC 2020
COMPONENTS FOR LOW-VOLTAGE SURGE PROTECTION –

Part 341: Performance requirements and test circuits
for thyristor surge suppressors (TSS)

1 Scope
This part of IEC 61643 specifies standard test circuits and methods for thyristor surge
suppressor (TSS) components. These surge protective components, SPCs, are specially
formulated thyristors designed to limit overvoltages and divert surge currents by clamping and
switching actions. These SPCs are used in the construction of surge protective devices
(SPDs) and equipment used in Information & Communications Technologies (ICT) networks
with voltages up to AC 1 000 V and DC 1 500 V. This document is applicable to gated or non-
gated TSS components with third quadrant (-v and –i) characteristics of blocking, conducting
or switching.
This document contains information on
• terminology;
• letter symbols;
• essential ratings and characteristics;
• rating verification and characteristic measurement;
This document does not apply to the conventional three-terminal thyristors as covered by
IEC 60747-6.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their
content constitutes requirements of this document. For dated references, only the edition
cited applies. For undated references, the latest edition of the referenced document (including
any amendments) applies.
IEC 60050-521, International Electrotechnical Vocabulary – Chapter 521: Semiconductor
devices and integrated circuits
IEC 60068-2-20:2008, Environmental testing – Part 2-20: Tests – Test T: Test methods for
solderability and resistance to soldering heat of devices with leads
3 Terms, definitions, abbreviated terms and symbols
For the purposes of this document, the following terms and definitions apply.
ISO and IEC maintain terminological databases for use in standardization at the following
addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp

3.1 Parametric terms, letter symbols and definitions
Where appropriate, terms, letter symbols and definitions are used from conventional thyristor
(IEC 60747-6) and rectifier diode (IEC 60747-2) standards. TSS definitions are the same or
similar to conventional thyristor definitions. To avoid the proliferation of terms, the word
“thyristor”, as used in the terms of this document, is synonymous with “TSS”.
NOTE 1 IEC 60747-1, clause 2.1.1 Basic letters, states “IEC 60027 recommends the letters V and v only as
reserve symbols for voltage; however, in the field of semiconductor devices, they are so widely used that in this
publication they are on the same plane as U and u." This document uses the letters V and v for voltage with the
letters U and u as alternatives.
NOTE 2 Where several distinctive forms of letter symbol exist, the most commonly used form is given first.
3.2 General terms
3.2.1
information and communications technologies
ICT
group of applications using information and communications (telecommunications)
technologies
[SOURCE: ISO/IEC 24704:2004, 3.1.5]
3.2.2
overcurrent
any current having a peak value exceeding the corresponding peak value of maximum steady-
state current at normal operating conditions
[SOURCE: IEC 60664-2-1, ed. 2.0 (2011-01), 3.21, modified by replacing voltage with current]
3.2.3
overvoltage
any voltage having a peak value exceeding the corresponding peak value of maximum
steady-state voltage at normal operating conditions
[SOURCE: IEC 60664-2-1, ed. 2.0 (2011-01), 3.21]
3.2.4
surge protective device
SPD
device that restricts the voltage of a designated port or ports, caused by a surge, when it
exceeds a predetermined level
Note 1 to entry: Secondary functions may be incorporated, such as a current limiting to restrict a terminal current.
Note 2 to entry: Typically, the protective circuit has at least one non-linear voltage-limiting surge protective
component.
Note 3 to entry: An SPD is a complete assembly, having terminals to connect to the circuit conductors.
[SOURCE: IEC 61643-21:2008, 3.8]
3.3 Main terminal ratings
Listed ratings cover the appropriate requirements of the blocking, conducting and switching
quadrants.
– 10 – IEC 61643-341:2020 © IEC 2020
3.3.1
repetitive peak off-state voltage
V
DRM
highest instantaneous value of the off-state voltage, including all repetitive transient voltages,
but excluding all non-repetitive transient voltages
[SOURCE: IEC 60747-6:2000, 3.5.12[10] , modified (removal of NOTE)]
3.3.2
repetitive peak on-state current
I
TRM
peak value of the on-state current, including all repetitive transient currents
[SOURCE: IEC 60747-6:2000, 3.6.15[10], modified (removal of Figure)]
3.3.3
surge on-state current
I
TSM
on-state current pulse of short duration and specified waveshape, whose application causes
or would cause the maximum rated virtual junction temperature to be exceeded, but which is
assumed to occur rarely and with a limited number of such occurrences during the service life
of the device and to be a consequence of unusual circuit conditions
[SOURCE: IEC 60747-6:2000, 3.6.17[10], modified (removal of "(for example, a fault) (see
figure 4)")]
3.3.4
non-repetitive peak impulse current
I
PP
rated maximum value of peak impulse current of specified amplitude and waveshape that may
be applied
3.3.5
repetitive peak reverse voltage (of a unidirectional thyristor)
V
RRM
highest instantaneous value of the reverse voltage, including all repetitive transient voltages,
but excluding all non-repetitive transient voltages
[SOURCE: IEC 60747-6:2000, 3.5.6[10], modified (removal of NOTE)]
3.3.6
non-repetitive surge forward current
I
FSM
forward current pulse of short time duration and specified waveshape, whose application
causes or would cause the maximum rated junction temperature to be exceeded, but which is
assumed to occur rarely and with a limited number of such occurrences during the service life
of the device and to be a consequence of unusual circuit conditions (for example a fault)
[SOURCE: IEC 60747-2:2000, 3.3.6[9], modified (original term did not include "non-
repetitive")]
3.3.7
repetitive peak forward current (diode)
I
FRM
peak value of the forward current including all repetitive transient currents
___________
Numbers in square brackets refer to the bibliography.

[SOURCE: IEC 60747-2:2000, 3.3.4[9]]
3.3.8
critical rate of rise of on-state current
di /dt
T cr
highest value of the rate of rise of on-state current that a thyristor can withstand without
deleterious effect
[SOURCE: IEC 60747-6:2000, 3.6.23[10]]
3.4 Main terminal characteristics
3.4.1
off-state voltage
V
D
anode, principal, or thyristor voltage when the thyristor is in the off state
[SOURCE: IEC 60747-6:2000, 3.5.9[10]]
3.4.2
off-state current
I
D
anode, principal, or thyristor current when the thyristor is in the off state
[SOURCE: IEC 60747-6:2000, 3.6.26[10]]
3.4.3
peak off-state current
I
DRM
maximum (peak) value of off-state current that results from the application of the repetitive
peak off-state voltage, V
DRM
3.4.4
breakover voltage
V
(BO)
voltage at the breakover point
[SOURCE: IEC 60747-6:2000, 3.5.1[10]]
3.4.5
holding current
I
H
minimum anode, principal, or thyristor current that will maintain the thyristor in the on state
[SOURCE: IEC 60747-6:2000, 3.6.25[10]]
3.4.6
off-state capacitance
C , C
o J
differential capacitance at the specified terminals in the off-state measured at specified
frequency, f, amplitude, V and DC bias, V
d D
3.4.7
repetitive peak reverse current
I
RRM
maximum (peak) value of reverse current that results from the application of the repetitive
peak reverse voltage, V
RRM
– 12 – IEC 61643-341:2020 © IEC 2020
3.4.8
forward recovery voltage (diode)
V
FRM
varying voltage occurring during the forward recovery time after instantaneous switching from
zero or a specified reverse voltage to a specified forward current
[SOURCE: IEC 60747-2:2000, 3.2.3[9]]
3.5 Additional and derived parameters
The following derived and measured parameters may be necessary or useful for comparison,
certain applications or statistical process controls.
3.5.1
breakover current
I
(BO)
anode, principal, or thyristor current at the breakover point
[SOURCE: IEC 60747-6:2000, 3.6.1[10]]
3.5.2
on-state voltage
V
T
anode, principal, or thyristor voltage when the thyristor is in the on state
[SOURCE: IEC 60747-6:2000, 3.5.8[10]]
3.5.3
on-state current
I
T
anode, principal, or thyristor current when the thyristor is in the on state
[SOURCE: IEC 60747-6:2000, 3.6.9[10]]
3.5.4
forward voltage (diode)
V
F
voltage across the terminals which results from the flow of current in the forward direction
[SOURCE: IEC 60747-2:2000, 3.2.1[9]]
3.5.5
forward current (diode)
I
F
current through the device in the forward conducting state
3.6 Temperature related parameters
All the semiconductor related TSS parameters are temperature dependent. The need for
temperature dependence information can often be removed by specifying that a parameter’s
maximum or minimum value should be valid over the intended operating temperature range.
Some common temperature related terms are shown hereafter.
3.6.1
variation of holding current with temperature
change in holding current, I , with changes in temperature and shown as a graph
H
3.6.2
temperature derating
derating with temperature above a specified base temperature, expressed as a percentage,
such as may be applied to peak pulse current
3.6.3
thermal resistance
R , R , R (R , R , R )
thJL thJC thJA θJL θJC θJA
effective temperature rise per unit power dissipation of a designated junction, above the
temperature of a stated external reference point (lead, case or ambient) under conditions of
thermal equilibrium
Note 1 to entry: Thermal resistance is usually expressed as K/W with °C/W as an alternative.
3.6.4
transient thermal impedance
Z , Z , Z (Z , Z , Z )
thJL(t) thJC(t) thJA(t) θJL(t) θJC(t) θJA(t)
change in the difference between the virtual junction temperature and the temperature of a
specified reference point or region (lead, case, or ambient) at the end of a time interval,
divided by the step function change in power dissipation at the beginning of the same time
interval which causes the change of temperature difference
Note 1 to entry: Thermal impedance is usually expressed as K/W with °C/W as an alternative.
Note 2 to entry: It is the thermal impedance of the junction under conditions of change and is generally given in
the form of a curve as a function of the duration of an applied power pulse.
3.6.5
(virtual) junction temperature
T , T
J VJ
theoretical temperature representing the temperature of the junction(s) calculated on the
basis of a simplified model of the thermal and electrical behaviour of the device
Note 1 to entry: The term “virtual-junction temperature” is particularly applicable to multijunction semiconductors
and is used to denote the temperature of the active semiconductor element when required in specifications and test
methods. The term “junction temperature”, T , is used interchangeably with the term “virtual junction temperature”,
J
T , in this standard.
VJ
3.6.6
maximum junction temperature
T
JM
maximum value of permissible junction temperature, due to self-heating, which a TSS can
withstand without degradation
3.6.7
storage temperature range
T to T
stgmin stgmax
temperature range over which the device can be stored without any voltage applied
3.7 Gate terminal parameters
3.7.1
gate trigger current
I
GT
lowest gate current required to switch a device from the off-state to the on-state
3.7.2
gate trigger voltage
V
GT
gate voltage required to produce the gate trigger current, I
GT
– 14 – IEC 61643-341:2020 © IEC 2020
3.7.3
gate-to-adjacent terminal peak off-state voltage
V
GDM
maximum gate to cathode voltage for a P-gate component or gate to anode voltage for an N-
gate component that may be applied such that a specified off-state current, I , at a rated off-
D
state voltage, V , is not exceeded
D
3.7.4
peak off-state gate current
I
GDM
maximum gate current that results from the application of the peak off-state gate voltage,
V
GDM
3.7.5
gate reverse current, adjacent terminal open
I , I
GAO GKO
current through the gate terminal when a specified gate bias voltage, V , is applied and the
G
cathode terminal for a P-gate component or anode terminal for an N-gate component is open-
circuited
3.7.6
gate reverse current, main terminals short-circuited
I , I
GAS GKS
current through the gate terminal when a specified gate bias voltage, V , is applied and the
G
cathode terminal for a P-gate component or anode
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