01.100.25 - Electrical and electronics engineering drawings
ICS 01.100.25 Details
Electrical and electronics engineering drawings
Technische Zeichnungen fur die Elektrotechnik und Elektronik
Dessins d'electronique et d'electrotechnique
Risbe s področja elektrotehnike in elektronike
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IEC 60263:2020 specifies standard aspect ratios for logarithmic or level characteristics expressed in decibels versus a logarithmic frequency axis and ranges for the radius of polar diagrams of level. Applications include hard copy printouts, electronic files (e.g., PDF files), scientific publications, screen displays in computer programs and apps, as well as graphs in standards.
Informative examples of graphs that conform to the requirements in this document are found in Annex A.
Although outside the scope of this document, graphs with a linear y-axis versus logarithmic frequency (e.g., phase, group delay, etc.) often accompany the standard aspect ratio graphs of level described in the normative part of this document. These are described in informative Annex B.
IEC 60263:2020 cancels and replaces the third edition published in 1982. This edition constitutes a technical revision.
This edition includes the following significant technical changes with respect to the previous edition:
a) the scope is expanded to include electronic files (e.g., PDF), scientific publications, graphs in other standards, and screen displays in programs and apps;
b) a Terms and Definitions clause has been added;
c) aspect ratios of 20 dB/decade, and 0,5, 1, 1,25, and 2,5 decades/decade have been added;
d) ranges of 60 dB or 30 dB are specified for polar plots of absolute level; a 30 dB range is specified for polar plots of relative level;
e) as most graphs are now computer generated, tolerances and sizes have been removed;
f) all informative figures have been updated with contemporary examples;
g) an informative annex with information about linear y-axis vs. logarithmic frequency has been added.
- Standard16 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 61188-6-4:2019 specifies generic requirements for dimensional drawings of SMD from the viewpoint of land pattern design.
The purpose of this document is to prevent land pattern design issues caused by lack of information and/or misuse of the information from SMD outline drawing as well as to improve the utilization of IEC 61188 series. This document is applicable to the SMD of semiconductor devices and electrical components.
- Standard43 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60191-1:2018(E) gives guidelines on the preparation of outline drawings of discrete devices, including discrete surface-mounted semiconductor devices with lead count less than 8.
This edition includes the following significant technical changes with respect to the previous edition:
a) the Scope has been extended to include surface-mounted semiconductor devices with a lead count less than 8;
b) a definition of the term "stand-off" has been added;
c) the methods for locating the datum have been extended to be suitable for SMD-packages;
d) the visual identification of terminal position one for automatic handling has been clarified;
e) the rules for the drawing of terminals have been clarified;
f) Table A.1 has been completed with symbols specifically for SMD-packages;
g) Annex B "Standardization philosophy" has been deleted;
h) a normative Annex with special rules for SMD-packages has been added;
i) the examples of semiconductor device drawings have been aligned to state-of-the-art packages including SMD-packages.
- Standard39 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60848:2013 defines the GRAFCET specification language for the functional description of the behaviour of the sequential part of a control system. It specifies the symbols and rules for the graphical representation of this language, as well as for its interpretation and has been prepared for automated production systems of industrial applications. This third edition cancels and replaces the second edition published in 2002 and constitutes a global technical revision with the extended definition of the concept of variables introducing: internal variable, input variable and output variable.
- Standard56 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60191-6-12:2011 provides standard outline drawings, dimensions, and recommended variations for all fine-pitch land grid array packages (FLGA) with terminal pitch of 0,8 mm or less. This edition includes the following significant changes with respect to the previous edition: - scope is expanded so that this standard include the square type FLGA. The title of this standard has been changed accordingly: 'Rectangular type' has been deleted from the title; - ball pitch of 0,3 mm has been added; - datum is changed from the body datum to the ball datum; - combination lists of D, E, MD, and ME have been revised.
- Standard22 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60191-6-17:2011 provides outline drawings and dimensions for stacked packages and individual stackable packages in the form of FBGA or FLGA.
- Standard30 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60191-6-20:2010 specifies methods to measure package dimensions of small outline J-lead-packages (SOJ), package outline form E in accordance with IEC 60191-4.
- Standard14 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60191-6-21:2010 specifies methods to measure package dimensions of small outline packages (SOP), package outline form E in accordance to IEC 60191-4.
- Standard17 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60191-6-19:2010 specifies measurement methods of the package warpage at elevated temperature and the maximum permissible warpages for Ball Grid Array(BGA), Fine-pitch Ball Grid Array (FBGA), and Fine-pitch Land Grid Array (FLGA). This standard cancels and replaces IEC/PAS 60191-6-19 published in 2008. This first edition constitutes a technical revision.
- Standard16 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60191-6-18:2010 provides standard outline drawings, dimensions, and recommended variations for all square ball grid array packages (BGA), whose terminal pitch is 1 mm or larger.
- Standard23 pagesEnglish languagesale 10% offe-Library read for1 day
IEC 60191-6:2009 gives general rules for the preparation of outline drawings of surface-mounted semiconductor devices. It supplements IEC 60191-1 and IEC 60191-3. It covers all surface-mounted devices discrete semiconductors with lead count of greater or equal to 8, as well as integrated circuits classified as form E in Clause 3 of IEC 60191-4. This third edition of IEC 60191-6 cancels and replaces the second edition, published in 2004 and constitutes a technical revision. This edition includes the following significant changes with respect to the previous edition: a) scope is modified to cover all surface-mounted devices discrete semiconductors with lead count of greater or equal to 8; b) editorial modifications on several pages; and c) technical revision to ball grid array package (BGA) especially its geometrical drawing format. (two types of BGA would unify as one type as a result of revising drawing format.
- Standard41 pagesEnglish languagesale 10% offe-Library read for1 day
Gives a glossary of semiconductor sockets for BGA, LGA, FBGA and FLGA. Intends to establish definitions and unification of terminology relating to tests and burn-in sockets for BGA, LGA, FBGA and FLGA
- Standard14 pagesEnglish languagesale 10% offe-Library read for1 day
Covers the requirements for the design rule of terminal shape plastic packages with gull-wing leads (e.g. QFP, SOP, SSOP, TSOP, etc.)
- Standard10 pagesEnglish languagesale 10% offe-Library read for1 day
Provides the common outline drawings and dimensions for all types of structures and composed materials of plastic very thin small outline non-lead package (P-VSON).
- Standard15 pagesEnglish languagesale 10% offe-Library read for1 day
Covers the requirements for the measuring methods of ball grid array (BGA) dimensions.
- Standard19 pagesEnglish languagesale 10% offe-Library read for1 day
Covers the requirements for the preparation of drawings of integrated circuit outlines for the various ball and column terminal packages.
- Standard13 pagesEnglish languagesale 10% offe-Library read for1 day
Gives guidance on the preparation of drawings of integrated circuits outlines.
- Standard60 pagesEnglish languagesale 10% offe-Library read for1 day
Provides the common outline drawings and dimensions for all types of structures and composed material of glass sealed ceramic quad flatpack.
- Standard13 pagesEnglish languagesale 10% offe-Library read for1 day
Stipulates a method for quad flat packs measuring dimensions which are classified into Form E.
- Standard20 pagesEnglish languagesale 10% offe-Library read for1 day
Provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch land grid whose terminal pitch is less than, or equal to, 0,80 mm and whose package body outline is square.
- Standard13 pagesEnglish languagesale 10% offe-Library read for1 day
Provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch ball grid array the terminal pitch of which is less than or equal to 0,80 mm.
- Standard13 pagesEnglish languagesale 10% offe-Library read for1 day
Gives guidance on the preparation of outline drawings of cathode ray tubes with the object of encouraging the same practice when publications are prepared in different countries.
- Standard31 pagesEnglish languagesale 10% offe-Library read for1 day
Gives guidelines on the preparation of outline drawings of discrete devices. For preparation of outline drawings of surface mounted discrete devices, IEC 60191-6 should be referred to as well. The main changes from the previous edition are as follows: - requirement added for SI-dimensions for new drawings to be published; - former rules concerning inch-dimensions are given in an informative annex; - former rules for coding are given in an informative annex; - incorporation of the supplements; - updating of references; - restructuring and renumbering.
- Standard42 pagesEnglish languagesale 10% offe-Library read for1 day
This part of IEC 60191 gives a design guideline of open-top-type semiconductor sockets for Fine-pitch Ball Grid Array ('FBGA' hereafter) and Fine-pitch Land Grid Array ('FLGA' hereafter). This standard is intended to establish the outline drawings and dimensions of the open-top-type socket out of the test and burn-in sockets applied to FBGA and FLGA.
- Standard18 pagesEnglish languagesale 10% offe-Library read for1 day
Defines the GRAFCET specification language for the functional description of the behaviour of the sequential part of a control system.Specifies the symbols and the rules for the graphical representation of this language, as well as for its interpretation. This standard has been prepared for automated production systems of industrial applications.However no particular area of application is excluded.
- Standard54 pagesEnglish languagesale 10% offe-Library read for1 day
Provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch land grid array whose terminal pitch is less than, or equal to, 0,80 mm and whose package body outline is rectangular.
- Standard23 pagesEnglish languagesale 10% offe-Library read for1 day
Gives general rules for the preparation of outlines drawings of surface-mounted semiconductor devices. It supplements EN 60191-1 and 60191-3. It covers all surface-mounted discrete semiconductors devices as well as integrated circuits classified as form E.
- Standard42 pagesEnglish languagesale 10% offe-Library read for1 day