Mechanical standardization of semiconductor devices -- Part 6-6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine pitch land grid array (FLGA)

Provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch land grid whose terminal pitch is less than, or equal to, 0,80 mm and whose package body outline is square.

Mechanische Normung von Halbleiterbauelementen -- Teil 6-6: Allgemeine Regeln für die Erstellung von Gehäusezeichnungen von SMD-Halbleitergehäusen - Konstruktionsleitfaden für Feinraster-Land-Grid-Array (FLGA)

Normalisation mécanique des dispositifs à semi-conducteurs -- Partie 6-6: Règles générales pour la préparation des dessins d'encombrement des dispositifs à semiconducteurs pour montage en surface - Guide de conception des dispositifs FLGA

La CEI 60191-6-6:2001 fournit les dessins d'encombrement et les dimensions courants de tous les types de structures et de matériaux composés des boîtiers matriciels à plots et à pas fin (appelés ci-après FLGA) dont le pas des bornes est inférieur ou égal à 0,80 mm et dont l'encombrement du corps du boîtier est carré.

Mechanical standardization of semiconductor devices - Part 6-6: General rules for the preparation of outline drawings of surface mounted semiconductor device package - Design guide for fine pitch land grid array (FLGA) (IEC 60191-6-6:2001)

General Information

Status
Published
Publication Date
31-Aug-2002
Current Stage
6060 - National Implementation/Publication (Adopted Project)
Start Date
01-Sep-2002
Due Date
01-Sep-2002
Completion Date
01-Sep-2002

Overview

EN 60191-6-6:2001 (adopted by CLC; identical to IEC 60191-6-6:2001) is a mechanical standardization document and design guide for fine pitch land grid array (FLGA) packages. It provides common outline drawings and dimensional rules for surface-mounted semiconductor device packages whose terminal pitch is ≤ 0.80 mm and whose package body outline is square. The standard defines how outline drawings should be prepared so designers, manufacturers and PCB engineers share a consistent geometric reference for FLGA footprints.

Key Topics

  • Scope and applicability: FLGA packages with square body outlines and terminal pitch less than or equal to 0.80 mm.
  • Outline drawing conventions: Standardized views, symbols and annotation rules for package outlines to ensure consistent mechanical documentation.
  • Dimensional references: Common dimensions and reference points used for defining package body, land patterns and terminal locations (as applicable to FLGA scope).
  • Material and structure neutrality: Guidance applies to all types of package structures and composed materials within the FLGA definition.
  • Interoperability focus: Emphasis on producing drawings that support cross-supplier compatibility, CAD libraries, and automated manufacturing processes.

Applications

  • Package design and development: Semiconductor package engineers use the standard as a design guide to produce compliant FLGA outlines.
  • PCB footprint creation: PCB designers and CAD librarians rely on the standardized outline drawings to create reliable land patterns for surface mount assembly.
  • Manufacturing and assembly: SMT process engineers and contract manufacturers use the drawings to set up pick-and-place, solder paste application and inspection criteria.
  • Quality, testing and procurement: Test engineers, QA teams and purchasing departments reference the standard to verify mechanical compatibility between component suppliers and board designs.
  • Cross-vendor interoperability: Enables consistent mechanical interfaces across multiple suppliers, reducing rework and design iteration.

Benefits (practical value)

  • Reduces ambiguity in package outlines and footprint interpretation.
  • Speeds up PCB layout and component library creation.
  • Improves first-pass yield in assembly by aligning mechanical tolerances and documentation.
  • Facilitates international compliance by referencing a harmonized EN/IEC standard.

Related Standards

  • IEC/EN 60191 series (general mechanical standardization for semiconductor devices) - EN 60191-6-6 aligns specifically with IEC 60191-6-6:2001.
  • Other parts of the 60191 series cover outline drawing rules for different package families and pitches (consult the IEC/EN catalogue for applicable parts).

Keywords: FLGA, fine pitch land grid array, surface-mounted semiconductor device packages, outline drawings, mechanical standardization, terminal pitch ≤ 0.80 mm, design guide, land grid array (LGA), SMD footprints.

Standard
SIST EN 60191-6-6:2002
English language
13 pages
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Frequently Asked Questions

SIST EN 60191-6-6:2002 is a standard published by the Slovenian Institute for Standardization (SIST). Its full title is "Mechanical standardization of semiconductor devices -- Part 6-6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine pitch land grid array (FLGA)". This standard covers: Provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch land grid whose terminal pitch is less than, or equal to, 0,80 mm and whose package body outline is square.

Provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch land grid whose terminal pitch is less than, or equal to, 0,80 mm and whose package body outline is square.

SIST EN 60191-6-6:2002 is classified under the following ICS (International Classification for Standards) categories: 01.100.25 - Electrical and electronics engineering drawings; 31.080.01 - Semiconductor devices in general; 31.240 - Mechanical structures for electronic equipment. The ICS classification helps identify the subject area and facilitates finding related standards.

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Standards Content (Sample)


SLOVENSKI STANDARD
01-september-2002
Mechanical standardization of semiconductor devices - Part 6-6: General rules for
the preparation of outline drawings of surface mounted semiconductor device
package - Design guide for fine pitch land grid array (FLGA) (IEC 60191-6-6:2001)
Mechanical standardization of semiconductor devices -- Part 6-6: General rules for the
preparation of outline drawings of surface mounted semiconductor device packages -
Design guide for fine pitch land grid array (FLGA)
Mechanische Normung von Halbleiterbauelementen -- Teil 6-6: Allgemeine Regeln für
die Erstellung von Gehäusezeichnungen von SMD-Halbleitergehäusen -
Konstruktionsleitfaden für Feinraster-Land-Grid-Array (FLGA)
Normalisation mécanique des dispositifs à semi-conducteurs -- Partie 6-6: Règles
générales pour la préparation des dessins d'encombrement des dispositifs à
semiconducteurs pour montage en surface - Guide de conception des dispositifs FLGA
Ta slovenski standard je istoveten z: EN 60191-6-6:2001
ICS:
01.100.25 5LVEHVSRGURþMD Electrical and electronics
HOHNWURWHKQLNHLQHOHNWURQLNH engineering drawings
31.080.01 Polprevodniški elementi Semiconductor devices in
(naprave) na splošno general
31.240 Mehanske konstrukcije za Mechanical structures for
elektronsko opremo electronic equipment
SIST EN 6019
...

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