Integrated circuits - Measurement of electromagnetic immunity - Part 1: General conditions and definitions

IEC 62132-1:2015 provides general information and definitions about measurement of electromagnetic immunity of integrated circuits (ICs) to conducted and radiated disturbances. It also defines general test conditions, test equipment and setup, as well as the test procedures and content of the test reports for all parts of the IEC 62132 series. Test method comparison tables are included in Annex A to assist in selecting the appropriate measurement method(s). This edition includes the following significant technical changes with respect to the previous edition:
a) frequency range of 150 kHz to 1 GHz has been deleted from the title;
b) frequency step above 1 GHz has been added in Table 2 in 7.4.1;
c) IC performance classes in 8.3 have been modified;
d) Table A.1 was divided into two tables, and references to IEC 62132-8 and IEC 62132-9 have been added in the new Table A.2 in Annex A.

Integrierte Schaltungen - Messung der elektromagnetischen Störfestigkeit - Teil 1: Allgemeine Bedingungen und Begriffe

Circuits intégrés - Mesure de l'immunité électromagnétique - Partie 1: Conditions générales et définitions

L'IEC 62132-1:2015 fournit des informations générales et des définitions relatives à la mesure de l'immunité électromagnétique des circuits intégrés (CI) aux perturbations conduites et rayonnées. Elle définit également les conditions générales d'essai, l'équipement et le montage d'essai, ainsi que les méthodes d'essai et le contenu des rapports d'essai pour toutes les parties de la série IEC 62132. Des tableaux de comparaison des méthodes d'essai sont inclus dans l'Annexe A pour aider à la sélection de la ou des méthodes de mesure appropriées. Cette édition inclut les modifications techniques majeures suivantes par rapport à l'édition précédente:
a) la plage de fréquences de 150 kHz à 1 GHz a été supprimée du titre;
b) l'échelon de fréquence supérieur à 1 GHz a été ajouté dans le Tableau 2 de 7.4.1;
c) les classes de performance des circuits intégrés de 8.3 ont été modifiées;
d) le Tableau A.1 a été divisé en deux tableaux, et des références à l'IEC 62132-8 et à l'IEC 62132-9 ont été ajoutées dans le nouveau Tableau A.2 de l'Annexe A.

Integrirana vezja - Meritve elektromagnetne odpornosti - 1. del: Splošni pogoji in definicije

Ta del standarda IEC 62132 zagotavlja splošne informacije in definicije o meritvah elektromagnetne odpornosti integriranih vezij (IC) na prevodne in sevane motnje. Določa tudi splošne pogoje preskušanja, preskusno opremo in nastavitev, preskusne postopke in vsebino poročil o preskusih za vse dele serije standarda IEC 62132. Primerjalne preglednice preskusnih metod so vključene v dodatku A; so v pomoč pri izbiri ustrezne metode meritve.

General Information

Status
Published
Publication Date
09-Mar-2016
Technical Committee
Current Stage
6060 - National Implementation/Publication (Adopted Project)
Start Date
02-Mar-2016
Due Date
07-May-2016
Completion Date
10-Mar-2016

Relations

Overview

EN 62132-1:2016 (identical to IEC 62132-1:2015) is the European/CENELEC adoption by CLC of the international standard that defines general conditions and definitions for measuring electromagnetic immunity of integrated circuits (ICs). It establishes the baseline test conditions, required equipment and setup, common test procedures, and the required contents of test reports that apply across the IEC 62132 series of IC immunity methods. The edition clarifies frequency-step handling above 1 GHz, revises IC performance classes, and updates the test-method comparison Annex.

Key topics and technical requirements

  • Scope & definitions: Common terminology and applicability for all IC immunity measurements (conducted and radiated).
  • Test conditions: Required ambient and RF-ambient conditions, RF-immunity of test setups, temperature and other environmental constraints.
  • Test equipment & shielding: Requirements for generators, amplifiers, shielding (Faraday cages, TEM cells) and general lab setup.
  • Test setup & board design: Recommended test circuit board layout, ground planes, via placement, pin loading/termination and decoupling guidelines.
  • Pin selection & IC handling: Rules for which pins to exercise and monitor, prescribed loading/default values, power-supply and stimulation requirements.
  • Test procedures: Frequency steps (Table 2), amplitude modulation, dwell times, power levelling for modulated signals and monitoring during tests.
  • Measurement reporting: Mandatory content of test reports, immunity limits/levels, IC performance classes and guidance for interpreting results and correlating different methods.
  • Method comparison: Annex A contains tables comparing conducted vs radiated methods to help select appropriate measurement techniques.

Applications and practical value

  • Provides a single authoritative reference for establishing repeatable, comparable IC immunity tests across labs and programs.
  • Useful for IC design verification, pre-compliance and qualification testing, and for EMC laboratories to develop standardized test procedures.
  • Supports product development decisions: component selection, decoupling strategies, pin protection and layout changes to improve immunity.
  • Assists in correlating IC-level immunity data to module/system EMC requirements and in failure analysis of EMI-related faults.

Who should use this standard

  • IC manufacturers and test engineers
  • EMC/EMI laboratories and test houses
  • Semiconductor design and verification teams
  • Compliance engineers and product qualification groups
  • Regulators and procurement teams defining test requirements

Related standards

  • IEC/EN 62132 series: Part 2 (TEM cell), Part 3 (BCI), Part 4 (Direct RF injection), Part 5 (Workbench Faraday cage), Part 8 (IC stripline), IEC/TS 62132-9 (Surface scan). These parts contain the specific measurement methods referenced by EN 62132-1:2016.
Standard
SIST EN 62132-1:2016
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Standards Content (Sample)


SLOVENSKI STANDARD
01-april-2016
1DGRPHãþD
SIST EN 62132-1:2006
Integrirana vezja - Meritve elektromagnetne odpornosti - 1. del: Splošni pogoji in
definicije
Integrated circuits - Measurement of electromagnetic immunity - Part 1: General
conditions and definitions
Ta slovenski standard je istoveten z: EN 62132-1:2016
ICS:
31.200 Integrirana vezja, Integrated circuits.
mikroelektronika Microelectronics
33.100.20 Imunost Immunity
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

EUROPEAN STANDARD EN 62132-1
NORME EUROPÉENNE
EUROPÄISCHE NORM
February 2016
ICS 31.200 Supersedes EN 62132-1:2006
English Version
Integrated circuits - Measurement of electromagnetic immunity -
Part 1: General conditions and definitions
(IEC 62132-1:2015)
Circuits intégrés - Mesure de l'immunité électromagnétique Integrierte Schaltungen - Messung der elektromagnetischen
- Partie 1: Conditions générales et définitions Störfestigkeit - Teil 1: Allgemeine Bedingungen und Begriffe
(IEC 62132-1:2015) (IEC 62132-1:2015)
This European Standard was approved by CENELEC on 2015-12-03. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia,
Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland,
Turkey and the United Kingdom.

European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Avenue Marnix 17, B-1000 Brussels
© 2016 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
Ref. No. EN 62132-1:2016 E
European foreword
The text of document 47A/974/FDIS, future edition 2 of IEC 62132-1, prepared by SC 47A “Integrated
circuits” of IEC/TC 47 “Semiconductor devices” was submitted to the IEC-CENELEC parallel vote and
approved by CENELEC as EN 62132-1:2016.

The following dates are fixed:
(dop) 2016-09-03
• latest date by which the document has to be
implemented at national level by
publication of an identical national
standard or by endorsement
• latest date by which the national (dow) 2018-12-03
standards conflicting with the
document have to be withdrawn
This document supersedes EN 62132-1:2006.

Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC [and/or CEN] shall not be held responsible for identifying any or all such
patent rights.
Endorsement notice
The text of the International Standard IEC 62132-1:2015 was approved by CENELEC as a European
Standard without any modification.
In the official version, for Bibliography, the following notes have to be added for the standards
indicated:
IEC 61400-4-3 NOTE Harmonized as EN 61400-4-3.
IEC 61400-4-6 NOTE Harmonized as EN 61400-4-6.
IEC 61967-1:2002 NOTE Harmonized as EN 61967-1:2002.
CISPR 20 NOTE Harmonized as EN 55020.

Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications
The following documents, in whole or in part, are normatively referenced in this document and are
indispensable for its application. For dated references, only the edition cited applies. For undated
references, the latest edition of the referenced document (including any amendments) applies.
NOTE 1 When an International Publication has been modified by common modifications, indicated by (mod), the relevant

EN/HD applies.
NOTE 2 Up-to-date information on the latest versions of the European Standards listed in this annex is available here:
www.cenelec.eu.
Publication Year Title EN/HD Year
IEC 62132-2 -  Integrated circuits - Measurement of EN 62132-2 -
electromagnetic immunity -- Part 2:
Measurement of radiated immunity - TEM
cell and wideband TEM cell method
IEC 62132-3 -  Integrated circuits - Measurement of EN 62132-3 -
electromagnetic immunity, 150 kHz to 1
GHz -- Part 3: Bulk current injection (BCI)
method
IEC 62132-4 -  Integrated circuits - Measurement of EN 62132-4 -
electromagnetic immunity, 150 kHz to 1
GHz -- Part 4: Direct RF power injection
method
IEC 62132-5 -  Integrated circuits - Measurement of EN 62132-5 -
electromagnetic immunity, 150 kHz to 1
GHz -- Part 5: Workbench Faraday cage
method
IEC 62132-8 -  Integrated circuits - Measurement of EN 62132-8 -
electromagnetic immunity -- Part 8:
Measurement of radiated immunity - IC
stripline method
IEC/TS 62132-9 -  Integrated circuits - Measurement of - -
electromagnetic immunity - Part 9:
Measurement of radiated immunity -
Surface scan method
IEC 62132-1 ®
Edition 2.0 2015-10
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Integrated circuits – Measurement of electromagnetic immunity –

Part 1: General conditions and definitions

Circuits intégrés – Mesure de l'immunité électromagnétique –

Partie 1: Conditions générales et définitions

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.200 ISBN 978-2-8322-2968-2

– 2 – IEC 62132-1:2015 © IEC 2015
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 7
2 Normative references. 7
3 Terms and definitions . 7
4 Test conditions . 11
4.1 General . 11
4.2 Ambient conditions . 11
4.2.1 Ambient temperature . 11
4.2.2 RF ambient . 11
4.2.3 RF-immunity of the test setup . 11
4.2.4 Other ambient conditions . 11
4.3 Test generator . 11
4.4 Frequency range . 11
5 Test equipment . 12
5.1 General . 12
5.2 Shielding . 12
5.3 Test generator and power amplifier . 12
5.4 Other components . 12
6 Test setup . 12
6.1 General . 12
6.2 Test circuit board . 12
6.3 Pin selection scheme . 12
6.4 IC pin loading/termination . 13
6.5 Power supply requirements . 13
6.6 IC specific considerations . 13
6.6.1 IC supply voltage . 13
6.6.2 IC decoupling . 14
6.6.3 Operation of IC . 14
6.6.4 Guidelines for IC stimulation . 14
6.6.5 IC monitoring . 14
6.7 IC stability over time . 14
7 Test procedure . 14
7.1 Monitoring check . 14
7.2 Human exposure . 14
7.3 System verification . 14
7.4 Specific procedures . 15
7.4.1 Frequency steps . 15
7.4.2 Amplitude modulation . 15
7.4.3 Power levelling for modulation . 15
7.4.4 Dwell time . 16
7.4.5 Monitoring of the IC . 16
8 Test report. 16
8.1 General . 16

IEC 62132-1:2015 © IEC 2015 – 3 –
8.2 Immunity limits or levels . 17
8.3 IC performance classes . 17
8.4 Interpretation of results . 17
8.4.1 Comparison between IC(s) using the same test method . 17
8.4.2 Comparison between different test methods. 17
8.4.3 Correlation to module test methods . 17
Annex A (informative) Test method comparison table . 18
Annex B (informative) General test board description . 20
B.1 Overview. 20
B.2 Board description – Mechanical . 20
B.3 Board description – Electrical . 20
B.3.1 General . 20
B.3.2 Ground planes . 20
B.3.3 Package pins . 21
B.3.4 Via diameters . 21
B.3.5 Via distance . 21
B.3.6 Additional components . 21
B.3.7 Supply decoupling . 21
B.3.8 I/O load . 22
Bibliography . 24

Figure 1 – RF signal when RF peak power level is maintained . 16
Figure B.1 – Example of an immunity test board . 23

Table 1 – IC pin loading default values . 13
Table 2 – Frequency step size versus frequency range . 15
Table A.1 – Conducted immunity . 18
Table A.2 – Radiated immunity . 19
Table B.1 – Position of vias over the board . 20

– 4 – IEC 62132-1:2015 © IEC 2015
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
INTEGRATED CIRCUITS –
MEASUREMENT OF ELECTROMAGNETIC IMMUNITY –

Part 1: General conditions and definitions

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 62132-1 has been prepared by subcommittee 47A: Integrated
circuits, of IEC technical committee 47: Semiconductor devices.
This second edition cancels and replaces the first edition published in 2006 and constitutes a
technical revision.
This edition includes the following significant technical changes with respect to the previous
edition:
a) frequency range of 150 kHz to 1 GHz has been deleted from the title;
b) frequency step above 1 GHz has been added in Table 2 in 7.4.1;
c) IC performance classes in 8.3 have been modified;
d) Table A.1 was divided into two tables, and references to IEC 62132-8 and IEC 62132-9
have been added in the new Table A.2 in Annex A.

IEC 62132-1:2015 © IEC 2015 – 5 –
The text of this standard is based on the following documents:
FDIS Report on voting
47A/974/FDIS 47A/977/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
A list of all parts in the IEC 62132 series, published under the general title Integrated circuits
– Measurement of electromagnetic immunity, can be found on the IEC website.
Future standards in this series will carry the new general title as cited above. Titles of existing
standards in this series will be updated at the time of the next edition.
The committee has decided that the contents of this publication will remain unchanged until
the stability date indicated on the IEC website under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
– 6 – IEC 62132-1:2015 © IEC 2015
INTRODUCTION
The IEC 62132 series is published in several parts, under the general title Integrated circuits –
Measurement of electromagnetic immunity:
• Part 1: General conditions and definitions
• Part 2: Measurement of radiated immunity – TEM cell and wideband TEM cell method
• Part 3: Bulk current injection (BCI) method
• Part 4: Direct RF power injection method
• Part 5: Workbench Faraday cage method
• Part 8: Measurement of radiated immunity – IC stripline method
• Part 9: Measurement of radiated immunity – Surface scan method

IEC 62132-1:2015 © IEC 2015 – 7 –
INTEGRATED CIRCUITS –
MEASUREMENT OF ELECTROMAGNETIC IMMUNITY –

Part 1: General conditions and definitions

1 Scope
This part of IEC 62132 provides general information and definitions about measurement of
electromagnetic immunity of integrated circuits (ICs) to conducted and radiated disturbances.
It also defines general test conditions, test equipment and setup, as well as the test
procedures and content of the test reports for all parts of the IEC 62132 series. Test method
comparison tables are included in Annex A to assist in selecting the appropriate measurement
method(s).
2 Normative references
The following documents, in whole or in part, are normatively referenced in this document and
are indispensable for its application. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any
amendments) applies.
IEC 62132-2, Integrated circuits – Measurement of electromagnetic immunity – Part 2:
Measurement of radiated immunity –TEM cell and wideband TEM cell method
IEC 62132-3, Integrated circuits – Measurement of electromagnetic immunity, 150 kHz to
1 GHz – Part 3: Bulk current injection (BCI) method
IEC 62132-4, Integrated circuits – Measurement of electromagnetic immunity, 150 kHz to
1 GHz – Part 4: Direct RF power injection method
IEC 62132-5, Integrated circuits – Measurement of electromagnetic immunity, 150 kHz to
1 GHz – Part 5: Workbench Faraday cage method
IEC 62132-8, Integrated circuits – Measurement of electromagnetic immunity – Part 8:
Measurement of radiated immunity –IC Stripline method
IEC TS 62132-9, Integrated circuits – Measurement of electromagnetic immunity – Part 9:
Measurement of radiated immunity – Surface scan method
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
3.1
amplitude modulation
AM
process by which the amplitude of a periodic carrier wave is varied according to a specified
law
Note 1 to entry: This note applies to the French language only.

– 8 – IEC 62132-1:2015 © IEC 2015
[SOURCE: IEC 60050-314:2001, 314-08-01, modified – The abbreviation AM has been added
as a second preferred term, the existing note has been removed and a new Note 1 has been
added.]
3.2
artificial network
AN
network presenting a reference load impedance (simulated) to the DUT (e.g. extended power
or communication lines) across which the RF disturbance voltage can be measured and which
isolates the apparatus from the power supply or loads in a given frequency range
Note 1 to entry: This note applies to the French language only.
3.3
associated equipment
transducers (e.g. probes, networks and antennas) connected to a measuring receiver or test
generator; also transducers which are used in the signal or disturbance transmission path
between a DUT and measuring equipment or a (test) signal generator
3.4
auxiliary equipment
AE
equipment not under test that is nevertheless indispensable for setting up all the functions
and assessing the correct performance (operation) of the equipment under test (EUT) during
its exposure to the disturbance
3.5
bias tee
coupling device that allows the signal superposition of an RF signal to a DC signal to an
output port without affecting the RF path
3.6
common mode voltage
asymmetrical disturbance voltage
mean of the phasor voltages appearing between each conductor and a specified reference,
usually earth or frame
[SOURCE: IEC 60050-161:1990, 161-04-09, modified – The second preferred term
"asymmetrical voltage" has been removed and a new admittted term, "asymmetrical
disturbance voltage" has been added.]
3.7
common mode current
vector sum of the currents flowing through two or more conductors at a specified cross-
section of a plane intersected by these conductors
3.8
continuous wave
CW
waves, whose successive oscillations are identical under steady state conditions
Note 1 to entry: This note applies to the French language only.
3.9
coupling network
electrical circuit for transferring energy from one circuit to another with well-defined
impedances
IEC 62132-1:2015 © IEC 2015 – 9 –
3.10
decoupling network
electrical circuit for preventing test signals applied to the DUT from affecting other devices,
equipment or systems that are not under test
3.11
device under test
DUT
device, equipment or system being evaluated
Note 1 to entry: As used in this standard, DUT refers to the semiconductor device being tested.
Note 2 to entry: This note applies to the French language only.
3.12
die shrink
reduction of the die size by using an advanced fabrication process including a finer
lithography node and reduced masks
Note 1 to entry: The amount of die shrink of a mask used to produce an IC is expressed as a percentage or as
dimensions relative to the original artwork layout.
3.13
differential mode current
in a two-conductor cable, or two particular conductors in a multi-conductor cable, half the
magnitude of the difference of the phasors representing the currents in each conductor
[SOURCE: IEC 60050-161:1990/AMD2:1998, 161-04-38]
3.14
differential mode voltage
voltage between any two of a specified set of active conductors
[SOURCE: IEC 60050-161:1990, 161-04-08, modified – The second preferred term
"symmetrical voltage" has been removed.]
3.15
directional coupler
transmission coupling device for separately (ideally) sampling (through known coupling loss
for measuring purposes) either the forward (incident) or backward (reflected) waves in a
transmission line
3.16
electrically small PCB
printed circuit board with length and width shorter than λ/2, e.g. 100 mm to 150 mm at 1 GHz
3.17
electromagnetic compatibility
EMC
ability of an equipment or system to function satisfactorily in its electromagnetic environment
without introducing intolerable electromagnetic disturbances to anything in that environment
[SOURCE: IEC 60050-161:1990, 161-01-07]
3.18
forward power
amount of power that is sent from the RF source towards the (assumed matched) RF load
without considering the RF power that is being reflected backwards by the RF load

– 10 – IEC 62132-1:2015 © IEC 2015
3.19
ground plane
reference ground plane
flat conductive surface whose potential is used as a common reference
[SOURCE: IEC 60050-161:1990/AMD5:2015, 161-04-36, modified – The first preferred term
"ground plane" has been added, the abbreviation RGP has been removed, the definition has
been shortened and Notes 1 and 2 have been deleted.]
3.20
immunity
ability of a device, equipment or system to perform without degradation in
the presence of an electromagnetic disturbance
[SOURCE: IEC 60050-161:1990, 161-01-20]
3.21
injection network
couplin
...

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Frequently Asked Questions

SIST EN 62132-1:2016 is a standard published by the Slovenian Institute for Standardization (SIST). Its full title is "Integrated circuits - Measurement of electromagnetic immunity - Part 1: General conditions and definitions". This standard covers: IEC 62132-1:2015 provides general information and definitions about measurement of electromagnetic immunity of integrated circuits (ICs) to conducted and radiated disturbances. It also defines general test conditions, test equipment and setup, as well as the test procedures and content of the test reports for all parts of the IEC 62132 series. Test method comparison tables are included in Annex A to assist in selecting the appropriate measurement method(s). This edition includes the following significant technical changes with respect to the previous edition: a) frequency range of 150 kHz to 1 GHz has been deleted from the title; b) frequency step above 1 GHz has been added in Table 2 in 7.4.1; c) IC performance classes in 8.3 have been modified; d) Table A.1 was divided into two tables, and references to IEC 62132-8 and IEC 62132-9 have been added in the new Table A.2 in Annex A.

IEC 62132-1:2015 provides general information and definitions about measurement of electromagnetic immunity of integrated circuits (ICs) to conducted and radiated disturbances. It also defines general test conditions, test equipment and setup, as well as the test procedures and content of the test reports for all parts of the IEC 62132 series. Test method comparison tables are included in Annex A to assist in selecting the appropriate measurement method(s). This edition includes the following significant technical changes with respect to the previous edition: a) frequency range of 150 kHz to 1 GHz has been deleted from the title; b) frequency step above 1 GHz has been added in Table 2 in 7.4.1; c) IC performance classes in 8.3 have been modified; d) Table A.1 was divided into two tables, and references to IEC 62132-8 and IEC 62132-9 have been added in the new Table A.2 in Annex A.

SIST EN 62132-1:2016 is classified under the following ICS (International Classification for Standards) categories: 31.200 - Integrated circuits. Microelectronics; 33.100.20 - Immunity. The ICS classification helps identify the subject area and facilitates finding related standards.

SIST EN 62132-1:2016 has the following relationships with other standards: It is inter standard links to SIST EN 62132-1:2006. Understanding these relationships helps ensure you are using the most current and applicable version of the standard.

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記事タイトル:SIST EN 62132-1:2016 - 統合回路 - 電磁妨害の測定 - 第1部:一般的な条件と定義 記事の内容:このIEC 62132の一部では、統合回路(IC)の導電および放射妨害に対する電磁妨害の測定に関する一般的な情報と定義を提供します。IEC 62132シリーズのすべての部分についての一般的な試験条件、試験装置および設定、試験手順および試験報告書の内容も定義されています。適切な測定方法を選択するための比較表が付録Aに含まれています。

The article is about SIST EN 62132-1:2016, which provides general information and definitions about measuring the electromagnetic immunity of integrated circuits (ICs) to conducted and radiated disturbances. It also defines test conditions, equipment, setup, procedures, and the content of test reports for the entire IEC 62132 series. Annex A includes comparison tables for different test methods to help select the appropriate measurement method.

기사 제목: SIST EN 62132-1:2016 - 통합 회로 - elektromagnetická imunita - 제1부: 일반 조건 및 정의에 대한 측정 기사 내용: 이 IEC 62132의 일부는 통합 회로(IC)의 전도 및 방사 장애물에 대한 elektromagnetická imunita의 측정에 대한 일반 정보와 정의를 제공합니다. 또한 IEC 62132 시리즈의 모든 부분에 대한 일반 테스트 조건, 테스트 장비 및 설정, 테스트 절차 및 테스트 보고서의 내용을 정의합니다. 테스트 방법 비교 표는 부록 A에 포함되어 알맞은 측정 방법을 선택하는 데 도움이 됩니다.