IEC PAS 62588:2008

IEC/PAS 62588
Edition 1.0 2008-09
PUBLICLY AVAILABLE
SPECIFICATION


Marking and labeling of components, PCBs and PCBAs to identify lead(Pb),
Pb-free and other attributes



IEC/PAS 62588:2008(E)

---------------------- Page: 1 ----------------------
THIS PUBLICATION IS COPYRIGHT PROTECTED
Copyright © 2008 IEC, Geneva, Switzerland

All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized in any form
or by any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from
either IEC or IEC's member National Committee in the country of the requester.
If you have any questions about IEC copyright or have an enquiry about obtaining additional rights to this publication,
please contact the address below or your local IEC member National Committee for further information.

IEC Central Office
3, rue de Varembé
CH-1211 Geneva 20
Switzerland
Email: inmail@iec.ch
Web: www.iec.ch

About the IEC
The International Electrotechnical Commission (IEC) is the leading global organization that prepares and publishes
International Standards for all electrical, electronic and related technologies.

About IEC publications
The technical content of IEC publications is kept under constant review by the IEC. Please make sure that you have the
latest edition, a corrigenda or an amendment might have been published.
ƒ Catalogue of IEC publications: www.iec.ch/searchpub
The IEC on-line Catalogue enables you to search by a variety of criteria (reference number, text, technical committee,…).
It also gives information on projects, withdrawn and replaced publications.
ƒ IEC Just Published: www.iec.ch/online_news/justpub
Stay up to date on all new IEC publications. Just Published details twice a month all new publications released. Available
on-line and also by email.
ƒ Electropedia: www.electropedia.org
The world's leading online dictionary of electronic and electrical terms containing more than 20 000 terms and definitions
in English and French, with equivalent terms in additional languages. Also known as the International Electrotechnical
Vocabulary online.
ƒ Customer Service Centre: www.iec.ch/webstore/custserv
If you wish to give us your feedback on this publication or need further assistance, please visit the Customer Service
Centre FAQ or contact us:
Email: csc@iec.ch
Tel.: +41 22 919 02 11
Fax: +41 22 919 03 00

---------------------- Page: 2 ----------------------
IEC/PAS 62588
Edition 1.0 2008-09
PUBLICLY AVAILABLE
SPECIFICATION


Marking and labeling of components, PCBs and PCBAs to identify lead(Pb),
Pb-free and other attributes


INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
PRICE CODE
P
ICS 31.190 ISBN 2-8318-9989-3
® Registered trademark of the International Electrotechnical Commission

---------------------- Page: 3 ----------------------
IPC/JEDEC J-STD-609
ASSOCIATION CONNECTING
®
ELECTRONICS INDUSTRIES
Marking and Labeling of Components,
PCBs and PCBAs to Identify Lead(Pb),
Pb-Free and Other Attributes
A joint standard developed by the Marking, Symbols and Labels
for Identification of Assemblies, Components and Devices Task
Group (4-34b) and JEDEC Committee JC14.4 Quality Processes
and Methods
Users of this publication are encouraged to participate in the
Supersedes:
development of future revisions.
JESD97 - May 2004
IPC-1066 - January 2005
Contact:
JEDEC IPC
Solid State Technology Association 3000 Lakeside Drive, Suite 309S
2500 Wilson Boulevard Bannockburn, Illinois
Arlington, VA 22201-3834 60015-1249
Tel 703 907.7500 Tel 847 615.7100
Fax 703 907.7501 Fax 847 615.7105

---------------------- Page: 4 ----------------------
Copyright © 2007, IPC/JEDEC; 2008, IEC
IPC/JEDEC J-STD-609 May 2007
Table of Contents
IPC/JEDEC Foreword. v
5 MARKING/LABELING CATEGORIES .4
IEC Foreword.vii
5.1 PCB Base Material Categories .4
5.1.1 Halogen-Free Base Material .4
1 SCOPE . 1
5.2 PCB Surface Finish Categories .4
1.1 Purpose . 1
5.2.1 Pb-Containing . .4
2 REFERENCE DOCUMENTS . 1
5.2.2 Pb-Free .4
nd
2.1 IPC . 1
5.3 2 Level Interconnect Categories .4
2.2 JEDEC . 1
5.3.1 Pb-Containing . .4
2.3 IEC . 1
5.3.2 Pb-Free .4
2.4 European Parliament . 1
5.4 Conformal Coating Categories .4
2.5 ANSI . 1
6 COMPONENT MARKING AND LABELING .4
3 TERMS AND DEFINITIONS .1
6.1 Component Marking .4
3.1 2D Code Label (Matrix) . 1
6.2 Lowest Level Shipping Container Labeling . .4
3.2 2 Li (or 2LI) . 1
nd
7 PCB/ASSEMBLY MARKING AND LABELING.5
3.3 2 Level Interconnect . 2
7.1 PCB Marking.5
nd
3.4 2 Level Interconnect Component Label . 2
7.1.1 PCB Shipping Container Labeling .5
nd
3.5 2 Level Interconnect Terminal Finish 7.2 Assembly Marking .5
or Material . 2
7.2.1 Assembly Shipping Container Labeling.5
3.6 Component .2
7.3 Solder Category Marking Sequence . .5
3.7 Base Materials.2
7.4 Location .5
3.8 Halogen-Free Board .2
7.5 Size .5
3.9 Homogeneous Material .2
7.6 Color .5
3.10 intct (or INTCT) . 2
7.7 Font .5
3.11 Linear Bar Code Label . 2
7.8 Method .5
3.12 Material Category.2
7.9 Marking Sequence .5
3.13 Maximum Component Temperature . 2
3.14 ‘‘Pb-Free’’ .2 7.10 Re-Marking Changes in PCBA Materials . .6
3.15 Pb-Free Symbol .2
8 MARKING AND/OR LABELING OF LEAD
(Pb)-CONTAINING COMPONENTS, PCBs,
4 SYMBOLS, LABELS AND MARKS. 2
AND PCB ASSEMBLIES. 6
4.1 Material Category Symbol . 2
8.1 Marking and Labeling of Components.6
4.1.1 Size and Location .2
8.2 Marking and Labeling of PCBs.6
4.1.2 Color.2
8.3 Marking and Labeling of PCB Assemblies . . 6
4.1.3 Font .2
9 SUMMARY OF MARKING AND LABELING
4.2 Pb-Free Symbol.2
REQUIREMENTS . . 7
nd
4.3 2 Level Interconnect Component Label . 3
Annex A – Acknowledgment.8
4.3.1 Size.3
4.3.2 Color .3
ii

---------------------- Page: 5 ----------------------
Copyright © 2007, IPC/JEDEC; 2008, IEC
IPC/JEDEC J-STD-609 May 2007
Figures
nd
Figure 3-1 Examples of Materials that Comprise the 2
Level Interconnect . 2
Figure 4-1 Example of Mark Indicating Material Category
e2 and the Optional Circle, Ellipse, Underline
or Parentheses . 2
Figure 4-2 Pb-Free Symbol . 3
nd
Figure 4-3 Example of 2 Level Interconnect Component
Label Indicating a Pb-Containing Material . 3
nd
Figure 4-4 Example of 2 Level Interconnect Component
Label Indicating a Pb-Free e2 Material with a
Maximum Component Temperature of 260°C . 3
nd
Figure 4-5 Example of 2 Level Interconnect Component
Label Utilizing the Lead Free Symbol Indicating
Both Pb-Free Material with Category and Maxi-
mum Component Temperature Indicated on an
Adjacent Label . 3
Figure 6-1 Example of Component Marking . 5
Figure 7-1 Example of Board/Assembly Markings . 6
Tables
Table 9-1 Marking and Labeling Summary . 7
iii

---------------------- Page: 6 ----------------------
Copyright © 2007, IPC/JEDEC; 2008, IEC
IPC/JEDEC J-STD-609 May 2007
IPC and JEDEC Standards and Publications are designed to serve the public interest through
eliminating misunderstandings between manufacturers and purchasers, facilitating interchange-
ability and improvement of products, and assisting the purchaser in selecting and obtaining
with minimum delay the proper product for his particular need. Existence of such Standards
and Publications shall not in any respect preclude any member or nonmember of IPC or
JEDEC from manufacturing or selling products not conforming to such Standards and
Publications, nor shall the existence of such Standards and Publications preclude their
voluntary use by those other than IPC or JEDEC members, whether the standard is to
be used either domestically or internationally.
Recommended Standards and Publications are adopted by IPC or JEDEC without regard
to whether their adoption may involve patents on articles, materials, or processes. By such
action, IPC or JEDEC do not assume any liability to any patent owner, nor do they assume
any obligation whatever to parties adopting the Recommended Standard or Publication.
Users are also wholly responsible for protecting themselves against all claims of liabilities
for patent infringement. The material in this joint standard was developed by the Marking,
Symbols and Labels for Identification of Assemblies, Components and Devices Task Group
(4-34b) of the Materials Identification Subcommittee (4-34).
For Technical Information Contact:
JEDEC IPC
Solid State Technology Association 3000 Lakeside Drive, Suite 309S
2500 Wilson Boulevard Bannockburn, Illinois
Arlington, VA 22201-3834 60015-1249
Phone (703) 907-7560 Tel 847 615.7100
Fax (703) 907-7501 Fax 847 615.7105
©Copyright 2007 The Electronic Industries Alliance, Arlington, Virginia, and the IPC, Bannockburn, Illinois. All rights reserved under both
international and Pan-American copyright conventions. Any copying, scanning or other reproduction of these materials without the prior
written consent of the copyright holder is strictly prohibited and constitutes infringement under the Copyright Law of the United States.
iv

---------------------- Page: 7 ----------------------
Copyright © 2007, IPC/JEDEC; 2008, IEC
IPC/JEDEC J-STD-609 May 2007
IPC/JEDEC FOREWORD
Directive 2002/95/EC of the European Parliament and of the Council on the restriction of the use of certain hazardous sub-
1
stances in electrical and electronic equipment, commonly referred to as the ‘‘RoHS Directive ’’, and other legislation are
nd
driving the electronics industry towards the use of lead free (Pb-free) solders and components with Pb-free 2 level inter-
connect terminal finishes and materials.
There are different Pb-free solders being used for the various soldering operations in electronics. Each of these solders may
require different processing temperatures for assembly, rework, and repair. Some means of communicating the identity of
the Pb-free or Pb-containing solder must be provided so that those performing assembly, rework and repair are aware of the
temperature capabilities and limitations of these solders, and are able to distinguish between Pb-free and Pb-containing sol-
ders.
Marking of components and/or labeling their shipping containers are needed to identify and distinguish Pb-containing and
nd
Pb-free 2 level interconnect terminal finishes and materials. Labeling electronic assemblies using Pb-free solder materials
will facilitate end-of-life recycling of electronic equipment. This standard sets forth minimum requirements and includes
options for the provision of additional information.
This paradigm shift to Pb-free electronics has created a need for identification of traditional Pb-containing coatings, finishes
and solders. This standard can be utilized to identify the presence of lead (Pb) for those markets as described in Clauses 5
(Marking/Labeling Categories) and 8 (Marking and/or Labeling of Pb-Containing Components, PCBs, and PCB Assem-
blies). This standard supersedes JESD97 and IPC-1066.
1. The RoHS Directive itself is not a law; rather, it is a direction to the European Union Member States to implement their own laws embodying the requirements
of the Directive. These laws were required to be in effect as of July 1, 2006.
v

---------------------- Page: 8 ----------------------
Copyright © 2007, IPC/JEDEC; 2008, IEC
IPC/JEDEC J-STD-609 May 2007
This Page Intentionally Left Blank
vi

---------------------- Page: 9 ----------------------
Copyright © 2007, IPC/JEDEC; 2008, IEC
PAS 62588 © IEC:2008(E)
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
Marking and Labeling of Components, PCBs and PCBAs
to Identify Lead(Pb), Pb-Free and Other Attributes
FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all
national electrotechnical committees (IEC National Committees). The object of IEC is to promote international co-
operation on all questions concerning standardization in the electrical and electronic fields. To this end and in
addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports,
Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC Publication(s)”). Their preparation
is entrusted to technical committees; any IEC National Committee interested in the subject dealt with may
participate in this preparatory work. International, governmental and non-governmental organizations liaising with
the IEC also participate in this preparation. IEC collaborates closely with the International Organization for
Standardization (ISO) in accordance with conditions determined by agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all interested
IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence between
any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter.
5) IEC provides no marking procedure to indicate its approval and cannot be rendered responsible for any equipment
declared to be in conformity with an IEC Publication.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and expenses
arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent
rights. IEC shall not be held responsible for identifying any or all such patent rights.
A PAS is a technical specification not fulfilling the requirements for a standard but made available
to the public.
IEC-PAS 62588 was submitted by IPC/JEDEC and has been processed by IEC technical
committee 91: Electronics assembly technology.
The text of this PAS is based on the This PAS was approved for
following document: publication by the P-members of the
committee concerned as indicated in
the following document
Draft PAS Report on voting
91/767/PAS 91/783/RVD
Following publication of this PAS, the technical committee or subcommittee concerned will
investigate the possibility of transforming the PAS into an International Standard.
An IEC-PAS licence of copyright and assignment of copyright has been signed by the IEC and
IPC/JEDEC and is recorded at the Central Office.
This PAS shall remain valid for an initial maximum period of 3 years starting from the publication
date. The validity may be extended for a single 3-year period, following which it shall be revised
to become another type of normative document, or shall be withdrawn.
vii

---------------------- Page: 10 ----------------------
Copyright © 2007, IPC/JEDEC; 2008, IEC
IPC/JEDEC J-STD-609 May 2007
This Page Intentionally Left Blank
viii

---------------------- Page: 11 ----------------------
Copyright © 2007, IPC/JEDEC; 2008, IEC
May 2007 IPC/JEDEC J-STD-609
Marking and Labeling of Components, PCBs and
PCBAs to Identify Lead (Pb), Pb-Free and Other Attributes
1 SCOPE 2 REFERENCE DOCUMENTS
This document applies to components and assemblies that
1
2.1 IPC
contain Pb-free and Pb-containing solders and finishes.
This document describes the marking of components and the
IPC-T-50 Terms and Definitions for Interconnecting and
nd
labeling of their shipping containers to identify their 2
Packaging Electronic Circuits
level terminal finish or material, and applies to components
IPC-CC-830 Qualification and Performance of Electrical
that are intended to be attached to boards or assemblies
Insulating Compound for Printed Wiring Assemblies (Con-
with solder or mechanical clamping or are press fit. This
formal Coating)
document also applies to 2nd level terminal materials for
bumped die that are used for direct board attach.
IPC-4101 Specification for Base Materials for Rigid and
Multilayer Printed Boards
This document applies to boards/assemblies, to identify the
type of Pb-free or Pb-containing solder used. This document
2
2.2 JEDEC
documents a method for identifying board surface finishes
and Printed Circuit Board (PCB) resin systems. This docu-
JESD88 JEDEC Dictionary of Terms for Solid State Tech-
ment applies to PCB base materials and for marking the
nology
type of conformal coating utilized on Printed Circuit Board
Assemblies (PCBAs). Material and their containers previ-
3
2.3 IEC
ously marked or labeled according to JESD 97 or IPC-1066
need not be remarked unless agreed upon by the supplier IEC 61249-2-21 Materials for printed boards and other
and customer. interconnecting structures - Part 2-21: Reinforced base
materials, clad and unclad- Nonhalogenated epoxide
Labeling of exterior surfaces of finished articles, such as
woven E-glass reinforced laminated sheets of defined flam-
computers, printers, servers, and the like, is outside the
mability (vertical burning test), copper-clad.
scope of this document. However internal PCBs and PCBAs
4
are covered by this document. Labeling of retail packages
2.4 European Parliament
containing electronic products is also outside the scope of
Directive 2002/95/EC of the European Parliament and of
this document.
the Council on the Restriction of the Use of Certain Haz-
ardous Substances in Electrical and Electronic Equipment.
1.1 Purpose This document providesa marking and label-
5
2.5 ANSI
ing system that aids in assembly, rework, repair and recy-
cling and provides for t
...