EN 61192-2:2003

STANDARDWorkmanship requirements for soldered electronic assemblies - Part 2: Surface-mount assemblies©
Standard je založil in izdal Slovenski inštitut za standardizacijo. Razmnoževanje ali kopiranje celote ali delov tega dokumenta ni dovoljenoReferenčna številkaSIST EN 61192-2:2003(en)ICS31.190

EUROPEAN STANDARD
EN 61192-2 NORME EUROPÉENNE EUROPÄISCHE NORM
April 2003 CENELEC European Committee for Electrotechnical Standardization Comité Européen de Normalisation Electrotechnique Europäisches Komitee für Elektrotechnische Normung
Central Secretariat: rue de Stassart 35, B - 1050 Brussels
© 2003 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members.
Ref. No. EN 61192-2:2003 E
ICS 31.190
English version
Workmanship requirements for soldered electronic assemblies Part 2: Surface-mount assemblies (IEC 61192-2:2003)
Exigences relatives à la qualité d'exécution des assemblages électroniques brasés Partie 2: Assemblage par montage
en surface (CEI 61192-2:2003)
Anforderungen an die Ausführungsqualität von Lötbaugruppen Teil 2: Baugruppen
in Oberflächenmontage (IEC 61192-2:2003)
This European Standard was approved by CENELEC on 2003-04-01. CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the Central Secretariat or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified to the Central Secretariat has the same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Czech Republic, Denmark, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Luxembourg, Malta, Netherlands, Norway, Portugal, Slovakia, Spain, Sweden, Switzerland and United Kingdom.

The text of document 91/357/FDIS, future edition 1 of IEC 61192-2, prepared by IEC TC 91, Electronics assembly technology, was submitted to the IEC-CENELEC parallel vote and was approved by CENELEC as EN 61192-2 on 2003-04-01.
The following dates were fixed:
– latest date by which the EN has to be implemented
at national level by publication of an identical
national standard or by endorsement
(dop) 2004-01-01
– latest date by which the national standards conflicting
with the EN have to be withdrawn
(dow) 2006-04-01
This standard should be used in conjunction with the following parts of EN 61192, under the general title Workmanship requirements for soldered electronic assemblies: Part 1: General Part 2: Surface-mount assemblies Part 4: Terminal assemblies
Annexes designated "normative" are part of the body of the standard.
In this standard, annexes A and ZA are normative. Annex ZA has been added by CENELEC. __________
Endorsement notice
The text of the International Standard IEC 61192-2:2003 was approved by CENELEC as a European Standard without any modification. __________

- 3 - EN 61192-2:2003
Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications This European Standard incorporates by dated or undated reference, provisions from other publications. These normative references are cited at the appropriate places in the text and the publications are listed hereafter. For dated references, subsequent amendments to or revisions of any of these publications apply to this European Standard only when incorporated in it by amendment or revision. For undated references the latest edition of the publication referred to applies (including amendments). NOTE When an international publication has been modified by common modifications, indicated by (mod), the relevant EN/HD applies. Publication Year Title EN/HD Year IEC 60194 - 1) Printed board design, manufacture and assembly - Terms and definitions
- - IEC 61191-1 - 1) Printed board assemblies Part 1: Generic specification - Requirements for soldered electrical and electronic assemblies using surface mount and related assembly technologies
EN 61191-1 1998 2) IEC 61191-2 - 1) Part 2: Sectional specification - Requirements for surface mount soldered assemblies
EN 61191-2 1998 2) IEC 61191-3 - 1) Part 3: Sectional specification - Requirements for through-hole mount soldered assemblies
EN 61191-3 1998 2) IEC 61191-4 - 1) Part 4: Sectional specification - Requirements for terminal soldered assemblies
EN 61191-4 1998 2) IEC 61192-1 - 1) Workmanship requirements for soldered electronic assemblies Part 1: General
EN 61192-1 2003 2) IEC 61192-3 - 1) Part 3: Through-hole mount assemblies EN 61192-3 2003 2) IEC 61192-4 - 1) Part 4: Terminal assemblies
EN 61192-4 2003 2) IEC 61193-1 - 1) Quality assessment systems Part 1: Registration and analysis of defects on printed board assemblies
EN 61193-1 2002 2)
1) Undated reference.
2) Valid edition at date of issuie.

EN ISO 9001 2000 2) ISO 9002 - 1) Quality systems - Model for quality assurance in production, installation and servicing
EN ISO 9002 1994 2)
CEIIEC61192-2Exigences relatives à la qualité d'exécutiondes assemblages électroniques brasés –Partie 2:Assemblage par montage en surfaceWorkmanship requirementsfor soldered electronic assemblies –Part 2:Surface-mount assembliesPour prix, voir catalogue en vigueurFor price, see current catalogue©"( )⎯"(*+,-.+,)Aucune partie de cette publication ne peut être reproduite niutilisée sous quelque forme que ce soit et par aucun procédé,électronique ou mécanique, y compris la photocopie et lesmicrofilms, sans l'accord écrit de l'éditeur.No part of this publication may be reproduced or utilized in anyform or by any means, electronic or mechanical, includingphotocopying and microfilm, without permission in writing fromthe publisher.--.
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61192-2 © IEC:2003– 3 –CONTENTSFOREWORD.11INTRODUCTION.151Scope.172Normative references.173Terms and definitions.194General requirements.194.1Classification.194.2Conflict.194.3Interpretation of requirements.214.4Antistatic precautions.215Component preparation processes.216Solder paste deposition process qualification.216.1Solder paste characteristics.216.2Assessment of the process.216.3Solder paste deposition – Screen and stencil printing methods –Process control limits.237Non-conductive adhesive deposition process.277.1Pot life.277.2Inter-stage storage and handling.277.3Adhesive tackiness.297.4Assessment of the adhesive attachment process.297.5Adhesive deposition – Syringe dispensing method – Small components –Process control limits.298Temporary masking processes.359Component placement processes.359.1Assessment of the process.359.2Discrete components with gull-wing leads.399.3IC components with flat-ribbon, L- or gull-wing leads on two sides.459.4IC components with flat-ribbon, L- or gull-wing leads on four sides, forexample, quad flat packs.519.5Components with round or flattened (coined) leads.579.6IC component packages with J-leads on two and four sides, for example,SOJ, PLCC.599.7Leadless rectangular components with metallized terminations.659.8Components with cylindrical endcap terminations.719.9Bottom-only terminations on leadless components.759.10Leadless chip carriers with castellated terminations.799.11Components with butt leads.839.12Components with inward L-shaped ribbon leads.899.13Flat-lug leads on power dissipating components.91

61192-2 © IEC:2003– 5 –10Post-placement rework.9310.1Rework of components placed on solder paste.9510.2Rework of components placed on non-conductive adhesive.9511Adhesive curing.9512Soldering processes.9713Cleaning processes.9914Hand placement and hand soldering, including hand rework/repair.9915Electrical test.99Annex A (normative).101A.1Introduction.101A.2Example solder fillets and alignment:flat-ribbon, L- and gull-wing leads.101A.3Example solder fillets and alignment:round or flattened (coined) leads.105A.4Example solder fillets and alignment:J-leads.107A.5Example solder fillets and alignment:rectangular or square end leadless components.109A.6Example solder fillets and alignment:cylindrical end cap terminations, for example, MELFs.111A.7Example solder fillets and alignment:bottom-only terminations on leadless components.115A.8Example solder fillets and alignment:leadless chip carriers with castellated terminations.119A.9Example solder fillets and alignment:butt joints.123A.10Example solder fillets and alignment:inward L-shaped flat ribbon leads.125A.11Example solder fillets and alignment:flat-lug leads on power dissipating components.127Figure 1 – Solder paste contour and cross-section – Target.23Figure 2 – Solder paste contour and cross-section – Acceptable.25Figure 3 – Solder paste contour and cross-section – Nonconforming.25Figure 4 – Insufficient paste quantity – Nonconforming.27Figure 5 – Smudged paste – Nonconforming.27Figure 6 – Adhesive contour and quantity – Target.31Figure 7 – Adhesive placement – Acceptable.33Figure 8 – Adhesive placement – Nonconforming.35Figure 9 – Discrete component placement – Target.39Figure 10 – Discrete component placement – Acceptable.41Figure 11 – Discrete component placement – Nonconforming.43Figure 12 – IC gull-wing component, 2 sides – Target.45Figure 13 – IC gull-wing component, 2 sides – Acceptable.47Figure 14 – IC gull-wing component, 2 sides – Nonconforming.49Figure 15 – IC gull-wing component, 4 sides – Target.51Figure 16 – IC gull-wing component, 4 sides – Acceptable.53

61192-2 © IEC:2003– 7 –Figure 17 – IC gull-wing component, 4 sides – Nonconforming.55Figure 18 – Flattened lead target centered on land.57Figure 19 – Flattened lead offset on land – Acceptable.57Figure 20 – Flattened lead excessively offset on land – Nonconforming.57Figure 21 – IC component, J-leads on two or four sides – Target.59Figure 22 – IC component, J-leads on two or four sides – Acceptable.61Figure 23 – IC component, J-leads on two or four sides – Nonconforming.63Figure 24 – Rectangular component with metallized terminations – Target.65Figure 25 – Rectangular component with metallized terminations – Acceptable.67Figure 26 – Rectangular component with metallized terminations – Nonconforming.69Figure 27 – Cylindrical endcap component – Target.71Figure 28 – Cylindrical endcap component – Acceptable.73Figure 29 – Cylindrical endcap component – Nonconforming.75Figure 30 – Bottom-only leadless component – Target.75Figure 31 – Bottom-only leadless component – Acceptable.77Figure 32 – Bottom-only leadless component – Nonconforming.77Figure 33 – Leadless chip carrier – Target.79Figure 34 – Leadless chip carrier – Acceptable.81Figure 35 – Leadless chip carrier – Nonconforming.81Figure 36 – Butt lead component mounting – Target.83Figure 37 – Butt-lead component mounting – Acceptable.85Figure 38 – Butt-lead component mounting – Nonconforming.87Figure 39 – Inward L-shaped ribbon leaded component – Target.89Figure 40 – Inward L-shaped ribbon leaded component – Acceptable.89Figure 41 – Inward L-shaped ribbon leaded component – Nonconforming.91Figure 42 – Flat-lug component – Target.91Figure 43 – Flat-lug component – Acceptable.93Figure 44 – Flat-lug component – Nonconforming.93Figure A.1 – Target solder fillet,
levels A, B, C.101Figure A.2 – Target alignment,
levels A, B, C.101Figure A.3 – Solder fillet, level B.103Figure A.4 – Alignment, level B.103Figure A.5 – Target solder fillet,
levels A, B, C.105Figure A.6 – Target alignment,
levels A, B, C.105Figure A.7 – Solder fillet, level B.105Figure A.8 – Alignment, level B.105Figure A.9 – Target solder fillet,
levels A, B, C.107Figure A.10 – Target alignment,
levels A, B, C.107Figure A.11 – Solder fillet, level B.107Figure A.12 – Alignment, level B.107Figure A.13 – Target solder fillet,
levels A, B, C.109Figure A.14 – Target alignment,
levels A, B, C.109

61192-2 © IEC:2003– 9 –Figure A.15 – Solder fillet, level B.109Figure A.16 – Alignment, level B.109Figure A.17 – Target solder fillet,
levels A, B, C.111Figure A.18 – Target alignment,
levels A, B, C.111Figure A.19 – Solder fillet, level B.113Figure A.20 – Alignment, level B.113Figure A.21 – Target solder fillet,
levels A, B, C.115Figure A.22 – Target alignment,
levels A, B, C.115Figure A.23 – Solder fillet, level B.117Figure A.24 – Alignment, level B.117Figure A.25 – Target solder fillet,
levels A, B, C.119Figure A.26 – Target alignment,
levels A, B, C.119Figure A.27 – Solder fillet, level B.121Figure A.28 – Alignment, level B.121Figure A.29 – Target solder fillet,
levels A, B, C.123Figure A.30 – Target alignment,
levels A, B, C.123Figure A.31 – Solder fillet, level B.123Figure A.32 – Alignment, level B.123Figure A.33 – Target solder fillet,
levels A, B, C.125Figure A.34 – Target alignment,
levels A, B, C.125Figure A.35 – Solder fillet, level B.125Figure A.36 – Alignment, level B.125Figure A.37 – Target solder fillet,
levels A, B, C.127Figure A.38 – Target alignment,
levels A, B, C.127Figure A.39 – Solder fillet, level B.127Figure A.40 – Alignment, level B.127

61192-2 © IEC:2003– 11 –INTERNATIONAL ELECTROTECHNICAL COMMISSION____________WORKMANSHIP REQUIREMENTSFOR SOLDERED ELECTRONIC ASSEMBLIES –Part 2: Surface-mount assembliesFOREWORD1)The IEC (International Electrotechnical Commission) is a worldwide organization for standardization comprisingall national electrotechnical committees (IEC National Committees). The object of the IEC is to promoteinternational co-operation on all questions concerning standardization in the electrical and electronic fields. Tothis end and in addition to other activities, the IEC publishes International Standards. Their preparation isentrusted to technical committees; any IEC National Committee interested in the subject dealt with mayparticipate in this preparatory work. International, governmental and non-governmental organizations liaisingwith the IEC also participate in this preparation. The IEC collaborates closely with the International Organizationfor Standardization (ISO) in accordance with conditions determined by agreement between the twoorganizations.2)The formal decisions or agreements of the IEC on technical matters express, as nearly as possible, aninternational consensus of opinion on the relevant subjects since each technical committee has representationfrom all interested National Committees.3)The documents produced have the form of recommendations for international use and are published in the formof standards, technical specifications, technical reports or guides and they are accepted by the NationalCommittees in that sense.4)
In order to promote international unification, IEC National Committees undertake to apply IEC InternationalStandards transparently to the maximum extent possible in their national and regional standards. Anydivergence between the IEC Standard and the corresponding national or regional standard shall be clearlyindicated in the latter.5)
The IEC provides no marking procedure to indicate its approval and cannot be rendered responsible for anyequipment declared to be in conformity with one of its standards.6)
Attention is drawn to the possibility that some of the elements of this International Standard may be the subjectof patent rights. The IEC shall not be held responsible for identifying any or all such patent rights.International Standard IEC 61192-2 has been prepared by IEC technical committee 91:Electronics assembly technology.The text of this standard is based on the following documents:FDISReport on voting91/357/FDIS91/371/RVDFull information on the voting for the approval of this standard can be found in the report onvoting indicated in the above table.This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.This standard should be used in conjunction with the following parts of IEC 61192, under thegeneral title Workmanship requirements for soldered electronic assemblies:Part 1:GeneralPart 3:Through-hole mount assembliesPart 4:Terminal assemblies

61192-2 © IEC:2003– 13 –The committee has decided that the contents of this publication will remain unchanged until 2008.At this date, the publication will be•reconfirmed;•withdrawn;•replaced by a revised edition, or•amended.

61192-2 © IEC:2003– 15 –INTRODUCTIONThis part of IEC 61192, combined with IEC 61192-1, is used to meet the end-productrequirements defined in IEC 61191-1 and IEC 61191-2.This standard may be used to enable the suppliers and users of surface-mount electronicassemblies to specify good manufacturing practices as part of a contract.The respective requirements for through-hole assemblies, terminal attachment and themounting of bare semiconductor die and carrier-mounted die, are included in separate butrelated standards.

61192-2 © IEC:2003– 17 –WORKMANSHIP REQUIREMENTSFOR SOLDERED ELECTRONIC ASSEMBLIES –Part 2: Surface-mount assemblies1 ScopeThis part of IEC 61192 specifies requirements for workmanship in soldered surface-mountedelectronic assemblies and multichip modules on organic substrates, on printed boards, and onsimilar laminates attached to the surface(s) of inorganic substrates.It applies to assemblies that are totally surface-mounted and to the surface-mount portions ofassemblies that include other related assembly technologies, for example, through-holemounting. It does not include metal or ceramic-based hybrid circuits in which the conductormetallization is deposited directly on a ceramic substrate or onto a ceramic-coated metalsubstrate.2 Normative referencesThe following referenced documents are indispensable for the application of this document. Fordated references, only the edition cited applies. For undated references, the latest edition ofthe referenced document (including any amendments) applies.IEC 60194, Printed board design, manufacture and assembly – Terms and definitionsIEC 61191-1, Printed board assemblies – Part 1:Generic specification – Requirements forsoldered electrical and electronic assemblies using surface mount and related assemblytechnologiesIEC 61191-2, Printed board assemblies – Part 2: Sectional specification – Requirements forsurface mount soldered assembliesIEC 61191-3, Printed board assemblies – Part 3: Sectional specification – Requirements forthrough-hole mount soldered assembliesIEC 61191-4, Printed board assemblies – Part 4: Sectional specification – Requirements forterminal soldered assembliesIEC 61192-1, Workmanship requirements for soldered electronic assemblies – Part 1: GeneralIEC 61192-3, Workmanship requirements for soldered electronic assemblies – Part 3: Through-hole mount assembliesIEC 61192-4, Workmanship requirements for soldered electronic assemblies – Part 4: TerminalassembliesIEC 61193-1: Quality assessment systems – Part 1: Registration and analysis of defects onprinted board assembliesISO 9001, Quality management systems – RequirementsISO 9002, Quality systems – Model for quality assurance in production, installation andservicing

61192-2 © IEC:2003– 19 –3 Terms and definitionsFor the purposes of this part of IEC 61192, the definitions of IEC 60194 apply.4 General requirementsThe requirements of IEC 61192-1 are mandatory for this standard.4.1 ClassificationThe classification of assemblies is divided into three levels, that is levels A, B, and C.Definitions of the classification categories and the status of product for each level are given inIEC 61192-1. In general, status is divided into three workmanship conditions as follows:a)target;b)acceptable;c)nonconforming.4.2 ConflictUnless the user specifies compliance with all of the requirements (or with specific items) in thisstandard, for example, as part of a supply contract, the mandatory clauses and subclausesherein may be interpreted as guidance.When the user elects to specify compliance with all or some of the mandatory requirements ofthis standard:a)In the event of conflict between the requirements of this standard and the applicabledocuments cited herein, refer to IEC 61191-1 for the relevant priorities and to IEC 61191-2and IEC 61192-1 for technical requirements. However, nothing in this standard supersedesapplicable laws and regulations.b)In the event of conflict between the requirements of this standard and the applicable userassembly drawing(s) and specifications, the latter shall govern.When the conflict is between the requirements of this document and drawing(s) or specifi-cation(s) that have not been approved by the user, the latter shall be submitted to the userfor approval. Upon such approval, the acceptance (or changes) shall be documented,for example, by official revision note or equivalent on the drawing(s) or specification(s)which shall then govern.c)Where the applicable user documentation requirements are less stringent than the appli-cable mandatory items in IEC 61191-1, IEC 61191-2, or in this standard, neither thesupplier nor the user shall claim compliance with this or any of the standards listed in thisclause, without identifying the specific clauses and related relaxations in each and everysuch claim.

61192-2 © IEC:2003– 21 –4.3 Interpretation of requirementsUnless otherwise specified by the user, the word "shall", signifies that the requirement ismandatory. Deviation from any "shall" requirement requires written acceptance by the user, forexample, via assembly drawing, specification or contract provision.The words "should" and "may" reflect recommendations and guidance, respectively, and areused whenever it is intended to express non-mandatory provisions.4.4 Antistatic precautionsAll operators using workstations and assembly or cleaning equipment and carrying out inter-process handling shall strictly observe antistatic precautions at all times. Refer to 4.2.6 and 5.7of IEC 61192-1.5 Component preparation processesComponent preparation processes shall be carried out in accordance with the requirements ofIEC 61192-1 using the methods described therein.6 Solder paste deposition process qualificationSolder paste deposition processes are described in IEC 61192-1 and workmanship shouldenable the requirements stated therein to be met.6.1 Solder paste characteristicsSolder paste is required to maintain a level of tackiness to ensure good physical contact withcomponent leads or terminations and to prevent placed components from slipping or beingaccidentally dislodged from the paste mound(s) during board handling or mechanized transitinto the soldering equipment. The length of time over which the paste retains adequatetackiness is specified by the supplier and all placement operations should be carried out wellwithin this stated limit.NOTE
Where pastes designed to allow extended times between their deposition and component placement areused, for example, longer than 2 h, care should be taken to ensure that the required longer pre-heat time andtemperature in reflow mass soldering are programmed. In some cases this may require physical extension of thepre-heat zones on standard reflow soldering machines.6.2 Assessment of the processThe parameters requiring inspection are the amount, shape and position of the solder paste onthe land patterns of the board or substrate. These are assessed using visual inspection, laserscan, or X-ray as appropriate.The deposited area and mean height are used to monitor the quantity of paste deposited andact as an indicator of its viscosity and the board surface condition. The wetted area is alsoused to monitor screen/stencil or syringe tip condition and the incidence of unwanted smudges.Positional measurement assesses the accuracy of deposition and monitors machine set-upand, if applicable, screen/stencil design.

61192-2 © IEC:2003– 23 –The standard PPM baseline for solder paste deposition operations is the number of pastemound deposits attempted. Guideline assessment attributes and the method of calculatingPPM are given in IEC 61193-1.Target, accept and reject (nonconforming) criteria for solder paste deposition are given asprocess control limits in 6.3. These are the same for levels A, B and C.6.3 Solder paste deposition – Screen and stencil printing methods –Process control limitsIn all cases, the accept and reject criteria shown in Figures 1 through 3 refer to the solderpaste printing operation.Target – Levels A, B, C1Paste contour sits central within land area.2Paste cross-section is mesa-shaped.3Designed quantity is achieved.Cross-sectionFigure 1 – Solder paste contour and cross-section – TargetIEC
574/03
61192-2 © IEC:2003– 25 –Acceptable – Levels A, B, C1Paste contour slumped.2Overhang A is less than 25 % of therelated X or Y dimension, or 0,2 mm,whichever is smaller.3Paste volume ±20 % of designed quantity.AYXFigure 2 – Solder paste contour and cross-section – AcceptableNonconforming – Levels A, B, C1Paste quantity and/or overhang A exceedsacceptable limits.2Paste overhang A is more than 25 % ofrelated x or y dimension or 0,2 mm which-ever is smaller.3Paste quantity is more than 120 % or lessthan 80 % of designed quantity.AFigure 3 – Solder paste contour and cross-section – NonconformingIEC
575/03IEC
576/03
61192-2 © IEC:2003– 27 –ABPartial coverageNonconforming – Levels A, B, CPaste quantity below acceptable limits.Height B less than 80 % of stencil thickness.Figure 4 – Insufficient paste quantity – NonconformingNonconforming – Levels A, B, CSmudging/smearing of solder paste.Figure 5 – Smudged paste – Nonconforming7 Non-conductive adhesive deposition processAdhesive deposition workmanship is described in IEC 61192-1, Clause 9 and shall be carriedout in accordance with the requirements stated therein.7.1 Pot lifeThe time elapsed between the first exposure of the adhesive to the ambient factoryatmosphere and the start of curing should be well within the suppliers' stated maximum.7.2 Inter-stage storage and handlingBoards that have received deposited adhesive and require brief inter-stage storage should behandled with care to avoid component movement. Some adhesive materials cause dermatitis.Boards stored temporarily should be kept separate and in clean, dry conditions, or as specifiedby the adhesive manufacturer.IEC
577/03IEC
578/03
61192-2 © IEC:2003– 29 –7.3 Adhesive tackinessAdhesive is required to maintain a level of tackiness to assure good contact with placedcomponents prior to curing. The length of time over which the adhesive retains adequatetackiness (the 'pot life') is specified by the supplier and all placement operations should becarried out well within this stated limit. Handling should avoid the risk of component movement.7.4 Assessment of the adhesive attachment processAssessment of the adhesive deposition process in production can be by manual or automaticvisual inspection for positional and deposited area aspects; optical non-contact methods orlaser scan for adhesive dot height.The deposited area and mean height are used to monitor the quantity of adhesive depositedand act as an indicator of its viscosity and the board surface condition. The wetted area is alsoused to monitor screen/stencil or syringe tip condition and the incidence of unwanted smudges.Positional measurement assesses the accuracy of deposition and monitors machine set-upand, if applicable, screen/stencil design.Adhesive dot height, shape and volume are key parameters because if the underside of thecomponent does not make contact with the dot, adhesion will not occur. A suitable way ofassessing the correctness of adhesive quantity is to pull off a component after curing. Refer toitem d) of Clause 11.When adhesive deposition equipment uses an optical view of the deposited area of theadhesive dot to monitor its height, the deposition head and any associated time-pressure pulsesystem should be kept at a constant temperature. The wetted area on the component may bedetermined by examining the underside after placement and curing using a cross-sectionmethod.The standard PPM baseline for adhesive deposition operations is the number of adhesive dotdeposits attempted. Guideline assessment attributes and the method of calculation are given inIEC 61193-1.Target, accept and reject (nonconforming) criteria for small components are given as processcontrol limits in 7.5. These are the same for all levels.7.5 Adhesive deposition – Syringe dispensing method – Small components –Process control limitsIn all cases, accept and reject refer to the dispensing operation.

61192-2 © IEC:2003– 31 –Target – Levels A, B, C1Adhesive contour central within designedarea.2Adhesive quantity correct.3Cross-section not slumped or tailed.NOTE
When UV curing, design may requireadhesive to appear outside component contour.Figure 6 – Adhesive contour and quantity – TargetIEC
579/03
61192-2 © IEC:2003– 33 –Acceptable – Levels A, B, C1Adhesive placement eccentric.2Dot touches but does not overlap land orcomponent metallization.Figure 7 – Adhesive placement – AcceptableIEC
580/03
61192-2 © IEC:2003– 35 –Nonconforming – Levels A, B, C1Adhesive dot overlaps land.2Adhesive overlaps component metallization.3Adhesive reduces solder joint wettingability below specified limits.Figure 8 – Adhesive placement – Nonconforming8 Temporary masking processesPrinted board temporary masking processes shall be carried out in accordance with therequirements of IEC 61192-1.9 Component placement processesSurface-mount component placement processes are described in IEC 61192-1 and shall becarried out in accordance with the requirements stated therein.9.1 Assessment of the processThe following visual attributes apply to the component placement process, using manual orautomatic inspection:a)the presence or absence of components;b)the location correctness of component types and correctness of their relevant parametricvalue(s);c)the relative x, y and rotational alignment of component terminations and leads withmatching conductor footprint pads;IEC
581/03
61192-2 © IEC:2003– 37 –d)the orientation of components for example, pin 1 on ICs, polarity of electrolytic capacitorsand diodes;e)the z axis condition of components for example, cant (non-parallelism), component onedge;f)physical damage to components, for example, cracked or chipped component bodies,distorted leads;g)unwanted movement or excessive deformation of deposited solder paste or adhesive;h)location of adhesive after placement, for example, squeeze-out, spread.NOTE 1
In no case should the deviation in placement accuracy exceed the product requirement. Refer toIEC 61191-2. Reliance on surface tension effects to correct placement errors should not be assumed.NOTE 2
Correction of placement ‘process indicator’ errors within the prescribed post-soldering alignment accuracytolerance limits is optional but not recommended.The standard PPM baseline for surface-mounted component placement operations is thenumber of placements attempted. Guideline assessment attributes and details of the method ofcalculation are given in IEC 61193-1.Target, accept and reject (nonconforming) criteria for placement of surface-mountedcomponents are given as process control limits in 9.2 through 9.13. In each case, the limits aregiven separately for levels A, B and C.

61192-2 © IEC:2003– 39 –9.2 Discrete components with gull-wing leadsDiscrete components with gull-wing leads are usually transistor or IC components, for example,SOT 23. Components may be shifted in X or Y or rotation direction. The accept and rejectcriteria relate to placement accuracy.Target – Levels A, B, C1All lead feet, including heel regions andtoes, sit centrally on lands.2Component body not rotated.Figure 9 – Discrete component placement – TargetIEC
582/03
61192-2 © IEC:2003– 41 –Acceptable – Level A1All lead heels within the land.2No lead side overhang exceeds ½ W or0,5 mm, whichever is less.Acceptable – Level B1All lead heels within the land.2No lead side overhang exceeds ½ W or0,5 mm, whichever is less.Acceptable – Level C1All lead heels within the land.2No lead side overhang exceeds ¼ W or0,5 mm, whichever is less.3No lead toe overhang.WFigure 10 – Discrete component placement – AcceptableIEC
583/03
61192-2 © IEC:2003– 43 –Nonconforming – Level A1Any lead heel overhangs land.2Any lead side overhang exceeds ½ W or0,5mm, whichever is less.Nonconforming – Level B1Any lead heel overhangs land.2Any lead side overhang exceeds ½ W or0,5mm, whichever is less.Nonconforming – Level C1Any lead heel overhangs land.2Any lead side overhang exceeds ¼ W or0,5mm, which is less.3Any lead toe overhangs land.WFigure 11 – Discrete component placement – NonconformingIEC
584/03
61192-2 © IEC:2003– 45 –9.3 IC components with flat-ribbon, L- or gull-wing leads on two sidesIC components with flat-ribbon, L- or gull-wing leads on two sides are usually small outline(SO) packages. Components may be shifted in X or Y or rotation direction. The accept andreject criteria relate to placement accuracy.Target – Levels A, B, C1All lead feet, including heel regions andtoes, sit centrally on lands.2Component body not rotated.YXFigure 12 – IC gull-wing component, 2 sides – TargetIEC
585/03
61192-2 © IEC:2003– 47 –Acceptable – Level A1X-direction: no lead foot side overhang Aexceeds ½ Wa or 0,5 mm, whichever isless.2Y-direction: no lead toe overhang exceeds½W.3All lead heels within lands.Acceptable – Level B1X-direction: no lead foot side overhang Aexceeds ½ Wa or 0,5 mm, whichever isless.2Y-direction: all lead toes and heels withinlands.Acceptable – Level C1X-direction: no lead foot side overhang Aexceeds ¼ W or 0,5 mm, whichever isless.2Y-direction: all lead toes and heels withinlands.aW when lead pitch is 0,5 mm or less.AWYXFigure 13 – IC gull-wing component, 2 sides – AcceptableIEC
586/03
61192-2 © IEC:2003– 49 –Nonconforming – Level A1X-direction: any lead foot side overhang Aexceeds ½ Wa or 0,5 mm, whichever isless.2Y-direction: any lead toe overhang exceeds½W, or any lead heel overhanging land.Nonconforming – Level B1X-direction: any lead foot side overhang Aexceeds ½ Waor 0,5 mm whichever is less.2Y-direction: any lead toe or heel over-hanging land.Nonconforming – Level C1X-direction: any lead foot side overhang Aexceeds ¼ W or 0,5 mm, whichever is less.2Y-direction: any lead toe or heel over-hanging land.NOTE
When the land width P is narrower thanthe component lead width W, the land edgeshall not protrude outside the lead edge inY-direction by more than ¼ P or 0,1 mm,whichever is greater. See notes 1 and 2 in 9.1.aW when lead pitch is 0,5 mm or less.APWYXFigure 14 – IC gull-wing component, 2 sides – NonconformingIEC
587/03
61192-2 © IEC:2003– 51 –9.4 IC components with flat-ribbon, L- or gull-wing leads on four sides,for example, quad flat packsComponents may be shifted in X or Y or rotation direction. The accept and reject criteria relateto placeme
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