EN 16602-70-10:2015

SLOVENSKI STANDARD
01-april-2015
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Space product assurance - Qualification of printed circuit boards
Raumfahrtproduktsicherung - Qualifizierung von Leiterplatten
Assurance produit des projets spatiaux - Qualification des circuits imprimés
Ta slovenski standard je istoveten z: EN 16602-70-10:2015
ICS:
31.180 7LVNDQDYH]MD7,9LQWLVNDQH Printed circuits and boards
SORãþH
49.140 Vesoljski sistemi in operacije Space systems and
operations
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

EUROPEAN STANDARD
EN 16602-70-10
NORME EUROPÉENNE
EUROPÄISCHE NORM
January 2015
ICS 31.180; 49.140
English version
Space product assurance - Qualification of printed circuit boards
Assurance produit des projets spatiaux - Qualification des Raumfahrtproduktsicherung - Qualifizierung von
circuits imprimés Leiterplatten
This European Standard was approved by CEN on 11 October 2014.

CEN and CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving
this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical references concerning
such national standards may be obtained on application to the CEN-CENELEC Management Centre or to any CEN and CENELEC
member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CEN and CENELEC member into its own language and notified to the CEN-CENELEC Management Centre
has the same status as the official versions.

CEN and CENELEC members are the national standards bodies and national electrotechnical committees of Austria, Belgium, Bulgaria,
Croatia, Cyprus, Czech Republic, Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greece,
Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, Netherlands, Norway, Poland, Portugal, Romania, Slovakia,
Slovenia, Spain, Sweden, Switzerland, Turkey and United Kingdom.

CEN-CENELEC Management Centre:
Avenue Marnix 17, B-1000 Brussels
© 2015 CEN/CENELEC All rights of exploitation in any form and by any means reserved Ref. No. EN 16602-70-10:2015 E
worldwide for CEN national Members and for CENELEC
Members.
Table of contents
Foreword . 7
1 Scope . 8
2 Normative references . 9
3 Terms, definitions and abbreviated terms . 11
3.1 Terms from other standards . 11
3.2 Terms specific to the present standard . 11
3.3 Abbreviated terms. 14
4 Principles . 16
4.1 General . 16
4.2 Roles . 16
4.3 Specification of test requirements . 17
5 Evaluation . 18
5.1 General . 18
5.2 Request for evaluation . 18
5.3 Evaluation PCBs . 18
5.4 Line audit . 19
6 Qualification . 20
6.1 General . 20
6.2 Qualification programme definition and approval . 20
6.3 Nonconformance criteria . 21
6.4 Qualification programme implementation . 21
6.5 Qualification PCBs . 25
6.5.1 General . 25
6.5.2 Test pattern A: Electrical test . 27
6.5.3 Test pattern B: Mechanical test . 27
6.5.4 Test pattern C: Electrical test . 28
6.5.5 Test pattern D: Electrical test and visual aspect . 28
6.5.6 Test pattern E: Electrical test . 29
6.5.7 Test pattern F: Metal-plating test . 30
6.5.8 Test pattern G: Metal-plating/coating test . 30
6.5.9 Test pattern H: Electrical test . 31
6.5.10 Test pattern J: Solderability test . 31
6.5.11 Test pattern K: Physical test . 32
6.5.12 Test pattern L: Demonstration of technological capability . 32
6.5.13 Test pattern M: CAD/CAM criteria (on request by the qualification
authority) . 33
6.5.14 Test pattern X: Resistance to bending cycles (for flexible parts only) . 34
6.5.15 Test pattern Y: Electrical test (on request by the supplier). 34
6.5.16 Test pattern W: Electrical test for high frequency circuits (on request
by the supplier) . 35
6.6 Qualification approval . 35
6.7 Maintenance of qualification . 35
7 Tests . 37
7.1 General . 37
7.2 Group 1 — Visual inspection and non-destructive test . 37
7.2.1 General . 37
7.2.2 Verification of marking . 37
7.2.3 Visual aspects . 38
7.2.4 External dimensions . 41
7.2.5 Warp . 41
7.2.6 Twist . 42
7.2.7 Subgroup 1.1 — Specific dimensional check. 42
7.2.8 Subgroup 1.2 — Electrical measurements . 44
7.3 Group 2 — Miscellaneous tests . 46
7.3.1 General . 46
7.3.2 Subgroup 2.1 — Solderability test — Wettability on test pattern J . 46
7.3.3 Subgroup 2.2 — Mechanical tests . 47
7.3.4 Subgroup 2.3 — Coatings tests. 49
7.3.5 Subgroup 2.4 — Electrical tests . 56
7.3.6 Subgroup 2.5 — Physical tests on test pattern K . 58
7.4 Group 3 — Thermal stress and thermal shock (on PCB) . 59
7.4.1 General . 59
7.4.2 Solder bath float and vapour phase reflow simulation (on board
without test pattern F) . 59
7.4.3 Rework simulation (thermal shock, hand soldering) on test pattern F . 60
7.5 Group 4 — Thermal cycling (on PCB) . 61
7.6 Group 5 — Damp heat — Steam ageing (on PCB) . 62
7.6.1 General . 62
7.6.2 Damp heat (on entire PCB excluding test pattern F) . 62
7.6.3 Steam ageing on test pattern F . 62
8 Quality assurance for manufacturing . 64
8.1 General . 64
8.2 Data . 64
8.3 Incoming inspection of raw materials . 64
8.4 Traceability . 64
8.5 Calibration . 65
8.6 Workmanship standards . 65
8.7 Inspection . 65
8.8 Operator and inspector training. 65
8.9 Quality test specimen . 65
8.10 Microsection . 66
8.11 Final inspection and tests . 66
8.12 Delivery . 66
9 Requirements for PCBs . 67
9.1 Rigid single-sided and double-sided PCBs . 67
9.2 Rigid single-sided and double-sided PCBs for high frequency application . 69
9.3 Flexible PCBs . 72
9.4 Rigid-flex PCBs . 74
9.5 Rigid multilayer PCBs . 74
9.6 Sequential rigid multilayer PCBs . 77
Annex A (normative) Evaluation test report – DRD . 80
Annex B (normative) Qualification test report – DRD . 82
Annex C (normative) PCB manufacturing/assembly process identification
document (PID) – DRD . 83
Annex D (normative) Qualification status report – DRD . 84
Annex E (informative) Example of check-list . 85
Annex F (informative) Example of plated-through hole microsection . 88
Bibliography . 89

Figures
Figure 6-1: Test sequence . 22
Figure 6-2: Example of a qualification PCB layout with patterns for testing and a pattern
for demonstration of the technological capability . 26
Figure 6-3: Example of test pattern for intralayer insulation resistance and dielectric
withstanding voltage testing . 27
Figure 6-4: Example of test pattern for testing peel strength of conductors and pull-off
strength of pads . 28
Figure 6-5: Example of test pattern for internal short circuit testing. 28
Figure 6-6: Example of test pattern for etching definition evaluation and continuity
testing . 29
Figure 6-7: Example of test pattern for interconnection resistance and current overload
testing . 29
Figure 6-8: Example of test pattern for microsectioning and metal plating evaluation . 30
Figure 6-9: Example of test pattern for plating adhesion testing and analysis of SnPb
coating composition after reflow . 30
Figure 6-10: Example of test pattern for interlayer insulation resistance and dielectric
withstanding voltage testing . 31
Figure 6-11: Example of test pattern for solder wettability and rework simulation testing . 31
Figure 6-12: Example of test pattern for water absorption and outgassing testing . 32
Figure 6-13: Example of test pattern for evaluation of the technological capability . 33
Figure 6-14: Example of test pattern for evaluation of CAD/CAM capability. 34
Figure 6-15: Example of test pattern for testing resistance to bending cycles . 34
Figure 6-16: Example of test pattern for controlled impedance testing . 34
Figure 7-1: Arbitrary defects on conductors . 40
Figure 7-2: Arbitrary defects on spacing between conductors. 40
Figure 7-3 Misalignment of cover layer (for flexible PCBs) . 41
Figure 7-4: Warp . 42
Figure 7-5: Twist. 42
Figure 7-6 Example of a presentation of measurements in tabular form . 43
Figure 7-7: Wettability of terminal pads and plated-through holes . 47
Figure 7-8: Dimensional parameters to be measured . 51
Figure 7-9: Microsection of a PTH . 53
Figure 7-10: Undercut for PCBs with fused SnPb finish . 53
Figure 7-11: Undercut for PCBs with Au/Ni or Au finish . 54
Figure 7-12: Overhang for PCBs with Au/Ni or Au finish . 54
Figure 7-13: Microsection in PTH: Possible defects . 55
Figure 7-14: Microsection of PTH: Possible defects . 55
Figure 7-15: Voids in resin inside buried vias . 56
Figure 7-16: Test for internal short circuit . 57

Figure A-1 : Example of a test report . 81
Figure E-1 : Example of Check-list for double sided and multilayer PCBs . 85
Figure F-1 : Example of plated-through hole microsection . 88

Tables
Table 6-1: Test specification . 23

Foreword
This document (EN 16602-70-10:2015) has been prepared by Technical
Committee CEN/CLC/TC 5 “Space”, the secretariat of which is held by DIN.
This standard (EN 16602-70-10:2015) originates from ECSS-Q-ST-70-10C.
This European Standard shall be given the status of a national standard, either
by publication of an identical text or by endorsement, at the latest by July 2015,
and conflicting national standards shall be withdrawn at the latest by July 2015.
Attention is drawn to the possibility that some of the elements of this document
may be the subject of patent rights. CEN [and/or CENELEC] shall not be held
responsible for identifying any or all such patent rights.
This document has been prepared under a mandate given to CEN by the
European Commission and the European Free Trade Association.
This document has been developed to cover specifically space systems and has
therefore precedence over any EN covering the same scope but with a wider
domain of applicability (e.g. : aerospace).
According to the CEN-CENELEC Internal Regulations, the national standards
organizations of the following countries are bound to implement this European
Standard: Austria, Belgium, Bulgaria, Croatia, Cyprus, Czech Republic,
Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France,
Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania,
Luxembourg, Malta, Netherlands, Norway, Poland, Portugal, Romania,
Slovakia, Slovenia, Spain, Sweden, Switzerland, Turkey and the United
Kingdom.
Scope
This Standard defines the requirements for evaluation, qualification and
maintenance of qualification of PCB manufacturers for different types of PCBs.
This Standard is applicable to the following type of PCBs:
• Rigid PCBs (single-sided, double-sided, multilayer, sequential-laminated
multilayer, metal core)
• Flexible PCB (single-sided and double-sided)
• Rigid-flex PCBs (multilayer and sequential-laminated multilayer)
• High frequency PCBs
• Special PCBs.
PCBs are used for the mounting of components in order to produce PCB
assemblies performing complex electrical functions. The PCBs are subjected to
thermal and mechanical shocks during their assembly such as mounting of
components by soldering, rework and repair under normal terrestrial
conditions, and in addition the complex PCB assembly are subjected to the
environment imposed by launch and space flights.
This standard may be tailored for the specific characteristics and constraints of a
space project in conformance with ECSS-S-ST-00.
Normative references
The following normative documents contain provisions which, through
reference in this text, constitute provisions of this ECSS Standard. For dated
references, subsequent amendments to, or revision of any of these publications
do not apply. However, parties to agreements based on this ECSS Standard are
encouraged to investigate the possibility of applying the more recent editions of
the normative documents indicated below. For undated references, the latest
edition of the publication referred to applies.

EN reference Reference in text Title
EN 16601-00-01 ECSS-S-ST-00-01 ECSS system — Glossary of terms
EN 16602-10-09 ECSS-Q-ST-10-09 Space product assurance — Nonconformance
control system
EN 16602-20 ECSS-Q-ST-20 Space product assurance — Quality assurance
EN 16602-70 ECSS-Q-ST-70 Space product assurance — Material, mechanical
parts and processes
EN 16602-70-02 ECSS-Q-ST-70-02 Space product assurance — Thermal vacuum
outgassing test for the screening of space
materials
EN 16602-70-08 ECSS-Q-ST-70-08 Space product assurance — Manual soldering of
high-reliability electrical connections
EN 16602-70-11 ECSS-Q-ST-70-11 Space product assurance — Procurement of
printed circuit boards
EN 16602-70-21 ECSS-Q-ST-70-21 Space product assurance — Flammability testing
for the screening of space materials
EN 16602-70-22 ECSS-Q-ST-70-22 Space product assurance — Control of limited
shelf-life materials
EN 16602-70-29 ECSS-Q-ST-70-29 Space product assurance — Determination of
offgassing products from materials and
assembled articles to be used in a manned space
vehicle crew compartment
IEC 60068-2-3 (1969-01) Environmental testing. Part 2: Tests. Test Ca:
Damp heat, steady state
IEC 60068-2-14-am 1 (1986- Environmental testing. Part 2: Tests. Test N:
01) Change of temperature
IEC 60068-2-20-am 2 (1987- Environmental testing. Part 2: Tests. Test T:
01) Soldering
IEC 60249-1-am 4 (1993-05) Base materials for printed circuits. Part 1: Test
methods
IEC 60326-2-am 1 (1992-06) Printed boards. Part 2: Test methods
IEC 60326-5-am 1 (1989-10) Printed boards. Part 5: Specification for single and
double sided printed boards with plated-through
holes
IEC 60326-8 (1981-01) Printed boards. Part 8: Specification for single and
double sided flexible printed boards with through
connections
IEC 60326-11 (1991-03) Printed boards. Part 11: Specification for flex-rigid
multilayer printed boards with through
connections
IEC 62326-4 (1996-12) Printed boards. Part 4: Rigid multilayer printed
boards with interlayer connections - Sectional
specification
IPC-4101 Specification for base materials for rigid and
multilayer printed boards
MIL-P-50884C Printed wiring, flexible and rigid-flex

Terms, definitions and abbreviated terms
3.1 Terms from other standards
For the purpose of this Standard, the terms and definitions from ECSS-S-ST-00-01
apply.
3.2 Terms specific to the present standard
3.2.1 associated test coupon
small piece of PCB designated to have a limited specific set of tests performed
NOTE The associated test coupon is manufactured as
part of a PCB and at the final manufacturing
stage it is separated from it. The associated test
coupon is thus associated with the PCB, with
which it was simultaneously manufactured.
3.2.2 blister
delamination in the form of a localized swelling and separation between any of
the layers of a lamination base material, or between base material and
conductive foil or protective coating
[IEC 60194 (1999-04)]
3.2.3 cover layer (flexible circuit)
layer of insulating material that is applied covering totally or partially over a
conductive pattern on the outer surfaces of a PCB
[IEC 60194 (1999-04)]
3.2.4 crazing
internal condition that occurs in reinforced base material whereby glass fibres
are separated from the resin at the weave intersections
NOTE 1 This condition manifests itself in the form of
connected white spots or crosses that are below
the surface of the base material. It is usually
related to mechanically induced stress.
NOTE 2 See also “measling”.
[IEC 60194 (1999-04)]
3.2.5 delamination
separation between plies within a base material, between base material and a
conductive foil, or any other planar separation with a PCB
NOTE See also “blister”.
[IEC 60194 (1999-04)]
3.2.6 dewetting
condition that results when molten solder coats a surface and then recedes to
leave irregularly-shaped mounds of solder that are separated by areas that are
covered with a thin film of solder and with the basis metal not exposed
[IEC 60194 (1999-04)]
3.2.7 flexible PCB
PCB either single, double sided or multilayer consisting of a printed circuit or
printed wiring using flexible base materials only
[IEC 60194 (1999-04)]
3.2.8 haloing
mechanically-induced fracturing or delamination, on or below the surface of a
base material, that is usually exhibited by a light area around holes or other
machined features
[IEC 60194 (1999-04)]
3.2.9 high frequency PCB
PCB used for high frequency applications, that has specific requirements to the
dielectric properties of the base laminates as well as special dimensional
requirements to the lay-out for electrical purposes
3.2.10 inclusions
foreign particles, metallic or non-metallic, that may be entrapped in an
insulating material, conductive layer, plating, base material or solder
connection
[IEC 60194 (1999-04)]
3.2.11 key personnel
personnel with specialist knowledge responsible for defined production or
product assurance areas
3.2.12 measling
condition that occurs in laminated base material in which internal glass fibres
are separated from the resin at the weave intersection
NOTE 1 This condition manifests itself in the form of
discrete white spots or “crosses” that are below
the surface of the base material. It is usually
related to thermally-induced stress.
NOTE 2 See also “crazing”.
[IEC 60194 (1999-04)]
3.2.13 metal core PCB
PCB using a metal core base material
[IEC 60194 (1999-04)]
3.2.14 multilayer PCB
PCB that consist of rigid or flexible insulation materials and three or more
alternate printed wiring and/or printed circuit layers that have been bonded
together and electrically interconnected
[IEC 60194 (1999-04)]
3.2.15 prepreg
sheet of material that has been impregnated with a resin and cured to an
intermediate stage
NOTE B-staged resin.
[IEC 60194 (1999-04)]
3.2.16 printed circuit board (PCB)
printed board that provides both point-to-point connections and printed
components in a predetermined arrangement on a common base
NOTE This includes single-sided, double sided and
multilayer PCBs with rigid, flexible, and
rigid-flex base materials.
[IEC 60194 (1999-04)]
3.2.17 rigid double-sided PCB
double-sided PCB, either printed circuit or printed wiring, using rigid base
materials only
[IEC 60194 (1999-04)]
3.2.18 rigid-flex PCB
PCB with both rigid and flexible base materials
[IEC 60194 (1999-04)]
3.2.19 rigid-flex double-sided PCB
double-sided PCB, either printed circuit or printed wiring, using combinations
of rigid and flexible base materials
[IEC 60194 (1999-04)]
3.2.20 rigid-flex multilayer PCB
multilayer PCB, either printed circuit or printed wiring, using combinations of
rigid multilayer and flexible single and double-sided base materials
3.2.21 rigid PCB
PCB using rigid base materials only
[IEC 60194 (1999-04)]
3.2.22 rigid single-sided PCB
single-sided PCB, either printed circuit or printed wiring, using rigid base
materials only
[IEC 60194 (1999-04)]
3.2.23 rigid multilayer PCB
multilayer PCB, either printed circuit or printed wiring, using rigid base
materials only
[IEC 60194 (1999-04)]
3.2.24 scratch
narrow furrow or grove in a surface
NOTE It is usually shallow and caused by the marking
or rasping of the surface with a pointed or
sharp object.
[IEC 60194 (1999-04)]
3.2.25 sequentially laminated multilayer PCB
multilayer PCB that is formed by laminating together through hole plated
double-sided or multilayer PCBs
NOTE Thus, some of its conductive layers are
interconnected with blind or buried vias.
[IEC 60194 (1999-04)]
3.2.26 test pattern
part of the PCB that refers to the copper pattern on and within the PCB
substrate for a specific test
3.3 Abbreviated terms
For the purpose of this Standard, the abbreviated terms from ECSS-S-ST-00-01
and the following apply:
Abbreviation Meaning
CAD computer aided design
CAM computer aided manufacturing
M major nonconformance
m minor nonconformance
n.a. not applicable
NRB nonconformance review board
PCB printed circuit board
PID process identification document
PTH plated-through hole
PTFE polytetrafluoroethylene
r.m.s.
root-mean-square
TBD to be defined
Principles
4.1 General
This Standard details the steps to obtain from the PCB manufacturer the
qualification for supplying PCBs of an identified technology.
These steps are:
a. Evaluation (see clause 5);
b. Qualification (see clause 6):
 Test and inspections (see clause 7),
 Qualification approval (see clause 6.6);
c. Maintenance of qualification (see clause 6.7).
4.2 Roles
For the need of this Standard the roles “PCB manufacturer”, “supplier”,
“customer” and “qualification authority” have been explicitly introduced to
allow proper allocation of requirements:
a. The “PCB manufacturer” is the entity that manufactures the PCB.
b. The “supplier” is the entity that uses the PCB for an instrument, for
instance a subcontractor that delivers an electronics box. The supplier
procures the PCB from the PCB manufacturer.
c. The “customer” is the entity that uses the supplier’s product for a project,
for instance a prime contractor that integrates an electronics box into a
spacecraft payload. The role of supplier can coincide with the one of
customer. The term customer does not refer to being the customer of the
PCB manufacturer but refers to being the (prime) contractor of a space
organisation initiating a space project.
d. The “qualification authority” is the entity that reviews and accepts the
qualification programme, evaluates the test results and grants the final
approval. The role of customer can coincide with the one of qualification
authority.
4.3 Specification of test requirements
Clause 7 describes the tests within the qualification programme in which the
following three levels of requirement specifications are used:
a. The requirement specifications that are generic for all types of PCBs are
listed in clause 7.
b. The requirement specifications that are specific to a particular type of
PCB are listed in clause 9 and are referred to with the term “requirement”
in clause 7.
c. The requirement specifications that are determined by the supplier are
referred to with the term “supplier’s specification” in clause 7.
Evaluation
5.1 General
a. The PCB manufacturer who applies for the qualification of his PCB
manufacturing line shall:
1. request for an evaluation in conformance with clause 5.2;
2. supply evaluation PCBs in conformance with clause 5.3;
3. have a manufacturing line audit performed in conformance with
clause 5.4.
NOTE If the result is satisfactory, the qualification
authority can authorize the go-ahead of the
qualification programme for each of the
technologies that have been accepted.
b. The PCB manufacturer and the qualification authority shall agree on the
evaluation tests to be performed.
NOTE The evaluation tests can be an appropriate
subset of the tests performed within the
qualification programme.
5.2 Request for evaluation
a. The PCB manufacturer’s request for evaluation shall contain:
1. a description of the technology for which the PCB manufacturer
wishes to be evaluated;
2. a description of the manufacturing line;
3. past experience.
b. Applications shall be signed by the person responsible for production
and product assurance.
c. Applications shall be addressed to the qualification authority.
5.3 Evaluation PCBs
a. The PCB manufacturer shall produce three evaluation PCBs of each type
with the materials, processes and equipment that are intended for use in
subsequent production.
b. The evaluation PCBs shall be representative in terms of technology for
which the PCB manufacturer applies for qualification.
NOTE The term technology refers, among others, to:
• Dimensions of the boards, vias, pads and
tracks
• Number of layers
• Pattern design.
c. The evaluation PCBs shall represent the highest technological capability
for which the PCB manufacturer applies for qualification.
d. The PCB manufacturer shall perform the evaluation test and document it
in conformance with Annex A.
NOTE The evaluation PCBs can be inspected at an
independent certified test house.
e. The evaluation PCBs shall be provided with associated test coupons.
5.4 Line audit
a. Provided that the evaluation PCBs are accepted, the qualification
authority shall audit the manufacturing line when PCB production is in
progress.
b. Before or during the audit, the PCB manufacturer shall make the
following documents available to the customer:
1. Company organigram related to PCB production and control,
including names and functions of all key personnel involved.
2. Identification of the parameters of the technologies that they wish
to qualify.
NOTE See note in requirement 5.3b.
3. List of materials and equipment (including types and names of
companies) used for production of PCBs.
4. List of process and control specifications with number, issue
number, and date of issue.
5. Production flow-chart, including quality-assurance inspection
point and relevant process specification.
6. Outline of test capabilities.
NOTE 1 Examples of test capabilities are metallographic
examination, chemical analysis, failure analysis,
mechanical and electrical test including
functional testing of PCBs.
NOTE 2 These six documents can be gathered in a
preliminary process identification document (PID).
Qualification
6.1 General
a. A qualification programme shall be initiated in the following cases:
1. Initial qualification.
2. When previous qualification is more than two years ago and
maintenance of qualification was not assured.
3. Interruption of the manufacturing of the type of PCBs for more
than two years.
4. New technology.
5. Change in the manufacturing line.
NOTE For example, any changes in material, chemical
products, mechanical processing parameters,
equipments.
6. The manufacturing line was moved to another location.
7. Changes in key personnel.
6.2 Qualification programme definition and approval
a. After successful evaluation, the PCB manufacturer shall submit a
qualification programme to the qualification authority for approval, after
which the programme shall be initiated.
b. The qualification programme shall identify:
1. the key personnel involved;
2. the test houses;
3. the test procedure and test sequence;
4. the proposed schedule of testing.
c. Each test house shall have the approval of the qualification authority
prior to commencement of the programme.
d. The PCB manufacturer shall agree with the qualification authority on the
monitoring during the qualification programme.
6.3 Nonconformance criteria
a. The nonconformances shall be dispositioned in conformance with ECSS-
Q-ST-10-09.
b. Major nonconformances (M) shall be dispositioned at a nonconformance
review board (NRB) established by the qualification authority and the
PCB manufacturer.
NOTE This is because any major nonconformance (M)
can result in the failure of qualification.
c. Minor nonconformances (m) shall be:
1. processed through an internal NRB of the PCB manufacturer to
determine the causes and consequences;
2. reported in the qualification test report in conformance with
Annex B;
3. assessed by the qualification authority;
d. Nonconformance criteria ranked “m/M” shall be further classified by the
PCB manufacturer, the supplier and the qualification authority.
6.4 Qualification programme implementation
a. The qualification programme shall be performed by the PCB
manufacturer or one or more independent test houses.
b. The qualification programme shall be performed on six qualification
PCBs.
c. One additional qualification PCB shall be made for reference.
d. The qualification programme shall be performed in conformance with the
test sequence specified in Figure 6-1 and the test specification in Table 6-1
and explained in detailed in clause 7.
e. A qualification test report shall be prepared in conformance with Annex B
and submitted to the qualification authority for review and approval
together with all prepared microsections.
NOTE The qualification authority can request the
delivery of the inspected qualification PCBs.
f. If the PCBs are used for manned space programmes the customer shall
assure the PCB base material is tested for the following items:
1. Flammability in conformance with ECSS-Q-ST-70-21.
2. Offgassing (toxicity) and odour according to ECSS-Q-ST-70-29.
Qualification PCBs Qualification PCB for
No. 1-6 reference No. 7
Group 1
Visual inspection and
non-destructive test
Subgroup 1.1 Subgroup 1.2
Specific dimensional check Electrical measurements
No. 1-2 No. 3-6
Group 2 Group 3 Group 4 Group 5
Miscellaneous tests Thermal stress and Thermal cycling Damp heat and
No. 1-2 thermal shock No. 4-5 steam ageing
No. 3 No. 6
Figure 6-1: Test sequence
Table 6-1: Test specification
(Part 1 of 2)
Group Tests Clause PCB no.
Test pattern no.
Group 1 Visual inspection and non-destructive 7.2 PCBs 1-6
tests:
- Verification of marking 7.2.2
- Visual aspects 7.2.3
- External dimensions 7.2.4
- Warp 7.2.5
- Twist 7.2.6
Subgroup 1.1 Specific dimensional check 7.2.7 PCBs 1-2
Subgroup 1.2 Electrical measurements: 7.2.8 PCBs 3-6
a
- Intralayer insulation resistance 7.2.8.2 Test pattern A
b
- Interlayer insulation resistance 7.2.8.3 Test pattern H
- Dielectric withstanding voltage: 7.2.8.4
• intralayer Test pattern A
• interlayer Test pattern H
- Continuity 7.2.8.5 Test pattern D
- Interconnection resistance 7.2.8.6 Test pattern E
- Impedance test 7.2.8.7 Test pattern Y
- Dielectric constant and loss tangent for 7.2.8.8 Test pattern W
high frequency materials
Group 2 Miscellaneous tests 7.3 PCBs 1-2
Subgroup 2.1 Solderability test: 7.3.2
- Wettability 7.3.2 Test pattern J
- Microsectioning (option) 7.3.4.3 Test pattern J
Subgroup 2.2 Mechanical tests: 7.3.3
- Peel strength 7.3.3.1 Test pattern B
- Pull-off strength 7.3.3.2 Test pattern B
- Flexural fatigue (only for double sided 7.3.3.3 Test pattern X
flexible PCB)
- Bending test (only for rigid-flex) 7.3.3.4
Subgroup 2.3 Coating tests: 7.3.4
- Coating adhesion of non-fused SnPb 7.3.4.1 Test pattern G
finishes
- Analysis of SnPb coating 7.3.4.2 Test pattern G
- Microsectioning 7.3.4.3 Test pattern F
Subgroup 2.4 Electrical tests: 7.3.5
- Current overload: 7.3.5.1 Test pattern E
• Short-time overload 7.3.5.1.2
• Long-time overload 7.3.5.1.3
- Internal short circuit 7.3.5.2 Test pattern C
Subgroup 2.5 Physical tests: 7.3.6 Test pattern K
- Water absorption 7.3.6.1
- Outgassing 7.3.6.2
Table 6-1: Test specification
(Part 2 of 2)
Group 3 Thermal stress 7.4 PCB 3
Solder bath float and vapour phase reflow 7.4.2 PCB (without test pattern F)
simulation PCB
- Substrate aspect test 7.2.3 Test pattern B
- Peel strength 7.3.3.1 Test pattern D
- Continuity 7.2.8.5 Test pattern E
- Interconnection resistance 7.2.8.6 Test pattern J
- Microsectioning 7.3.4.3 Test pattern F
Rework simulation (thermal shock, hand 7.4.3 Test pattern F
soldering)
- Microsectioning 7.3.4.3
Group 4 Thermal cycling 7.5 PCBs 4-5
- Substrate aspect test 7.2.3 PCBs
- Peel strength 7.3.3.1 Test pattern B
- Continuity 7.2.8.5 Test pattern D
- Interconnection resistance 7.2.8.6 Test pattern E
a
- Intralayer insulation resistance 7.2.8.2 Test pattern A
b
- Interlayer insulation resistance 7.2.8.3 Test pattern H
- Dielectric withstanding voltage: 7.2.8.4
• intralayer Test pattern A
• interlayer Test pattern H
- Microsectioning 7.3.4.3 Test pattern F
Group 5 Damp heat — Steam ageing
7.6 PCB 6
Damp heat 7.6.2 PCB (without test pattern F)
- Peel strength 7.3.3.1 Test pattern B
a
- Intralayer insulation resistance 7.2.8.2 Test pattern A
b
- Interlayer insulation resistance 7.2.8.3 Test pattern H
- Dielectric withstanding voltage: 7.2.8.4
• intralayer Test pattern A
• interlayer Test pattern H
- Microsectioning (if required) 7.3.4.3 Test pattern F
Steam ageing 7.6.3 Test pattern F
- Solderability test:
• Wettability 7.3.2 Test pattern F
- Microsectioning (if required) 7.3.4.3 Test pattern F
a.
i.e.: in the same layer.
b.
i.e.: between opposite layers.

6.5 Qualification PCBs
6.5.1 General
a. The qualification PCBs shall have test patterns that enable
...