prEN IEC 63378-3:2024

SLOVENSKI STANDARD
oSIST prEN IEC 63378-3:2024
01-junij-2024
Standardizacija toplotnih lastnosti pri polprevodniških ohišjih - 3. del: Simulacijski
modeli toplotnih vezij diskretnih polprevodniških ohišij za prehodno analizo
Thermal standardization on semiconductor packages - Part 3: Thermal circuit simulation
models of discrete semiconductor packages for transient analysis
Normalisation thermique des boîtiers de semiconducteurs - Partie 3: Modèles de
simulation de circuits thermiques de boîtiers de semiconducteurs discrets pour analyse
transitoire
Ta slovenski standard je istoveten z: prEN IEC 63378-3:2024
ICS:
31.080.01 Polprevodniški elementi Semiconductor devices in
(naprave) na splošno general
oSIST prEN IEC 63378-3:2024 en
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

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oSIST prEN IEC 63378-3:2024

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oSIST prEN IEC 63378-3:2024
47D/967/CDV
COMMITTEE DRAFT FOR VOTE (CDV)

PROJECT NUMBER:
IEC 63378-3 ED1
DATE OF CIRCULATION: CLOSING DATE FOR VOTING:
2024-04-26 2024-07-19
SUPERSEDES DOCUMENTS:
47D/949/CD, 47D/953A/CC

IEC SC 47D : SEMICONDUCTOR DEVICES PACKAGING
SECRETARIAT: SECRETARY:
Japan Mr Hiroyoshi Yoshida
OF INTEREST TO THE FOLLOWING COMMITTEES: PROPOSED HORIZONTAL STANDARD:

TC 91
Other TC/SCs are requested to indicate their interest, if
any, in this CDV to the secretary.
FUNCTIONS CONCERNED:
EMC ENVIRONMENT QUALITY ASSURANCE SAFETY
SUBMITTED FOR CENELEC PARALLEL VOTING NOT SUBMITTED FOR CENELEC PARALLEL VOTING
Attention IEC-CENELEC parallel voting
The attention of IEC National Committees, members of
CENELEC, is drawn to the fact that this Committee Draft
for Vote (CDV) is submitted for parallel voting.
The CENELEC members are invited to vote through the
CENELEC online voting system.

This document is still under study and subject to change. It should not be used for reference purposes.
Recipients of this document are invited to submit, with their comments, notification of any relevant patent rights of
which they are aware and to provide supporting documentation.
Recipients of this document are invited to submit, with their comments, notification of any relevant “In Some
Countries” clauses to be included should this proposal proceed. Recipients are reminded that the CDV stage is
the final stage for submitting ISC clauses. (SEE AC/22/2007 OR NEW GUIDANCE DOC).

TITLE:
Thermal standardization on semiconductor packages - Part 3: Thermal circuit simulation
models of discrete semiconductor packages for transient analysis

PROPOSED STABILITY DATE: 2029

NOTE FROM TC/SC OFFICERS:


Copyright © 2024 International Electrotechnical Commission, IEC. All rights reserved. It is permitted to
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oSIST prEN IEC 63378-3:2024
IEC CDV 63378-3 © IEC 2024 – 2 – 47D/967/CDV
1 CONTENTS
2
3 FOREWORD . 3
4 1 Scope . 5
5 2 Normative references . 5
6 3 Terms and definitions . 5
7 4 Procedure of thermal circuit network model . 6
8 4.1 General . 6
9 4.2 Detailed model analysis . 6
10 4.3 Delphi model preparation . 8
11 4.4 Thermal circuit model topology . 8
12 4.5 Determination of thermal capacitance values . 9
13 Annex A (normative) Validation for TO-252 case . 12
14 A.1 General . 12
15 A.2 Simulation parameters . 12
16 A.3 Comparison of detaile
...