SIST EN IEC 60749-34-1:2025

SLOVENSKI STANDARD
01-oktober-2025
Polprevodniški elementi - Mehanske in klimatske preskusne metode - 34-1. del:
Preskus močnostnega polprevodniškega modula s cikliranjem električnega
napajanja (IEC 60749-34-1:2025)
Semiconductor devices - Mechanical and climatic test methods - Part 34-1: Power
cycling test for power semiconductor module (IEC 60749-34-1:2025)
Halbleiterbauelemente - Mechanische und klimatische Prüfverfahren - Teil 34-1:
Leistungszyklusprüfung für Leistungshalbleitermodule (IEC 60749-34-1:2025)
Dispositifs à semiconducteurs - Méthodes d’essais mécaniques et climatiques - Partie 34
-1: Essai de cycles en puissance pour modules de puissance à semiconducteurs (IEC
60749-34-1:2025)
Ta slovenski standard je istoveten z: EN IEC 60749-34-1:2025
ICS:
31.080.01 Polprevodniški elementi Semiconductor devices in
(naprave) na splošno general
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

EUROPEAN STANDARD EN IEC 60749-34-1

NORME EUROPÉENNE
EUROPÄISCHE NORM August 2025
ICS 31.080.01
English Version
Semiconductor devices - Mechanical and climatic test methods -
Part 34-1: Power cycling test for power semiconductor module
(IEC 60749-34-1:2025)
Dispositifs à semiconducteurs - Méthodes d'essais Halbleiterbauelemente - Mechanische und klimatische
mécaniques et climatiques - Partie 34-1: Essai de cycles en Prüfverfahren - Teil 34-1: Leistungszyklusprüfung für
puissance pour modules de puissance à semiconducteurs Leistungshalbleitermodule
(IEC 60749-34-1:2025) (IEC 60749-34-1:2025)
This European Standard was approved by CENELEC on 2025-07-25. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
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Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the
Netherlands, Norway, Poland, Portugal, Republic of North Macedonia, Romania, Serbia, Slovakia, Slovenia, Spain, Sweden, Switzerland,
Türkiye and the United Kingdom.

European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Rue de la Science 23, B-1040 Brussels
© 2025 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
Ref. No. EN IEC 60749-34-1:2025 E

European foreword
The text of document 47/2902/FDIS, future edition 1 of IEC 60749-34-1, prepared by TC 47
"Semiconductor devices" was submitted to the IEC-CENELEC parallel vote and approved by
CENELEC as EN IEC 60749-34-1:2025.
The following dates are fixed:
• latest date by which the document has to be implemented at national (dop) 2026-08-31
level by publication of an identical national standard or by endorsement
• latest date by which the national standards conflicting with the (dow) 2028-08-31
document have to be withdrawn
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC shall not be held responsible for identifying any or all such patent rights.
Any feedback and questions on this document should be directed to the users’ national committee. A
complete listing of these bodies can be found on the CENELEC website.
Endorsement notice
The text of the International Standard IEC 60749-34-1:2025 was approved by CENELEC as a
European Standard without any modification.
In the official version, for Bibliography, the following notes have to be added for the standard indicated:
IEC 60747 (series) NOTE Approved as EN IEC 60747 (series)
IEC 60747-15:2024 NOTE Approved as EN IEC 60747-15:2024 (not modified)
IEC 60749 (series) NOTE Approved as EN 60749 (series)
IEC 60749-23 NOTE Approved as EN 60749-23
Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any amendments)
applies.
NOTE 1  Where an International Publication has been modified by common modifications, indicated by (mod),
the relevant EN/HD applies.
NOTE 2  Up-to-date information on the latest versions of the European Standards listed in this annex is available
here: www.cencenelec.eu.
Publication Year Title EN/HD Year
IEC 60191-4 - Mechanical standardization of semiconductor EN 60191-4 -
devices - Part 4: Coding system and classification
into forms of package outlines for semiconductor
device packages
IEC 60747-2 2016 Semiconductor devices - Part 2: Discrete devices - -
- Rectifier diodes
IEC 60747-6 2016 Semiconductor devices - Part 6: Discrete devices - -
- Thyristors
IEC 60747-8 2010 Semiconductor devices - Discrete devices - Part - -
8: Field-effect transistors
+ A1 2021
IEC 60747-9 2019 Semiconductor devices - Part 9: Discrete devices - -
- Insulated-gate bipolar transistors (IGBTs)
IEC 60749-34 - Semiconductor devices - Mechanical and climatic EN 60749-34 -
test methods - Part 34: Power cycling

IEC 60749-34-1 ®
Edition 1.0 2025-06
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Semiconductor devices - Mechanical and climatic test methods -
Part 34-1: Power cycling test for power semiconductor module

Dispositifs à semiconducteurs - Méthodes d’essais mécaniques et climatiques -
Partie 34-1: Essai de cycles en puissance pour modules de puissance à
semiconducteurs
ICS 31.080.01  ISBN 978-2-8327-0496-7

IEC 60749-34-1:2025-06(en-fr)
IEC 60749-34-1:2025 © IEC 2025
CONTENTS
FOREWORD . 3
INTRODUCTION . 5
1 Scope . 6
2 Normative references . 6
3 Terms and definitions . 6
4 Test apparatus and structure of DUT . 8
5 Procedure . 12
5.1 General . 12
5.2 Determination of T , T and R . 15
vj(min) vj(max) th(j-c)
5.2.1 General. 15
5.2.2 Real-time temperature measurement . 15
5.2.3 Temperature calculation method . 17
6 Test conditions . 17
6.1 General . 17
6.2 Power cycling test (short-time test) . 18
6.3 Power cycling test (long-time test) . 18
6.4 Test conditions and objectives . 19
6.4.1 Certification test . 19
6.4.2 Lifetime model validation test . 19
7 Measurements. 20
8 Failure criteria . 20
Annex A (informative) Estimation of the power cycling capability . 22
A.1 Simple Weibull regression method (the "mean of m method") . 22
A.1.1 General. 22
A.1.2 Improve estimation accuracy under small sample size conditions . 22
A.1.3 Lifetime estimation using the "mean of m method" . 22
A.1.4 Estimation of the power cycling capability . 23
A.2 Least square regression method . 24
Bibliography . 28

Figure 1 – Example of the basic structure of a power semiconductor module
(schematic diagram) (case type module for industrial use) . 9
Figure 2 – A basic test circuit for the power cycling test (for IGBT module) . 9
Figure 3 – A basic test circuit for power MOSFET module . 11
Figure 4 – A basic test circuit for diode module. 11
Figure 5 – A basic test circuit for thyristor module . 12
Figure 6 – A basic circuit of 6-in-1 IGBT module . 13
Figure 7 – Temperature change profile and on/off cycle of the power cycling test
(short-time) . 14
Figure 8 – Temperature change profile and on/off cycle of the power cycling test (long-
time) . 15
Figure A.1 – Lifetime estimation by the mean of m method . 23
Figure A.2 – Power cycling capability in the power cycling test (short-time) . 23
Figure A.3 – Power cycling capability in the power cycling test (long-time) . 24
IEC 60749-34-1:2025 © IEC 2025
Figure A.4 – Power cycling tests at a minimum of 2 ΔT conditions . 26
Figure A.5 – Curve fitting by the regression analysis and determination of the
parameter of the lifetime model . 26
Figure A.6 – Normalization of the number of cycles to one ΔT and T by the
norm norm
N = f(ΔT, T)-model . 26
f
Figure A.7 – Fit procedure for the Weibull graph for the normalized cycle numbers . 26
Figure A.8 – Deduction of the lifetime curve for the product that crosses the specified
failure rate percentage x . 27

Table 1 – Test conditions . 18
Table 2 – Failure criteria for long-time and short-time tests . 21
Table A.1 – The sample size N for power cycling tests . 22

IEC 60749-34-1:2025 © IEC 2025
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
Semiconductor devices - Mechanical and climatic test methods -
Part 34-1: Power cycling test for power semiconductor module

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international
co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and
in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports,
Publicly Available Specifications (PAS) and Guides (hereafter referred to as "IEC Publication(s)"). Their
preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with
may participate in this preparatory work. International, governmental and non-governmental organizations liaising
with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for
Standardization (ISO) in accordance with conditions determined by agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence between
any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) IEC draws attention to the possibility that the implementation of this document may involve the use of (a)
patent(s). IEC takes no position concerning the evidence, validity or applicability of any claimed patent rights in
respect thereof. As of the date of publication of this document, IEC had not received notice of (a) patent(s), which
may be required to implement this document. However, implementers are cautioned that this may not represent
the latest information, which may be obtained from the patent database available at https://patents.iec.ch [and/or]
www.iso.org/patents. IEC shall not be held responsible for identifying any or all such patent rights.
IEC 60749-34-1 has been prepared by subcommittee IEC technical committee TC 47:
Semiconductor devices. It is an International Standard.
The text of this International Standard is based on the following documents:
Draft Report on voting
47/2902/FDIS 47/2924/RVD
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.

IEC 60749-34-1:2025 © IEC 2025
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, and the
ISO/IEC Directives available at www.iec.ch/members_experts/refdocs. The main document
types developed by IEC are described in greater detail at www.iec.ch/publications.
A list of all parts in the IEC 60749 series, published under the general title Semiconductor
devices – Mechanical and climatic test methods, can be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under webstore.iec.ch in the data related to the
specific document. At this date, the document will be
• reconfirmed,
• withdrawn, or
• revised.
IEC 60749-34-1:2025 © IEC 2025
INTRODUCTION
A power semiconductor module is affected by thermal and mechanical stress due to the power
dissipation of the internal semiconductor dies and connectors. This occurs when low-voltage
operating bias for forward conduction is periodically applied and removed, causing rapid
changes in temperature. The power cycling test is intended to simulate the temperature swing
in typical power electronics applications, which is different from the stable temperatures
reached under the high temperature operating life (HTOL) test as shown in IEC 60749-23.
Exposure to the power cycling test would not induce the same failure mechanisms as exposure
to the thermal cycling test, or thermal shock test. The power cycling test is a destructive test
that will cause wear-out failure of the device under test (DUT) if it is driven above the
specification of the device.
The power cycling test is applied to general power semiconductor modules such as for example
those used for motor control, robots, and renewable energy generation. The power cycling test
has two modes: a short-time test (based on a short cycle time) that simulates rapid acceleration
and deceleration of the equipment, and a long-time test (based on a long cycle time) that
simulates repeated operation and stop of the equipment. The short-time test mainly verifies the
effect of the temperature change of virtual junction temperature (T ) and causes the
vj
deterioration of the joint between the semiconductor die and the wire, and that of the die attach
under the semiconductor die. The long-time test verifies the effect of the temperature change
of case temperature (T ) and causes the deterioration of the joining layer between the metallic
c
base plate and the insulating substrate, and the deterioration of the die attach under the
semiconductor die.
The power cycling test is performed in two cases: as a certification test for the products whose
power cycling lifetime model has already been confirmed, and as a lifetime model validation
test for the products whose lifetime model has not been confirmed. The purpose of the
certification test is to verify that the product has a longer life than the specified number of cycles.
Moreover, the purpose of the lifetime model validation test is to statistically estimate the power
cycling lifetime model from the test results and obtain the expected lifetime model of power
modules. This is essential when customers design the lifetime of their products.

IEC 60749-34-1:2025 © IEC 2025
1 Scope
This part of IEC 60749 describes a test method that is used to determine the capability of power
semiconductor modules to withstand thermal and mechanical stress resulting from cycling the
power dissipation of the internal semiconductors and the internal connectors. It is based on
IEC 60749-34, but is developed specifically for power semiconductor module products,
including insulated-gate bipolar transistor (IGBT), metal-oxide-semiconductor field-effect
transistor (MOSFET), diode and thyristor.
If there is a customer request for an individual use or an application specific guideline (for
example ECPE Guideline AQG 324), details of the test method can be based on these
requirements if they deviate from the content of this document.
This test causes wear-out and is considered destructive.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies.
For undated references, the latest edition of the referenced document (including any
amendments) applies.
IEC 60191-4, Mechanical standardization of semiconductor devices – Part 4: Coding system
and classification into forms of package outlines for semiconductor device packages
IEC 60747-2:2016, Semiconductor devices – Part 2: Discrete devices – Rectifier diodes
IEC 60747-6:2016, Semiconductor devices – Part 6: Discrete devices – Thyristors
IEC 60747-8:2010, Semiconductor devices – Discrete devices – Part 8: Field-effect transistors
IEC 60747-8:2010/AMD1:2021
IEC 60747-9:2019, Semiconductor devices – Part 9: Discrete devices – Insulated-gate bipolar
transistors (IGBTs)
IEC 60749-34, Semiconductor devices – Mechanical and climatic test methods – Part 34: Power
cycling
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
ISO and IEC maintain terminology databases for use in standardization at the following
addresses:
• IEC Electropedia: available at https://www.electropedia.org/
• ISO Online browsing platform: available at https://www.iso.org/obp
NOTE Further terms and definitions pertaining to semiconductor devices can be found in the IEC 60747 series and
IEC 60749 series.
IEC 60749-34-1:2025 © IEC 2025
3.1
power semiconductor module
isolated or non-isolated semiconductor module with two or more semiconductor dies according
to the package outline style code "MP" specified in IEC 60191-4
Note 1 to entry: The predominantly used package body material is plastic (including epoxy) according to
IEC 60191-4 and both the frame based and resin based embodiment are possible.
3.2
device under test
DUT
device to be tested
3.3
case temperature
T
c
case surface temperature closely below the power semiconductor die under test
3.4
junction temperature excursion
ΔT
vj
difference between virtual maximum and minimum junction temperature of the DUT during one
power cycle
3.5
case temperature excursion
ΔT
c
difference between maximum and minimum case temperature during one power cycle
3.6
minimum virtual junction temperature
T
vj(min)
minimum virtual junction temperature of the DUT during one power cycle
3.7
maximum virtual junction temperature
T
vj(max)
maximum virtual junction temperature of the DUT during one power cycle
3.8
minimum case temperature
T
c(min)
minimum case surface temperature directly below the power semiconductor module under test
3.9
maximum case temperature
T
c(max)
maximum case surface temperature directly below the power semiconductor module under test
3.10
on-time
t
on
time interval during which the DUT under test is conducting load current
Note 1 to entry: t is already defined as the turn-on switching time for BJTs, FETs and IGBTs, but is defined
on
differently in this document.
IEC 60749-34-1:2025 © IEC 2025
3.11
off-time
t
off
time interval for cooling down
Note 1 to entry: t is already defined as the turn-off switching time for BJTs, FETs and IGBTs, but is defined
off
differently in this document.
3.12
cycle period
sum of on-time and off-time
3.13
power loss
P
power dissipation of the DUT as calculated from current waveforms and the on-state voltage
during on-time
3.14
collector-emitter saturation voltage
V
CEsat
collector-emitter voltage, under conditions of gate-emitter voltage at which the collector current
is essentially independent of the gate-emitter voltage
[SOURCE: IEC 60747-9: 2019, 3.2.5]
3.15
drain-source on-state voltage
V
DS(on)
drain-source voltage at a specified gate-source voltage, and a drain current in the range of the
linear part of the on-state drain current-voltage curve
3.16
forward voltage
V
F
voltage across the terminals of a diode which results from the flow of current in the forward
direction
[SOURCE: IEC 60747-2:2016, 3.2.1, modified – The words "of a diode" have been added.]
3.17
load current
I
L
current to which the devices are subjected to produce power loss
4 Test apparatus and structure of DUT
The power cycling test system is constructed with a constant current power supply for supplying
a load current to the DUT, a switch circuit for turning the load current on and off, and a device
for cooling the DUT. The switch circuit controls the load current. The DUTs are cooled by an
air-cooling or water-cooling system.
Figure 1 shows an example of the structure of a typical power semiconductor module used in
industrial applications. The structure of the power semiconductor module can consist of
semiconductor dies (IGBTs, MOSFETs, diodes or thyristors) mounted on an insulating substrate.
The substrate can be soldered to a copper base plate and assembled in a case. The electrode
terminals in the case are connected to the power semiconductor dies by wires.
IEC 60749-34-1:2025 © IEC 2025

Figure 1 – Example of the basic structure of a power semiconductor module
(schematic diagram) (case type module for industrial use)
Alternatively, a power semiconductor module can be designed without a base plate.
Alternatively, the die connection has a structure with Al, Cu wire, and other full-scale
connections. A generic description for isolated power semiconductor devices and the applicable
characteristics can be found in IEC 60747-15.
Figure 2 exemplarily illustrates a test circuit for an IGBT module. First, a constant current power
supply and a gate voltage power supply are connected to the phase (see 5.1) to be tested in
the DUT. Next, the specified load current is supplied to the phase by controlling the constant
current power supply. Then, a switch is controlled to turn the load current I of the IGBT on and
C
off to generate a temperature change.

Key
R Gate resistor
DUT Device under test
I Current source
CC
V Voltage source
GG
I Collector current
C
Figure 2 – A basic test circuit for the power cycling test (for IGBT module)
The additional measurement circuit, which is used with the V (T) method for determining
on-state
the junction temperature T , is omitted in Figure 2, Figure 3, Figure 4 and Figure 5, as different
vj
methods to determine T are in general possible. Details for the V (T) measurement circuit
vj on-state
can be found in the applicable IEC standard (see 5.2).
IEC 60749-34-1:2025 © IEC 2025
The bias application procedure for the short-time cycle test is as follows. First, the on/off time
and the load current of the switch circuit are adjusted to set the ΔT of the IGBT to a specified
vj
temperature difference, then the test is started. After a short run-in period for further test
adjustment, where the parameters are fixed, all control parameters (such as I , V and on/off
C GE
time in case of an IGBT module) shall be kept constant until the end of life. The end of the run-
in period is defined by the number of cycles, at which the control parameters are fixed. The
number of cycles until the end of the run-in period should be neglectable compared to the total
number of cycles during the power cycling test.
Also, the “run-in period” is the period of adjustment until the test reaches stable conditions at
the start of the test. During this period, test conditions and operating parameters are set and
adjusted to ensure stable testing.
At the start of the test, during the run-in period the test conditions (e.g., I , V , V , on/off
C GE CE
time) are first set, so that the product reaches the required ΔT in a stabilized manner at the
vj
end of the run-in period.
For those characteristics, for which failure criteria apply according to Table 2, the foll
...