IEC 62435-2:2017

IEC 62435-2 ®
Edition 1.0 2017-01
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Electronic components – Long-term storage of electronic semiconductor
devices –
Part 2: Deterioration mechanisms

Composants électroniques – Stockage de longue durée des dispositifs
électroniques à semiconducteurs –
Partie 2: Mécanismes de détérioration
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IEC 62435-2 ®
Edition 1.0 2017-01
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Electronic components – Long-term storage of electronic semiconductor

devices –
Part 2: Deterioration mechanisms

Composants électroniques – Stockage de longue durée des dispositifs

électroniques à semiconducteurs –

Partie 2: Mécanismes de détérioration

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.020 ISBN 978-2-8322-3836-3

– 2 – IEC 62435-2:2017 © IEC 2017
CONTENTS
FOREWORD . 3
INTRODUCTION . 5
1 Scope . 7
2 Normative references . 7
3 Terms, definitions and abbreviated terms . 7
3.1 Terms and definitions . 7
3.2 Abbreviated terms . 8
4 Principles of deterioration . 8
4.1 General . 8
4.2 Solderability and oxidisation of lead finishes . 8
4.3 Popcorning . 8
4.4 Delamination . 8
4.5 Corrosion and tarnishing . 8
4.6 Electrical effects . 9
4.7 High-energy ionizing radiation damage . 9
4.8 Storage temperature risks to semiconductor devices . 9
4.9 Noble metal finishes . 9
4.10 Matte tin and other finishes . 9
4.11 Solder ball and solder bump . 9
4.12 Devices containing programmable memory – flash, programmable logic and
other devices containing non-volatile memory cells . 10
5 Technical validation of the components . 10
5.1 Purpose . 10
5.2 Test selection criteria . 10
5.3 Measurements and tests . 11
5.3.1 Assessment of the supplied batch reliability . 11
5.3.2 List of test methods . 11
5.4 Periodic assessment . 12
Annex A (normative) Failure mechanisms – Encapsulated and non-encapsulated
active components . 14
Bibliography . 17

Table 1 – List of tests . 11
Table A.1 – Failure mechanisms: encapsulated and non-encapsulated active
components . 14

INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
ELECTRONIC COMPONENTS – LONG-TERM STORAGE
OF ELECTRONIC SEMICONDUCTOR DEVICES –

Part 2: Deterioration mechanisms

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
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patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 62435-2 has been prepared by IEC technical committee 47:
Semiconductor devices.
The text of this standard is based on the following documents:
FDIS Report on voting
47/2327/FDIS 47/2350/RVD
Full information on the voting for the approval of this International Standard can be found in
the report on voting indicated in the above table.
This document has been drafted in accordance with the ISO/IEC Directives, Part 2.

– 4 – IEC 62435-2:2017 © IEC 2017
A list of all parts in the IEC 62435 series, published under the general title Electronic
components – Long-term storage of electronic semiconductor devices, can be found on the
IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under "http://webstore.iec.ch" in the data related to
the specific document. At this date, the document will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
INTRODUCTION
This document applies to the long-term storage of electronic components.
This is a document for long-term storage (LTS) of electronic devices drawing on the best long-
term storage practices currently known. For the purposes of this document, LTS is defined as
any device storage whose duration can be more than 12 months for product scheduled for
long duration storage. While intended to address the storage of unpackaged semiconductors
and packaged electronic devices, nothing in this standard precludes the storage of other
items under the storage levels defined herein.
Although it has always existed to some extent, obsolescence of electronic components and
particularly of integrated circuits, has become increasingly intense over the last few years.
Indeed, with the existing technological boom, the commercial life of a component has become
very short compared with the life of industrial equipment such as that encountered in the
aeronautical field, the railway industry or the energy sector.
The many solutions enabling obsolescence to be resolved are now identified. However,
selecting one of these solutions should be preceded by a case-by-case technical and
economic feasibility study, depending on whether storage is envisaged for field service or
production, for example:
• remedial storage as soon as components are no longer marketed;
• preventive storage anticipating declaration of obsolescence.
Taking into account the expected life of some installations, sometimes covering several
decades, the qualification times, and the unavailability costs, which can also be very high, the
solution to be adopted to resolve obsolescence should often be rapidly implemented. This is
why the solution retained in most cases consists in systematically storing components which
are in the process of becoming obsolescent.
The technical risks of this solution are, a priori, fairly low. However, it requires perfect mastery
of the implemented process and especially of the storage environment, although this mastery
becomes critical when it comes to long-term storage.
All handling, protection, storage and test operations are recommended to be performed
according to the state of the art.
The application of the approach proposed in this standard in no way guarantees that the
stored components are in perfect operating condition at the end of this storage. It only
comprises a means of minimizing potential and probable degradation factors.
Some electronic device users have the need to store electronic devices for long periods of
time. Lifetime buys are commonly made to support production runs of assemblies that well
exceed the production timeframe of its individual parts. This puts the user in a situation
requiring careful and adequate storage of such parts to maintain the as-received solderability
and minimize any degradation effects to the part over time. Major degradation concerns are
moisture, electrostatic fields, ultra-violet light, large variations in temperature, air-borne
contaminants, and outgassing.
Warranties and sparing also present a challenge for the user or repair agency as some
systems have been designated to be used for long periods of time, in some cases for up to
40 years or more. Some of the devices needed for repair of these systems will not be
available from the original supplier for the lifetime of the system or the spare assembly may
be built with the original production run but then require long-term storage. This document
was developed to provide a standard for storing electronic devices for long periods of time.

– 6 – IEC 62435-2:2017 © IEC 2017
For storage of devices that are moisture sensitive but that do not need to be stored for long
periods of time, refer to IEC TR 62258-3.
Long-term storage assumes that the device is going to be placed in uninterrupted storage for
a number of years. It is essential that it is useable after storage. Particular attention should be
paid to storage media surrounding the devices together with the local environment.
These guidelines do not imply any warranty of product or guarantee of operation beyond the
storage time given by the manufacturer.
The IEC 62435 series is intended to ensure that adequate reliability is achieved for devices in
user applications after long-term storage. Users are encouraged to request data from
suppliers to these specifications to demonstrate a successful storage life as requested by the
user. These standards are not intended to address built-in failure mechanisms that would take
place regardless of storage conditions
These standards are intended to give practical guide to methods of long-duration storage of
electronic components where this is intentional or planned storage of product for a number of
years. Storage regimes for work-in-progress production are managed according to company
internal process requirements and are not detailed in this series of standards.
The overall standard includes a number of parts. Parts 1 to 4 apply to any long-term storage
and contain general requirements and guidance, whereas Parts 5 to 9 are specific to the type
of product being stored. It is intended that the product specific part should be read alongside
the general requirements of Parts 1 to 4.
Electronic components requiring different storage conditions are covered separately starting
with Part 5.
The structure of the IEC 62435 series as currently conceived is as follows:
Part 1 – General
Part 2 – Deterioration mechanisms
Part 3 – Data
Part 4 – Storage
Part 5 – Die and wafer devices
Part 6 – Packaged or finished devices
Part 7 – MEMS
Part 8 – Passive electronic devices
Part 9 – Special cases
ELECTRONIC COMPONENTS – LONG-TERM STORAGE
OF ELECTRONIC SEMICONDUCTOR DEVICES –

Part 2: Deterioration mechanisms

1 Scope
This part of IEC 62435 is related to deterioration mechanisms and is concerned with the way
that components degrade over time depending on the storage conditions applied. This part
also includes guidance on test methods that may be used to assess generic deterioration
mechanisms. Typically, this part is used in conjunction with IEC 62435-1 for any device long-
term storage whose duration may be more than 12 months for product scheduled for long
duration storage. Mechanisms that apply to specific component types are detailed in
IEC 62435-5 to IEC 62435-9 (proposed) .
2 Normative references
The following documents are referred to in the text in such a way that some or all of their
content constitutes requirements of this document. For dated references, only the edition
cited applies. For undated references, the latest edition of the referenced document (including
any amendments) applies.
IEC 60749-20-1, Semiconductor devices – Mechanical and climatic test methods – Part 20-1:
Handling, packing, labelling and shipping of surface-mount devices sensitive to the combined
effect of moisture and soldering heat
3 Terms, definitions and abbreviated terms
For the purposes of this document, the following terms, definitions and abbreviated terms
apply.
ISO and IEC maintain terminological databases for use in standardization at the following
addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp
3.1 Terms and definitions
3.1.1
storage environment
specially controlled storage area, with particular control of temperature, humidity, atmosphere
and any other conditions depending on the product requirements
3.1.2
long-term storage
LTS
planned storage of components to extend the life-cycle for a duration with the intention of
supporting future use
____________
Under preparation.
– 8 – IEC 62435-2:2017 © IEC 2017
3.1.3
MBB
moisture barrier bag
storage bag manufactured with a flexible laminated vapour barrier film that restricts the
transmission of water vapour
Note 1 to entry: Refer to IEC 60749-20-1 for packaging of moisture sensitive products.
3.2 Abbreviated terms
BGA ball grid array
ES electro-static
ESD electro-static discharge
MSD moisture sensitive device
PWB printed wiring board
rH relative humidity
4 Principles of deterioration
4.1 General
In determining the deterioration mechanisms for products stored under LTS, it is important to
consider not only the deterioration of the product itself (see Annex A) but also any
deterioration mechanism that can affect the subsequent processing and use of the product.
4.2 Solderability and oxidisation of lead finishes
Device surfaces that will be soldered to another surface using reflow and/or wave soldering
operations should join successfully. Solderability determines whether the surfaces intended to
be joined metallurgically can perform as expected. Failure to form a complete metallurgical
joint can result in conditions known as non-wets or de-wets; oxides typically contribute to
solderability degradation. LTS factors that can impact the ability for a part to form a good
metallurgical joint include humidity, oxygen exposure, cleanliness, foreign material, and
contamination.
4.3 Popcorning
Moisture content within a material when heated rapidly results in expansion of the moisture in
form of vapour. This vapour occupies greater space than the moisture from which it was
derived. If this vapour is not allowed to dissipate, then the materials within which it is
contained will increase in size and exceed the strength or ability of the material to contain the
vapour. Subsequently an electronic device that was manufactured correctly (i.e., all materials
were properly adhered) may then develop a loss of adhesion. This may lead to interface
delamination, package blistering, cracking, and bubbling.
4.4 Delamination
Delamination can occur when moisture accumulates in the materials, voids or at the interface
between layers. Subsequent exposure to cycling or thermal processing can cause a
separation of materials. Dies with organic passivation, organic substrates, polymer
encapsulants, and PWBs tend to absorb moisture which could subsequently outgas during
high-temperature processing. The primary failure mode is interfacial disbanding and cohesive
separation.
4.5 Corrosion and tarnishing
Corrosion is a chemical reaction that results in the oxidation and/or structural decomposition
of metals. Metal migration is also a form of corrosion. Moisture, chemical attack and
contamination enhances corrosion mechanisms; contaminants (including fluorine and chlorine)

may be hydrated with atmospheric moisture or pollutants during shipment, handling and
ambient storage and act as corrosion catalyst. Eliminating the moisture is key to inhibiting
corrosion. Corrosion can lead to opens, shorts, dendrites, and discoloration.
Tarnishing of some metal finishes can lead to solderability issues, notably the tarnishing of
silver and silver alloys predominantly caused by chemical reaction to oxygen and/or sulphur.
4.6 Electrical effects
Conductive or electro-static (ES) dissipative materials should be used when required for ESD
protection. ESD may be caused by using inappropriate packing materials, too low relative
humidity (rH), or proximity to ES field sources. This may lead to p-n junction damage, oxide
breakdown/puncturing, or other sensitive parameter effects.
4.7 High-energy ionizing radiation damage
Where the product is known to be susceptible to damage caused by ionizing radiation (e.g.,
as from x-rays or other high energy radiation sources), exposure to such radiation shall be
qualified and quantified to understand the potential damage. Some die types can be
particularly sensitive to damage and parameter drift caused by radiation. Care should be
taken to ensure protection from ionizing radiation sources for those products that are sensitive.
4.8 Storage temperature risks to semiconductor devices
Exposure to heat over time can accelerate some semiconductor failure mechanisms, including
stress voiding in metallization and data loss in some non-volatile memory cell types that have
been written to a desired state prior to storage. Refer to JEP-122 for further details on such
mechanisms.
4.9 Noble metal finishes
No failure mechanisms have been identified that would compromise the reliability of plastic
encapsulated solid state devices with lead finishes containing Au or Pd owing to storage. The
best practise for long-duration storage is associated with a warehouse environment as
described in IEC 60721-3-1 and as required by IEC 60749-20-1.
4.10 Matte tin and other finishes
Assuming proper MSD protection for the term of storage, lead finishes not containing Au or Pd
may require tests such as solderability on aged units to confirm long-term storage integrity.
Consideration should be given to the likelihood of the creation of tin whiskers and oxide
degradation that gives rise to solderability issues. Refer to lead finish guidelines in
IEC 60749-21.
4.11 Solder ball and solder bump
Assuming proper MSD protection for the term of storage and that the solder balls or bumps
are fully reflowed, no failure mechanisms have been identified that compromise the reliability
of solder balled or bumped BGA packages stored for extended periods of time in a warehouse
environment per IEC TR 62258-3. However, if the solder balls or bumps are not reflowed but
are attached with an adhesive or a solder paste that has a lower melting point, the solder
balls or bumps shall be examined for oxide growth that could affect adhesion or solderability.
Surface analysis of the balls/bumps and solderability testing on aged units can be required to
confirm acceptance for attach of the next level of assembly after long-term storage.

– 10 – IEC 62435-2:2017 © IEC 2017
4.12 Devices containing programmable memory – flash, programmable logic and other
devices containing non-volatile memory cells
Devices that contain memory cells may contain certain locations that are factory programmed.
These may be used to contain identification information and code that the device uses during
normal component use or user programming. It is important to check that these types of
components will not lose essential data during storage which can render the component non-
functional after storage. The original component manufacturer may recommend special
storage conditions, such as temperature maxima and minima to ensure that this data is not
corrupted.
Subject to original component manufacturers’ recommendations, it is recommended that such
devices are stored in the un-programmed state. However, care should be taken to ensure that
equipment to programme the devices will also be available when the components are taken
out of storage. This may require storage of special programming equipment.
Where programmable devices are stored in the programmed state, then removal from storage
should also include a test to check that the programming is not corrupted.
5 Technical validation of the components
5.1 Purpose
The purpose of the technical validation of the components with a view to their storage is to
detect a priori the batches which do not offer proper reliability and life-time guarantees.
In designing the tests, consideration should be given to the application mission profile and the
storage mission profile.
5.2 Test selection criteria
The first thing to be taken into account to select the tests to be implemented for storing
components is to have these components previously qualified, depending on the profile of
their expected mission.
In addition, in the case of multiple-source components, the selection of the sources shall have
been validated by a method capable of evidencing "false" second sources.
The selection of the required tests and measurements will depend on the storage strategy
adopted. It can cover a range from a minimal utilization with no tests to a maximal utilization,
where all tests described in Table 1 would be performed.
As a whole, the technical validation of the components requires the following items to be
checked:
a) compliance with the visual inspection criteria;
b) solderability checking;
c) sealing/hermeticity checking (for components with hermetic packages);
d) compliance with the electrical specifications in the temperature range;
e) checking of manufacturing control (technological analysis);
f) checking the supplied batch reliability.
The criteria for sanctions and the number of tested components may vary depending on the
requirements and level of reliability, as well as the data collected from the original component
manufacturer. At the end of the technical validation, a status is established for this batch in
order to decide on its storage capability.

5.3 Measurements and tests
5.3.1 Assessment of the supplied batch reliability
All failures affecting electronic components initiate originally from a mechanism of a
mechanical, chemical, electrical type, or a combination of the three types.
Any failure mechanism, as soon as the process has started, can be accelerated by a
constraint adapted to the nature of the failure:
• temperature for chemical corrosion;
• temperature associated to a potential difference for an electrolytic migration.
The component environment varies depending on the application.
It is important to be able to estimate the impact of the constraints on the failure mechanisms
in order to determine any possible induced acceleration (for example, humidity).
Depending on the defects and efficiency expected, and according to the technical means
available as well as the affordable costs, various test methods may be used.
5.3.2 List of test methods
Table 1 describes the main test methods, the nature of the defects, the relative cost and their
efficiency, as well as the test conditions and average times.
Table 1 – List of tests
Defects Criteria/
Operation Efficiency Relative cost Remarks
concerned duration
Rapid – Packaging Good Very low Min. T = −55 °C One of the most
temperature efficient for chips
– Sealing
Max. T = +125 °C
variations (RTV) mounted with
– Electrical
aluminium
N = 500
connections
connecting wires
– Chip crack to 1 000 cycles
and power
components
– Differential
30 min/30 min
(diodes,
expansion
transistors, etc.)
High-temperature – Jitter Good Very low 125 °C or 150 °C Good method
storage power off depending on the
– Bonding
component
– Corrosion
1 000 h or
– Substrate
2 000 h
High-temperature – Bonding Good High 125 °C or 150 °C Efficient method,
storage with depending on the especially for
– Substrate
static operation component MOS technology
– Oxide films
1 000 h or
– Inversion layer
2 000 h
– Design
– Contamination
High-temperature – Bonding Very good High Generally 125 °C Very efficient
storage with or as per T method
– Substrate j
dynamic
– Oxide films 1 000 h or
operation
2 000 h
– Inversion layer
– Design
– Contamination
High-temperature – Inversion layer Good High 125 °C or 150 °C Efficient for
storage with discrete
– Contamination
1 000 h or
reverse bias components
2 000 h
– 12 – IEC 62435-2:2017 © IEC 2017
Defects Criteria/
Operation Efficiency Relative cost Remarks
concerned duration
Damp heat 85 % – Package Very good Very low 1 000 h or Efficient for non-
rH, 85 °C 2 000 h cavity packages,
– Sealings
especially plastic
– Chip crack
packages
– Differential
expansion
– Contamination
HAST Very good Very high 240 h or 500 h Very efficient for
plastic packages
High accelerated
stress test
85 % rH
polarized compo-
nents
PCT (pressure Very good High 240 h or 500 h Not
cooker test) recommended for
organic substrate
121 °C 100 % RH
packages
components
power off
Package sealing – Leakage of Very good Low For sealed
cavities package with
cavity
– Significant
with
fluorinated or
golden
– Small with
helium
Thermal stress Mounting Very good Very high T ≥ 70 °C For power
j
components
10 000 cycles
on/off
5.4 Periodic assessment
An assessment plan should be established which outlines the periodic testing regime,
including which tests should be performed and when. This should take into account the
reliability testing already performed by the manufacturer or supplier and the batch status of
the components as determined by 5.2 and Annex A.
This plan should take into account the expected deterioration mechanisms for the stored
components and the expected timescale for any deterioration to take effect, but the periodic
testing should be minimised as far as possible. The plan should justify the rationale behind
the testing regime and the expected outcome.
Where possible, periodic assessment should also be made of the local storage environment
by, for instance, taking samples of the atmosphere inside the MBB in which the components
are stored. Cabinet and storage area environmental controls are covered in IEC 62435-4 .
For each type of component stored the plan should detail:
• component type;
• relevant deterioration mechanism;
• time period for repeat testing or qualification;
• assessment method.
____________
Under preparation.
Where additional components are required to perform these tests then this shall be taken into
account when purchasing the quantity of components.

– 14 – IEC 62435-2:2017 © IEC 2017

Annex A
(normative)
Failure mechanisms – Encapsulated and non-encapsulated active components
Known failure mechanism and failure modes are referenced in Table A.1 for the purpose of risk mitigation by managing the accelerating or
excitation parameter.
Table A.1 – Failure mechanisms: encapsulated and non-encapsulated active components
Storage criticality
Family-related Non- encapsulated
Mechanism name Physical origin Failure mode Acceleration parameter (indicated by number
components components
of Ts)
1) Contamination Presence of Parametric shift E , T All components YES T
contaminants (Na)
2) Surface charges Presence of surface Parametric shift E , T All components YES T
charges in gate oxides
3) Charge inversion Induced charges Parametric shift E , T Bipolar YES T
4) Accumulation of Ionic impurity in resin Parametric shift E , T Plastic packages, YES T
surface charges components mainly
5) Charge losses Poor programming or Stored information loss T Electrically YES TTT
oxide quality programmable
components
6) Cracking of Poor oxide Isolation loss All components with YES T
T ,∆T ,E
dielectric manufacturing quality isolating oxides
7) Dielectric ESD Short circuits T , rH All bipolar components YES TTTTT
breakdown concerned
Open circuits Environment
Melting of metal or Hypersensitivity of
Leaks
Si power MOS
8) Inter-metallic growth Formation of compounds Open circuits T All components including YES T
an Au and Al contact
Au -Al favoured by
x y
contaminants
(for example, Br and Si)
Storage criticality
Family-related Non- encapsulated
Mechanism name Physical origin Failure mode Acceleration parameter (indicated by number
components components
of Ts)
9) Separation or break Mechanical stress Open circuits Plastic package NO TTT
T , ∆T , rH
(shearing) of the relieving components
connecting wires
Welding and wiring ∆T , humidity inside the TT
weaknesses package
10) Pop-corn Water absorption in the Open circuits Temperature/ Plastic package NO TTTT
encapsulation. Resin components/SMD
die bonding profile
permeability
(refer to JEDEC xxx)
11) Metal-Si interaction Metal diffusion in Si Short circuits T Bipolar integrated YES T
circuits and discrete
12) Chip corrosion Presence of an Open circuits T , rH , E Mainly plastic package YES TT
(bonding and pads) electrolyte favoured by components
Parametric shifts
contaminants
Passivation integrity
Leaks
13) Pin corrosion Presence of an Open circuits T , rH All components except NO TTTT
electrolyte, aggressive golden pins
Solderability loss Aggressive atmosphere
contaminants, nature of
the pin coatings
14) Pin oxidation Presence of oxidants, Solderability loss T All components except NO TTTT
nature of the pin coating golden pins
15) Intermediate Nature of coatings Solderability loss T All components NO TTTT
diffusion of
materials at the pins
16) Chip cracking Si defect created by a Open circuits All components YES T
∆T
manufacture (for
Parametric shifts Especially big chips
Mechanical impacts
example, sawing)
Relieving stresses
related to chip mounting
17) Hermetic package Pin feed through Hermeticity loss Sealed package NO T
∆T
cracking cracking components (mainly
Mechanical impacts
glass)
– 16 – IEC 62435-2:2017 © IEC 2017

Storage criticality
Family-related Non- encapsulated
Mechanism name Physical origin Failure mode Acceleration parameter (indicated by number
components components
of Ts)
18) Delamination Adhesion weakness Open circuits Active components, NO T
T , ∆T
(packages, chips, plastic packages
Parametric shifts
chip mounting)
Thermal and
electrical resistor
degradation. Leaks
19) Si defect Impurities, dislocations Leaks Power components for YES T
T , ∆T
the most part
Stress installation
Mechanical stress
20) Stress-voiding Mechanical stress Open circuits T Integrated circuits YES TT
induced by a stress
difference between
successive coatings
NOTE 1 At the “corrosion” level, there can be rare cases where nitrogen is not inert and may act as a reducing agent; for example, ZnO in lightning arresters.
NOTE 2 Defects related to voltage are not taken into account.
Key
E: electric field
T: temperature
∆T: temperature variation
rH: relative humidity
Bibliography
IEC 60068-2-17:1994, Basic environmental testing procedures – Part 2-17: Tests – Test Q:
Sealing
IEC 60068-2-20:2008, Environmental testing – Part 2-20: Tests – Test T: Test methods for
solderability and resistance to soldering heat of devices with leads
IEC 60410:1973, Sampling plans and procedures for inspection by attributes
IEC 60721-3-1, Classification of environmental conditions – Part 3 Classification of groups of
environmental parameters and their severities – Section 1: Storage
IEC 60721-3-3, Classification of environmental conditions – Part 3: Classification of groups of
environmental parameters and their severities – Section 3: Stationary use at weatherprotected
locations
IEC 60749-21, Semiconductor devices – Mechanical and climatic test methods – Part 21:
Solderability
IEC 61340-5-1:2007, Electrostatics – Part 5-1: Protection of electronic devices from
electrostatic phenomena – General requirements
IEC TR 61340-5-2:2007, Electrostatics – Part 5-2: Protection of electronic devices from
electrostatic phenomena – User guide
IEC 61760-4, Surface mounting technology – Part 4: Classification, packaging, labelling and
handling of moisture sensitive devices
IEC TS 61945, Integrated circuits – Manufacturing line approval – Methodology for technology
and failure analysis
IEC TR 62258-3, Semiconductor die products – Part 3: Recommendations for good practice in
handling, packing and storage
IEC TR 62380, Reliability data handbook – Universal model for reliability prediction of
electronics components, PCBs and equipment
IEC 62435-1, Electronic components – Long-term storage of electronic semiconductor devices
– Part 1: General
IEC 62435-4 , Electronic components – Long-term storage of electronic semiconductor
devices – Part 4: Storage
IEC 62435-5, Electronic components – Long-term storage of electronic semiconductor devices
– Part 5: Die and wafer devices
IEC 62435-9 , Electronic components – Long-term storage of electronic semiconductor
devices – Part 9: Special cases
EN 190 000:1995, Generic specification – Integrated monolithic circuits
____________
Under preparation.
Under preparation.
– 18 – IEC 62435-2:2017 © IEC 2017
JEDEC J-STD-033, Handling, packing, shipping and us of moisture/reflow sensitive surface
mount devices
JEDEC JESD-020, Moisture/reflow sensitivity level classification for non-hermetic surface
mount devices
JEDEC JEP160, Long-term storage for electronic semiconductor wafers, dice and devices
JEDEC JEP122, Failure mechanisms and models for semiconductor devices

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