IEC 60747-15:2024

IEC 60747-15 ®
Edition 3.0 2024-10
REDLINE VERSION
INTERNATIONAL
STANDARD
colour
inside
Semiconductor devices – Discrete devices
Part 15: Discrete devices – Isolated power semiconductor devices

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IEC 60747-15 ®
Edition 3.0 2024-10
REDLINE VERSION
INTERNATIONAL
STANDARD
colour
inside
Semiconductor devices – Discrete devices
Part 15: Discrete devices – Isolated power semiconductor devices
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 31.080.99 ISBN 978-2-8322-9946-3
– 2 – IEC 60747-15:2024 RLV © IEC 2024
CONTENTS
FOREWORD . 5
1 Scope . 7
2 Normative references. 7
3 Terms and definitions . 8
4 Letter symbols . 9
4.1 General . 9
4.2 Additional subscripts/symbols . 9
4.3 List of letter symbols . 9
4.3.1 Voltages and currents . 9
4.3.2 Mechanical symbols . 10
4.3.3 Other symbols . 10
5 Essential ratings (limiting values) and characteristics . 10
5.1 General . 10
5.2 Ratings (limiting values) . 10
5.2.1 Isolation voltage or isolation test voltage (V ) . 10
isol
5.2.2 Peak case non-rupture current (I or I ) (where appropriate) . 10
RSMC CNR
5.2.3 Terminal current (I ) (where appropriate) . 11
tRMS
5.2.4 Total power dissipation (P ) .
tot
5.2.4 Temperatures . 11
5.2.5 Mechanical ratings . 11
5.2.6 Climatic ratings (where appropriate) . 12
5.3 Characteristics . 12
5.3.1 Mechanical characteristics . 12
5.3.2 Parasitic inductance (L ) . 12
p
5.3.3 Parasitic capacitances (C ) . 12
p
5.3.4 Partial discharge inception voltage (V or V ) (where
iM i(RMS)
appropriate) . 13
5.3.5 Partial discharge extinction voltage (V or V ) (where

eM e(RMS)
appropriate) . 13
5.3.6 Thermal resistances . 13
5.3.7 Transient thermal impedance (Z ) . 13
th
6 Measurement methods . 14
6.1 Verification of isolation voltage rating . 14
6.1.1 Verification of isolation voltage rating between terminals and base plate
(V ) . 14
isol
6.1.2 Verification of isolation voltage rating between temperature sensor and
terminals (V ) . 15
isol1
6.2 Methods of measurement . 16
6.2.1 Partial discharge inception and extinction voltages (V ) (V ) . 16
i e
6.2.2 Parasitic inductance (L ) . 16
p
6.2.3 Parasitic capacitance terminal to case (C ) . 18
p
6.2.4 Thermal characteristics . 19
7 Acceptance and reliability . 23
7.1 General requirements . 23

7.2 List of endurance tests . 23
7.3 Acceptance defining criteria . 24
7.4 Type tests and routine tests . 24
7.4.1 Type tests . 24
7.4.2 Routine tests. 25
Annex A (informative) Test method of peak case non-rupture current . 26
A.1 Purpose . 26
A.2 Circuit diagram . 26
A.3 Test procedure . 29
A.4 Post test measurements and criteria . 29
A.5 Specified conditions . 29
Annex B (informative) Measuring method of the thickness of thermal compound paste . 31
B.1 General . 31
B.2 Measuring method . 31
Annex C (informative) Intelligent power semiconductor modules (IPMs) . 32
C.1 General . 32
C.2 Control terminals of IPM . 32
C.3 Essential ratings (limiting value) and characteristics . 33
C.3.1 General . 33
C.3.2 Ratings (limiting value) and testing method . 33
C.3.3 Characteristics and measuring method . 38
Bibliography . 61

Figure 1 – Basic circuit diagram for isolation breakdown withstand voltage test ("high
pot test") with V . 14
isol
Figure 2 – Basic circuit diagram for isolation voltage test between temperature sensor
and terminals (V ) . 15
isol1
Figure 3 – Circuit diagram for measurement of parasitic inductances (L ) . 17
p
Figure 4 – Wave forms . 18
Figure 5 – Circuit diagram for measurement of parasitic capacitance (C ) . 19
p
Figure 6 – Cross-section of an isolated power device with reference points for
temperature measurement of T and T . 20
c s
Figure A.1 – Circuit diagram for test of peak case non-rupture current . 28
Figure B.1 – Example of a measuring gauge for a layer of thermal compound paste of
a thickness between 5 µm and 150 µm . 31
Figure C.1 – Example of internal circuit configuration block diagram of IPM . 32
Figure C.2 – Testing circuit for supply voltage, input voltage / input signal voltage, and

fault output voltage / alarm signal voltage . 34
Figure C.3 – Testing circuit for fault output current / alarm signal current . 35
Figure C.4 – Testing circuit for main circuit DC bus voltage at short circuit . 37
Figure C.5 – Waveforms of short circuit protection function . 38
Figure C.6 – Measurement circuit for switching times and switching energy at inductive
load (lower arm device measurement) . 39
Figure C.7 – Switching waveforms at inductive load . 40
Figure C.8 – Measurement circuit for control circuit current . 43
Figure C.9 – Measurement circuit for input threshold voltage . 44

– 4 – IEC 60747-15:2024 RLV © IEC 2024
Figure C.10 – Measuring circuit for over current protection level/short circuit trip level . 46
Figure C.11 – Waveforms during over current protection / short circuit protection . 47
Figure C.12 – Measurement circuit for over current protection delay time/Short circuit
current delay time . 49
Figure C.13 – Waveforms of protection delay time during over current protection / short
circuit protection . 50
Figure C.14 – Measurement circuit for over temperature protection and its hysteresis . 52
Figure C.15 – Waveforms during the overheating protection operation and the fault
output . 54
Figure C.16 – Waveforms during the under-voltage protection operation and the fault
output . 55
Figure C.17 – Measurement circuit for fault output current . 56
Figure C
...