IEC 62386-102:2014

IEC 62386-102 ®
Edition 2.1 2018-09
CONSOLIDATED VERSION
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Digital addressable lighting interface –
Part 102: General requirements – Control gear

Interface d’éclairage adressable numérique –
Partie 102: Exigences générales – Appareillages de commande

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IEC 62386-102 ®
Edition 2.1 2018-09
CONSOLIDATED VERSION
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Digital addressable lighting interface –
Part 102: General requirements – Control gear
Interface d’éclairage adressable numérique –
Partie 102: Exigences générales – Appareillages de commande

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 29.140.50; 29.140.99 ISBN 978-2-8322-5316-8

IEC 62386-102 ®
Edition 2.1 2018-09
CONSOLIDATED VERSION
REDLINE VERSION
VERSION REDLINE
colour
inside
Digital addressable lighting interface –
Part 102: General requirements – Control gear

Interface d’éclairage adressable numérique –
Partie 102: Exigences générales – Appareillages de commande

– 2 – IEC 62386-102:2014+AMD1:2018 CSV

© IEC 2018
CONTENTS
FOREWORD. 9

INTRODUCTION . 11

1 Scope . 13

2 Normative references . 13

3 Terms and definitions . 13

4 General . 16

4.1 General . 16
4.2 Version number . 16
5 Electrical specification . 17
6 Interface power supply . 17
7 Transmission protocol structure . 17
7.1 General . 17
7.2 16 bit forward frame encoding . 17
7.2.1 General . 17
7.2.2 Address byte . 17
7.2.3 Opcode byte . 18
8 Timing . 18
9 Method of operation . 18
9.1 General . 18
9.2 Control gear . 18
9.2.1 General . 18
9.2.2 Control gear phases . 18
9.3 Dimming curve . 19
9.4 Calculating “targetLevel” . 22
9.5 Fading . 22
9.5.1 General . 22
9.5.2 Fade time . 23
9.5.3 Fade rate . 25
9.5.4 Extended fade time . 26
9.5.5 Using the fade time . 28
9.5.6 Using the fade rate. 28

9.5.7 Behaviour System response to changes during a fade . 29
9.5.8 Behaviour System response to changes during standby and startup . 29
9.5.9 Stopping a fade . 29
9.6 Min and max level . 29
9.7 Commands . 30
9.7.1 General . 30
9.7.2 Level instructions without fade . 31
9.7.3 Level instructions initiating a fade . 31
9.7.4 Configuration instructions . 31
9.7.5 Queries . 31
9.7.6 Special commands . 31
9.7.7 Application extended commands . 31
9.8 Command iterations . 31
9.8.1 General . 31

© IEC 2018
9.8.2 Command iteration of “UP” and “DOWN” commands . 32

9.8.3 DAPC SEQUENCE (deprecated) . 33

9.9 Modes of operation . 33

9.9.1 General . 33

9.9.2 Operating mode 0x00: standard mode . 33

9.9.3 Operating mode 0x01 to 0x7F: reserved . 33

9.9.4 Operating mode 0x80 to 0xFF: manufacturer specific modes . 33

9.10 Memory banks . 34

9.10.1 General . 34

9.10.2 Memory map . 34
9.10.3 Selecting a memory bank location . 35
9.10.4 Memory bank reading . 35
9.10.5 Memory bank writing . 35
9.10.6 Memory bank 0 . 36
9.10.7 Memory bank 1 . 38
9.10.8 Manufacturer specific memory banks . 40
9.10.9 Reserved memory banks . 40
9.11 Reset . 40
9.11.1 Reset operation . 40
9.11.2 Reset memory bank operation . 40
9.12 System failure . 40
9.13 Power on . 41
9.14 Assigning short addresses . 42
9.14.1 General . 42
9.14.2 Random address allocation . 42
9.14.3 Identification of a device . 43
9.14.4 Direct address allocation . 44
9.15 Failure state behaviour . 44
9.16 Status information . 44
9.16.1 General . 44
9.16.2 Bit 0: Control gear failure . 44
9.16.3 Bit 1: lamp failure . 45
9.16.4 Bit 2: lamp on . 47
9.16.5 Bit 3: limit error . 47
9.16.6 Bit 4: fade running . 47

9.16.7 Bit 5: reset state . 47
9.16.8 Bit 6: missing short address . 47
9.16.9 Bit 7: power cycle seen . 47
9.17 Non-volatile memory . 48
9.18 Device types and features . 48
9.19 Using scenes . 49
10 Declaration of variables . 50
11 Definition of commands . 52
11.1 General . 52
11.2 Overview sheets . 52
11.3 Level instructions . 57
11.3.1 DAPC (level) . 57
11.3.2 OFF . 57
11.3.3 UP . 57

– 4 – IEC 62386-102:2014+AMD1:2018 CSV

© IEC 2018
11.3.4 DOWN . 57

11.3.5 STEP UP . 57

11.3.6 STEP DOWN . 58

11.3.7 RECALL MAX LEVEL . 58

11.3.8 RECALL MIN LEVEL . 58

11.3.9 STEP DOWN AND OFF . 59

11.3.10 ON AND STEP UP . 59

11.3.11 ENABLE DAPC SEQUENCE . 59

11.3.12 GO TO LAST ACTIVE LEVEL . 60

11.3.14 CONTINUOUS UP . 60
11.3.15 CONTINUOUS DOWN . 60
11.3.13 GO TO SCENE (sceneNumber) . 60
11.4 Configuration instructions . 60
11.4.1 General . 60
11.4.2 RESET . 61
11.4.3 STORE ACTUAL LEVEL IN DTR0 . 61
11.4.4 SAVE PERSISTENT VARIABLES . 61
11.4.5 SET OPERATING MODE (DTR0) . 61
11.4.6 RESET MEMORY BANK (DTR0) . 61
11.4.7 IDENTIFY DEVICE . 62
11.4.8 SET MAX LEVEL (DTR0) . 62
11.4.9 SET MIN LEVEL (DTR0) . 63
11.4.10 SET SYSTEM FAILURE LEVEL (DTR0) . 63
11.4.11 SET POWER ON LEVEL (DTR0) . 63
11.4.12 SET FADE TIME (DTR0) . 63
11.4.13 SET FADE RATE (DTR0) . 63
11.4.14 SET EXTENDED FADE TIME (DTR0) . 64
11.4.15 SET SCENE (DTR0, sceneX) . 64
11.4.16 REMOVE FROM SCENE (sceneX) . 64
11.4.17 ADD TO GROUP (group) . 64
11.4.18 REMOVE FROM GROUP (group) . 65
11.4.19 SET SHORT ADDRESS (DTR0) . 65
11.4.20 ENABLE WRITE MEMORY . 65
11.5 Queries . 65
11.5.1 General . 65

11.5.2 QUERY STATUS. 65
11.5.3 QUERY CONTROL GEAR PRESENT . 65
11.5.4 QUERY CONTROL GEAR FAILURE . 65
11.5.5 QUERY LAMP FAILURE . 66
11.5.6 QUERY LAMP POWER ON . 66
11.5.7 QUERY LIMIT ERROR . 66
11.5.8 QUERY RESET STATE . 66
11.5.9 QUERY MISSING SHORT ADDRESS . 66
11.5.10 QUERY VERSION NUMBER . 66
11.5.11 QUERY CONTENT DTR0 . 66
11.5.12 QUERY DEVICE TYPE . 66
11.5.13 QUERY NEXT DEVICE TYPE . 66
11.5.14 QUERY PHYSICAL MINIMUM . 67
11.5.15 QUERY POWER FAILURE . 67

© IEC 2018
11.5.16 QUERY CONTENT DTR1 . 67

11.5.17 QUERY CONTENT DTR2 . 67

11.5.18 QUERY OPERATING MODE . 67

11.5.19 QUERY LIGHT SOURCE TYPE . 67

11.5.20 QUERY ACTUAL LEVEL . 68

11.5.21 QUERY MAX LEVEL . 68

11.5.22 QUERY MIN LEVEL . 68

11.5.23 QUERY POWER ON LEVEL . 68

11.5.24 QUERY SYSTEM FAILURE LEVEL . 69

11.5.25 QUERY FADE TIME/FADE RATE . 69
11.5.26 QUERY EXTENDED FADE TIME . 69
11.5.27 QUERY MANUFACTURER SPECIFIC MODE . 69
11.5.28 QUERY SCENE LEVEL (sceneX) . 69
11.5.29 QUERY GROUPS 0-7 . 69
11.5.30 QUERY GROUPS 8-15 . 69
11.5.31 QUERY RANDOM ADDRESS (H) . 69
11.5.32 QUERY RANDOM ADDRESS (M) . 70
11.5.33 QUERY RANDOM ADDRESS (L) . 70
11.5.34 READ MEMORY LOCATION (DTR1, DTR0) . 70
11.6 Application extended commands. 70
11.6.1 General . 70
11.6.2 QUERY EXTENDED VERSION NUMBER . 70
11.7 Special commands . 71
11.7.1 General . 71
11.7.2 TERMINATE . 71
11.7.3 DTR0 (data) . 71
11.7.4 INITIALISE (device) . 71
11.7.5 RANDOMISE . 71
11.7.6 COMPARE . 72
11.7.7 WITHDRAW . 72
11.7.8 SEARCHADDRH (data) . 72
11.7.9 SEARCHADDRM (data) . 72
11.7.10 SEARCHADDRL (data) . 73
11.7.11 PROGRAM SHORT ADDRESS (data) . 73
11.7.12 VERIFY SHORT ADDRESS (data) . 73

11.7.13 QUERY SHORT ADDRESS . 73
11.7.14 ENABLE DEVICE TYPE (data) . 73
11.7.15 DTR1 (data) . 74
11.7.16 DTR2 (data) . 74
11.7.17 WRITE MEMORY LOCATION (DTR1, DTR0, data) . 74
11.7.18 WRITE MEMORY LOCATION – NO REPLY (DTR1, DTR0, data) . 75
11.7.19 PING . 75
12 Test procedures . 75
Void
Annex A (informative) Examples of algorithms . 288
A.1 Random address allocation . 288
A.2 One single control gear connected to the control device . 288
A.3 Using application extended commands . 289
Annex B (normative) High resolution dimmer . 290

– 6 – IEC 62386-102:2014+AMD1:2018 CSV

© IEC 2018
Bibliography . 292

Figure 1 – IEC 62386 graphical overview . 11

Figure 2 – Control gear directly operating a light source . 18

Figure 3 – Dimming curve . 20

Figure 4 – Level over time, fading up and down . 23

Figure 5 – Timing and response when receiving a executing command iteration . 32

Figure 6 – Fading from MIN LEVEL to MAX LEVEL .

Figure 7 – Fading from MAX LEVEL to off .
Figure 8 – Normal fading for a PWM dimmer .
Figure 9 – Fading from MAX LEVEL to off for a PWM dimmer .
Figure 10 – Current rating test .
Figure 11 – Correlation between “lampFailure”, “lampOn”, and “fadeRunning” bits . 46
Figure B.1 – Level behaviour in cases of off-grid starting points . 131

Table 1 – 16-bit command frame encoding . 17
Table 2 – Dimming curve tolerance (%, rounded to two decimals) . 20
Table 3 – Dimming curve . 21
Table 4 – Fade times . 24
Table 5 – Fade rates . 26
Table 6 – Extended fade time – base value . 27
Table 7 – Extended fade time – multiplier . 27
Table 8 – Basic memory map of memory banks . 34
Table 9 – Memory map of memory bank 0 . 37
Table 10 – Memory map of memory bank 1 . 39
Table 11 – Power on timing . 42
Table 12 – Control gear status . 44
Table 13 – Scenes . 49
Table 14 – Declaration of variables . 50
Table 15 – Standard commands . 52
Table 16 – Special commands. 56

Table 17 – Light source type encoding . 68
Table 18 – Device addressing with “INITIALISE” . 71
Table 19 – Unexpected outcome .
Table 20 – Parameters for test sequence CheckFactoryDefault102 .
Table 21 – Parameters for test sequence CheckFactoryDefault201 .
Table 22 – Parameters for test sequence CheckFactoryDefault202 .
Table 23 – Parameters for test sequence CheckFactoryDefault203 .
Table 24 – Parameters for test sequence CheckFactoryDefault204 .
Table 25 – Parameters for test sequence CheckFactoryDefault205 .
Table 26 – Parameters for test sequence CheckFactoryDefault206 .
Table 27 – Parameters for test sequence CheckFactoryDefault207 .
Table 28 – Parameters for test sequence CheckFactoryDefault208 .

© IEC 2018
Table 29 – Parameters for test sequence CheckFactoryDefault209 .

Table 30 – Parameters for test sequence Maximum and minimum system voltage .

Table 31 – Parameters for test sequence Transmitter voltages .

Table 32 – Parameters for test sequence Transmitter rising and falling edges .

Table 33 – Parameters for test sequence Transmitter rising and falling edges .

Table 34 – Parameters for test sequence Transmitter bit timing .

Table 35 – Parameters for test sequence Receiver frame timing .

Table 36 – Parameters for test sequence Receiver start-up behavior .

Table 37 – Parameters for test sequence Receiver bit timing .
Table 38 – Parameters for test sequence Extended receiver bit timing .
Table 39 – Parameters for test sequence Receiver frame violation and recovering after
frame size violation .
Table 40 – Parameters for test sequence Receiver frame timing .
Table 41 – Parameters for test sequence RESET .
Table 42 – Parameters for test sequence Send twice timeout .
Table 43 – Parameters for test sequence Commands in-between .
Table 44 – Parameters for test sequence SET MAX LEVEL .
Table 45 – Parameters for test sequence SET MIN LEVEL .
Table 46 – Parameters for test sequence SET SYSTEM FAILURE LEVEL .
Table 47 – Parameters for test sequence SET POWER ON LEVEL .
Table 48 – Parameters for test sequence SET FADE TIME .
Table 49 – Parameters for test sequence SET FADE RATE .
Table 50 – Parameters for test sequence SET SCENE / REMOVE FROM SCENE .
Table 51 – Parameters for test sequence ADD TO GROUP / REMOVE FROM GROUP .
Table 52 – Parameters for test sequence SET SHORT ADDRESS .
Table 53 – Parameters for test sequence SET EXTENDED FADE TIME .
Table 54 – Parameters for test sequence Reset/Power-on values .
Table 55 – Parameters for test sequence DTR0 / DTR1 / DTR2 .
Table 56 – Parameters for test sequence READ MEMORY LOCATION on Memory
Bank 0 .
Table 57 – Parameters for test sequence READ MEMORY LOCATION on Memory
Bank 1 .

Table 58 – Parameters for test sequence Memory bank writing .
Table 59 – Parameters for test sequence ENABLE WRITE MEMORY: writeEnableState .
Table 60 – Parameters for test sequence ENABLE WRITE MEMORY: timeout /
command in-between .
Table 61 – Parameters for test sequence RESET MEMORY BANK: timeout / command
in-between .
Table 62 – Parameters for test sequence RESET MEMORY BANK .
Table 63 – Parameters for test sequence Level instructions: Basic behaviour.
Table 64 – Parameters for test sequence FADE TIME: possible values .
Table 65 – Parameters for test sequence FADE TIME: transitions .
Table 66 – Parameters for test sequence FADE TIME: fading to 0 .
Table 67 – Parameters for test sequence FADE TIME: small steps fading .
Table 68 – Parameters for test sequence FADE TIME: extended fade time .

– 8 – IEC 62386-102:2014+AMD1:2018 CSV

© IEC 2018
Table 69 – Parameters for test sequence FADE RATE: possible values .

Table 70 – Parameters for test sequence FADE RATE: possible values .

Table 71 – Parameters for test sequence FADE RATE: transitions .

Table 72 – Parameters for test sequence FADE RATE: extended fade time .

Table 73 – Parameters for test sequence FADE TIME/FADE RATE: stop fading by

setting MIN/MAX levels .

Table 74 – Parameters for test sequence FADE TIME/FADE RATE: stop fading .

Table 75 – Parameters for test sequence FADE TIME/FADE RATE: stop fading when a

command is sent, check timing .

Table 76 – Parameters for test sequence FADE TIME/FADE RATE: stop fading during
startup .
Table 77 – Parameters for test sequence Level instructions: combined instructions .
Table 78 – Parameters for test sequence PowerOnLevel and SystemFailureLevel .
Table 79 – Parameters for test sequence ENABLE DAPC SEQUENCE .
Table 80 – Parameters for test sequence GO TO LAST ACTIVE LEVEL .
Table 81 – Parameters for test sequence GO TO SCENE .
Table 82 – Parameters for test sequence Power on: level control commands .
Table 83 – Parameters for test sequence Logarithmic dimming curve .
Table 84 – Parameters for test sequence Dimming curve: DAPC .
Table 85 – Parameters for test sequence FADE TIME/EXTENDED FADE TIME: light
output behaviour .
Table 86 – Parameters for test sequence Behaviour during a fade .
Table 87 – Parameters for test sequence INITIALISE – device addressing .
Table 88 – Parameters for test sequence COMPARE .
Table 89 – Parameters for test sequence WITHDRAW .
Table 90 – Parameters for test sequence PROGRAM SHORT ADDRESS .
Table 91 – Parameters for test sequence VERIFY SHORT ADDRESS .
Table 92 – Parameters for test sequence QUERY SHORT ADDRESS .
Table 93 – Parameters for test sequence IDENTIFY DEVICE .
Table 94 – Parameters for test sequence IDENTIFY DEVICE THROUGH RECALL
MIN/MAX LEVEL .
Table 95 – Parameters for test sequence QUERY STATUS – lampFailure/lampOn .

Table 96 – Parameters for test sequence QUERY STATUS – lampOn .
Table 97 – Parameters for test sequence QUERY STATUS – limitError/lampOn .
Table 98 – Parameters for test sequence QUERY STATUS – powerCycleSeen .
Table 99 – Parameters for test sequence QUERY CONTROL GEAR PRESENT .
Table 100 – Parameters for test sequence Broadcast unaddressed .
Table 101 – Parameters for test sequence Reserved commands: standard commands .
Table 102 – Parameters for test sequence Reserved commands: special commands .
Table 103 – Parameters for test sequence Addressing 2 .

© IEC 2018
INTERNATIONAL ELECTROTECHNICAL COMMISSION

____________
DIGITAL ADDRESSABLE LIGHTING INTERFACE –

Part 102: General requirements –

Control gear
FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
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