EN 62326-20:2016

SLOVENSKI STANDARD
01-julij-2016
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Printed boards - Part 20: Printed circuit board for high-brightness LEDs
Ta slovenski standard je istoveten z: EN 62326-20:2016
ICS:
31.180 7LVNDQDYH]MD7,9LQWLVNDQH Printed circuits and boards
SORãþH
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

EUROPEAN STANDARD EN 62326-20

NORME EUROPÉENNE
EUROPÄISCHE NORM
May 2016
ICS 31.180
English Version
Printed boards - Part 20: Printed circuit boards for high-
brightness LEDs
(IEC 62326-20:2016)
Cartes imprimées - Partie 20: Cartes de circuits imprimés Leiterplatten - Teil 20: Elektronische Leiterplatte für
destinées aux LED à haute luminosité Hochleistungs-LEDs
(IEC 62326-20:2016) (IEC 62326-20:2016)
This European Standard was approved by CENELEC on 2016-03-09. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia,
Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland,
Turkey and the United Kingdom.

European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Avenue Marnix 17, B-1000 Brussels
© 2016 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
Ref. No. EN 62326-20:2016 E
European foreword
The text of document 91/1311/FDIS, future edition 1 of IEC 62326-20, prepared by
IEC/TC 91 "Electronics assembly technology" was submitted to the IEC-CENELEC parallel vote and
approved by CENELEC as EN 62326-20:2016.

The following dates are fixed:
(dop) 2016-12-09
• latest date by which the document has to be
implemented at national level by
publication of an identical national
standard or by endorsement
• latest date by which the national (dow) 2019-03-09
standards conflicting with the
document have to be withdrawn
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC [and/or CEN] shall not be held responsible for identifying any or all such
patent rights.
Endorsement notice
The text of the International Standard IEC 62326-20:2016 was approved by CENELEC as a European
Standard without any modification.
In the official version, for Bibliography, the following notes have to be added for the standards indicated:

IEC 60068-1 NOTE Harmonized as EN 60068-1.
IEC 60068-2-1 NOTE Harmonized as EN 60068-2-1.
IEC 60068-2-2 NOTE Harmonized as EN 60068-2-2.
IEC 60068-2-6 NOTE Harmonized as EN 60068-2-6.
IEC 60068-2-20 NOTE Harmonized as EN 60068-2-20.
IEC 60068-2-21 NOTE Harmonized as EN 60068-2-21.
IEC 60068-2-30 NOTE Harmonized as EN 60068-2-30.
IEC 60068-2-38 NOTE Harmonized as EN 60068-2-38.
IEC 60068-2-53 NOTE Harmonized as EN 60068-2-53.
IEC 60068-2-58 NOTE Harmonized as EN 60068-2-58.
IEC 60068-2-64 NOTE Harmonized as EN 60068-2-64.
IEC 60068-2-66 NOTE Harmonized as EN 60068-2-66.
IEC 60068-2-78 NOTE Harmonized as EN 60068-2-78.
IEC 60068-2-80 NOTE Harmonized as EN 60068-2-80.
IEC 61189-1 NOTE Harmonized as EN 61189-1.
IEC 61189-2 NOTE Harmonized as EN 61189-2.
IEC 61189-11 NOTE Harmonized as EN 61189-11.
IEC 61189-3-913 NOTE Harmonized as EN 61189-3-913.
IEC 61190-1-1 NOTE Harmonized as EN 61190-1-1.
IEC 61190-1-2 NOTE Harmonized as EN 61190-1-2.
IEC 61190-1-3 NOTE Harmonized as EN 61190-1-3.
IEC 61249-2-8 NOTE Harmonized as EN 61249-2-8.
IEC 62137-1-3 NOTE Harmonized as EN 62137-1-3.
IEC 62137-1-4 NOTE Harmonized as EN 62137-1-4.
IEC 62326-1 NOTE Harmonized as EN 62326-1.
IEC 62326-4 NOTE Harmonized as EN 62326-4.
ISO 291 NOTE Harmonized as EN ISO 291.
ISO 2409 NOTE Harmonized as EN ISO 2409.
ISO 3599 NOTE Harmonized as EN ISO 3599.
ISO 3611 NOTE Harmonized as EN ISO 3611.
ISO 4957 NOTE Harmonized as EN ISO 4957.
ISO 291 NOTE Harmonized as EN ISO 291.
ISO 6906 NOTE Harmonized as EN ISO 6906.
ISO 8512-1 NOTE Harmonized as EN ISO 8512-1.
ISO 8512-2 NOTE Harmonized as EN ISO 8512-2.
ISO 9445-1 NOTE Harmonized as EN ISO 9445-1.
ISO 9453 NOTE Harmonized as EN ISO 9453.
ISO 9454-1 NOTE Harmonized as EN ISO 9454-1.
ISO 9455 (series) NOTE Harmonized as EN ISO 9455 (series).
ISO 13385-1 NOTE Harmonized as EN ISO 13385-1.
ISO 15184 NOTE Harmonized as EN ISO 15184.

Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications
The following documents, in whole or in part, are normatively referenced in this document and are
indispensable for its application. For dated references, only the edition cited applies. For undated
references, the latest edition of the referenced document (including any amendments) applies.
NOTE 1 When an International Publication has been modified by common modifications, indicated by (mod), the relevant

EN/HD applies.
NOTE 2 Up-to-date information on the latest versions of the European Standards listed in this annex is available here:
www.cenelec.eu.
Publication Year Title EN/HD Year
IEC 60194 -  Printed board design, manufacture and EN 60194 -
assembly - Terms and definitions
IEC 61189-3 2007 Test methods for electrical materials, EN 61189-3 2008
printed boards and other interconnection
structures and assemblies -- Part 3: Test
methods for interconnection structures
(printed boards)
IEC 61249-2-6 -  Materials for printed boards and other EN 61249-2-6 -
interconnecting structures -- Part 2-6:
Reinforced base materials, clad and unclad
- Brominated epoxide non-woven/woven E-
glass reinforced laminated sheets of
defined flammability (vertical burning test),
copper-clad
IEC 61249-2-7 -  Materials for printed boards and other EN 61249-2-7 -
interconnecting structures -- Part 2-7:
Reinforced base materials, clad and unclad
- Epoxide woven E-glass laminated sheet
of defined flammability (vertical burning
test), copper-clad
IEC 62878-1-1 -  Device embedded substrate - Generic EN 62878-1-1 -
specification - Test method
IEC 62326-20 ®
Edition 1.0 2016-02
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Printed boards –
Part 20: Printed circuit boards for high-brightness LEDs

Cartes imprimées –
Partie 20: Cartes de circuits imprimés destinées aux LED à haute luminosité

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.180 ISBN 978-2-8322-3152-4

– 2 – IEC 62326-20:2016 © IEC 2016
CONTENTS
FOREWORD . 6
1 Scope . 8
2 Normative references. 8
3 Terms, definitions and abbreviations . 8
3.1 Terms and definitions . 8
3.2 Abbreviations . 8
4 Classification and class of the printed circuit board for high-brightness LEDs . 9
5 Design rules and allowance . 10
5.1 Panel and board sizes . 10
5.1.1 Board size . 10
5.1.2 Allowance of dimensions . 11
5.1.3 Perforation and slit . 11
5.1.4 V-cut . 12
5.2 Total board thickness . 13
5.3 Holes . 14
5.3.1 Insertion holes and vias . 14
5.3.2 Datum hole . 16
5.3.3 Assembly hole (a through-hole without wall plating) . 16
5.4 Conductor . 17
5.4.1 Width of conductor pattern and its allowance . 17
5.4.2 Distance between conductors and its allowance . 17
5.4.3 Thickness of the insulating layer . 18
5.5 Printed contact . 18
5.5.1 Allowance of the distance between the centers of two adjacent printed
contacts . 18
5.5.2 Allowance of the terminal width of printed contacts . 19
5.5.3 Shift of the center of printed contacts on front and back sides of a board . 19
5.6 Land pattern . 20
5.6.1 Allowance of the distance between the centers of two lands . 20
5.6.2 Allowance of the width of a land . 20
5.6.3 Land diameter and its allowance for BGA/CSP . 21
5.7 Fiducial mark and mark for component positioning . 22
5.7.1 Typical form and size of the fiducial mark . 22
5.7.2 Dimensional allowance of fiducial mark and component positioning mark . 23
5.7.3 Position allowance of the component positioning mark . 23
5.8 Interlayer connection – Copper plating . 23
6 Quality . 24
6.1 Gap between conductor and the wall of a component insertion hole or a via . 24
6.2 Positional deviation between conductor layers of a multilayer board . 24
6.3 Minimum land width . 24
6.4 Surface treatment . 25
6.4.1 Gold plating for printed contact . 25
6.4.2 Other surface treatment . 26
6.5 Defects of solder resist . 26
6.6 Symbol mark . 28
6.6.1 General . 28

IEC 62326-20:2016 © IEC 2016 – 3 –
6.6.2 Conductor surface . 28
6.6.3 Between conductors . 28
6.6.4 Defects within insulating layers . 29
6.6.5 Routing and drilling . 30
6.6.6 Conductor pattern . 30
6.7 Land . 30
6.8 Land of a land pattern . 31
6.9 Defects in a land for BGA/CSP mounting . 32
6.10 Printed contact . 32
7 Performance and test methods . 34
7.1 Resistance of conductors . 34
7.2 Current proof of conductor and plated through hole . 35
7.3 Observation of component mountings and vias . 36
7.3.1 Observation with standard conditions . 36
7.3.2 Observation after thermal shock test . 38
8 Marking, packaging and storage . 39
8.1 Marking on a product . 39
8.2 Marking on the package . 39
8.3 Packaging and storage . 40
8.3.1 Packaging . 40
8.3.2 Storage . 40
Annex A (informative) Classification and class of the PCB for high-brightness LEDs . 41
Bibliography . 46

Figure 1 – Example of a classification and its application . 10
Figure 2 – Board arrangement in a panel . 11
Figure 3 – Distances from the datum point to perforation and slit . 12
Figure 4 – Distance from the datum point to the V-cut . 12
Figure 5 – Allowance of position off-set of V-cuts on front and back surfaces . 13
Figure 6 – PWB board with symbol mark, solder resist, copper foil and plating . 13
Figure 7 – Positions of component insertion holes . 15
Figure 8 – Distance between the wall of a hole and the board edge . 15
Figure 9 – Wall of a hole and the minimum designed spacing to the inner conductor . 16
Figure 10 – Width of finished conductor . 17
Figure 11 – Distance between conductor and board edge . 18
Figure 12 – Thickness of the insulating layer . 18
Figure 13 – Distance between centers of terminals of printed contacts . 19
Figure 14 – Terminal width of a printed contact . 19
Figure 15 – Shift of the center of printed contacts on front and back sides of a board . 20
Figure 16 – Land pattern . 20
Figure 17 – Land width of a land pattern . 21
Figure 18 – Land diameter of BGA/CSP formed of a conductor only . 21
Figure 19 – Land diameter (d) of BGA/CSP formed at the opening of solder resist . 22
Figure 20 – Examples of fiducial mark and component positioning mark . 23
Figure 21 – Minimum land width . 25

– 4 – IEC 62326-20:2016 © IEC 2016
Figure 22 – Exposure of conductor . 26
Figure 23 – Minimum land with caused by the shift of solder resist . 27
Figure 24 – Overlap, smear and shift of solder resist . 27
Figure 25 – Examples of smear or blur . 28
Figure 26 – Example of measling . 29
Figure 27 – Examples of crazing . 29
Figure 28 – Conductor nicks. 30
Figure 29 – Conductor residue . 30
Figure 30 – Land . 31
Figure 31 – Defects in a land of a land pattern. 31
Figure 32 – Defects in BGA/CSP mounting lands . 32
Figure 33 – Areas to be checked for defects of a printed contact . 33
Figure 34 – Defects in a printed contact . 33
Figure 35 – Relations between resistance and width, thickness and temperature of a
conductor . 35
Figure 36 – Relationship between current, conductor width and thickness and
temperature rise . 36
Figure 37 – Defect on a plating of a component hole . 37
Figure 38 – Resin smear . 38
Figure 39 – Corner crack . 38
Figure 40 – Barrel crack . 39
Figure 41 – Foil crack . 39
Figure A.1 – Relation between thermal conductive parameter and heat transfer
coefficient parameter . 42

Table 1 – Application and classification . 9
Table 2 – Panel dimensions . 11
Table 3 – Allowance of dimensions . 11
Table 4 – Allowance of the distances from the datum point to perforation and slit . 12
Table 5 – Allowance of the distance from the datum point to the center of the V-cut . 13
Table 6 – Total thickness and its allowance . 14
Table 7 – Allowance of holes for component insertion . 14
Table 8 – Position allowance of component insertion holes . 15
Table 9 – Distance between the wall of a hole and board edge . 16
Table 10 – Minimum clearance between the wall of a hole and the inner layer
conductor . 16
Table 11 – Allowance of conductor width . 17
Table 12 – Allowance of the distance between conductors . 18
Table 13 – Allowance of terminal width of a printed contact . 19
Table 14 – Allowance of terminal width of a printed contact . 20
Table 15 – Allowance of the width of a land of a land pattern . 21
Table 16 – Land diameter and its allowance for BGA/CSP . 22
Table 17 – Allowance of the land diameter (d) of BGA/CSP formed at the opening of
solder resist . 22

IEC 62326-20:2016 © IEC 2016 – 5 –
Table 18 – Shapes and sizes of typical fiducial marks and component positioning
marks . 23
Table 19 – Minimum thickness of copper plating . 23
Table 20 – Minimum thickness of copper plating . 24
Table 21 – Minimum land width . 27
Table 22 – Overlap, smear and shift of solder resist over a fool print . 28
Table 23 – Allowance of the area of a defect, remaining width and protrusion of a land . 31
Table 24 – Defect of a land of a land pattern . 32
Table 25 – Defects in BGA/CSP mounting lands . 32
Table 26 – Defects in a printed contact . 34
Table 27 – Specification and test methods of resistance of conductors . 34
Table 28 – Specification and test methods of current proof . 35
Table 29 – Allowance in horizontal sectioning . 38
Table A.1 – Relation between thermal conductive parameter and heat transfer
coefficient parameter . 42
Table A.2 – Related test methods . 43

– 6 – IEC 62326-20:2016 © IEC 2016
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
PRINTED BOARDS –
Part 20: Printed circuit boards for high-brightness LEDs

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 62326-20 has been prepared by IEC technical committee 91:
Electronics assembly technology.
This first edition cancels and replaces the IEC/PAS 62326-20 published in 2011, and
constitutes a technical revision.
This edition includes the following significant technical changes with respect to the previous
edition:
a) this edition focuses on the technical content of the printed circuit board for high-brightness
LEDs;
b) the figures related to the printed circuit board for high-brightness LEDs have been refined.

IEC 62326-20:2016 © IEC 2016 – 7 –
The text of this standard is based on the following documents:
FDIS Report on voting
91/1311/FDIS 91/1330/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
A list of all parts in the IEC 62326 series, published under the general title Printed boards,
can be found on the IEC website.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
The committee has decided that the contents of this publication will remain unchanged until
the stability date indicated on the IEC website under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
IMPORTANT – The 'colour inside' logo on the cover page of this publication indicates
that it contains colours which are considered to be useful for the correct
understanding of its contents. Users should therefore print this document using a
colour printer.
– 8 – IEC 62326-20:2016 © IEC 2016
PRINTED BOARDS –
Part 20: Printed circuit boards for high-brightness LEDs

1 Scope
This part of IEC 62326 specifies the properties of the printed circuit board (hereafter
described as PCB) for high-brightness LEDs. Many aspects of the PCB for high-brightness
LEDs are identical with those of ordinary PCBs, therefore, some aspects of this standard also
describe general aspects.
2 Normative references
The following documents, in whole or in part, are normatively referenced in this document and
are indispensable for its application. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any
amendments) applies.
IEC 60194, Printed board design, manufacture and assembly – Terms and definitions
IEC 61189-3:2007, Test methods for electrical materials, printed boards and other
interconnection structures and assemblies – Part 3: Test methods for interconnection
structures (printed boards)
IEC 61249-2-6, Materials for printed boards and other interconnecting structures – Part 2-6:
Reinforced base materials, clad and unclad – Brominated epoxide non-woven/woven E-glass
reinforced laminated sheets of defined flammability (vertical burning test), copper-clad
IEC 61249-2-7, Materials for printed boards and other interconnecting structures – Part 2-7:
Reinforced base materials clad and unclad – Epoxide woven E-glass laminated sheet of
defined flammability (vertical burning test), copper-clad
IEC 62878-1-1, Device embedded substrate – Part 1-1: Generic specification – Test
methods
3 Terms, definitions and abbreviations
3.1 Terms and definitions
For the purposes of this document, the terms and definitions given in IEC 60194 apply.
3.2 Abbreviations
AABUS As Agreed Between User amd Supplier
BGA Ball Grid Array
CCL Copper Clad Laminate
COB Chip On Board
CSP Chip size package
HID High Intensity Discharge
LED Light Emitting Diode
PCB Printed Circuit Board
IEC 62326-20:2016 © IEC 2016 – 9 –
PWB Printed Wiring Board
4 Classification and class of the printed circuit board for high-brightness
LEDs
The PCB for high-brightness LEDs specified in this standard shall satisfy the specifications A
to C in Table 1 and Figure 1 in the following way. The materials used in the materials of PWB
are not specified, however, they shall be agreed between user and supplier (hereafter
referred to as AABUS) depending on the application area of the boards in question. Figure 1
gives an example of classification and their application by base materials, for printed circuit
boards for high-brightness LEDs and final products.
Table 1 – Application and classification
Primary Secondary
Thermal
classification classification Heat transfer Thermal
Definition Definition conductivity
(thermal (insulation parameter impedance
parameter
conductivity) property)
2 2
W/(mK) W/(m K) (Km /W)
No
I
specification
Electric
strength
II
Standard
A <1 <10
boards <1 000 V
Electric
strength
III
≥1 000 V
No
Thermal
I
specification
impedance can
be calculated
Electric
from the
strength
Thermal
II
measurement
B conductive ≥1 <10
<1,000 V
of thermal
boards
conductivity
Electric
and the inverse
strength
heat transfer
III
parameter.
≥1 000 V
No
I
specification
Electric
strength
High thermal
II
C conductive ≥1 ≥10
<1 000 V
boards
Electric
strength
III
≥1 000 V
– 10 – IEC 62326-20:2016 © IEC 2016
Heat radiation A B C
Resin type substrate
Resin type substrate
IEC 60249-2-6 and
(with thermal via)
IEC 60249-2-7 (CEM-3, FR-4)
High thermal conductive
Flexible type substrate
Classification by
resin substrate
Metal core substrate
base materials
Metal base substrate
Ceramic type substrate
Conventional substrate for discrete type electronic components mounted boards
Classification by
Substrate for semiconductor package
printed circuit boards
Substrate for Chip on Board
Lamp for assistant lighting
Substitution for halogen lamp
Substitution for
fluorescent lamp
Classification by
final products
Substitution for filament lamp
Street lamp
Substitution for HID
Insulation class
I II III I II III I II III
IEC
Figure 1 – Example of a classification and its application
5 Design rules and allowance
5.1 Panel and board sizes
5.1.1 Board size
NOTE Indications on board size are added for reference only.
The size of the board of the product (a × b) illustrated in Figure 2.
should be selected so that the boards can be arranged efficiently within a panel with a size as
specified in Table 2. These dimensions are given for information only. Or, a proper panel with
a size given in Table 2 shall be selected so as to satisfy the required efficient arrangement of
the boards.
IEC 62326-20:2016 © IEC 2016 – 11 –
Printed board
Panel
e
c b b c
3 4
IEC
Key
Board size of the product: a × b
Space between board and panel edges: c , c , c , c
1 2 3 4
Space between boards: e , e
1 2
Figure 2 – Board arrangement in a panel
Table 2 – Panel dimensions
Division
Size of a CCL
panel
4 6 8 9
1 000 × 1 000 500 × 500 333 × 500 250 × 500 333 × 333
333 × 600
1 000 × 1 200 500 × 600 300 × 500 333 × 400
400 × 500
Dimensions are in millimetres.

5.1.2 Allowance of dimensions
The allowance of dimensions of a board or a panel is given in Table 3.
Table 3 – Allowance of dimensions
Length
Allowance
mm
≤100 ±0,2 mm
Add 0,1 mm for each 50 mm exceeding a length of 100 mm.
>100
5.1.3 Perforation and slit
The perforation and slits are shown in Figure 3. The allowances of the distances from the
datum point to the center of the cut of the perforation and slit is given in Table 4.
a a
c e c
2 2 1
– 12 – IEC 62326-20:2016 © IEC 2016
Outline of the
printed board
Perforation
Slit
f
Datum point
f
IEC
Figure 3 – Distances from the datum point to perforation and slit
Table 4 – Allowance of the distances from
the datum point to perforation and slit
Distances from the datum
point to perforation and slit Allowance
mm
≤100 ±0,2 mm
Add 0,1 mm for each 50 mm
>100
beyond a length of 100 mm.
5.1.4 V-cut
The V-cut is shown in Figure 4 and Figure 5. The allowance of the distance from the reference
datum to the center of the V-cut (g to g ) is given in Table 5. The allowance of the deviation

1 4
of the position of the V-cut on the front and back planes is 0,2 mm, and the allowance of the
uncut thickness of the board is the sum of the allowance of the board thickness ±0,1 mm.
Outline of the
printed board
V-cut
g
Datum point
g
IEC
Figure 4 – Distance from the datum point to the V-cut
f
g
g
f
IEC 62326-20:2016 © IEC 2016 – 13 –
Center of the V-cut
i
(front surface)
Base material
Center of the V-cut
(back surface)
IEC
Figure 5 – Allowance of position off-set of V-cuts on front and back surfaces
Table 5 – Allowance of the distance from the datum point to the center of the V-cut
Distance from the datum point
to the center of the V-cut Allowance
mm
≤100 ±0,2 mm
Add 0,1 mm for each 50 mm exceeding a
>100
length over 100 mm
5.2 Total board thickness
The allowance of the total board thickness (t) and symbol marks as shown in Figure 6 is given
in Table 6.
Solder resist
Legend
Plating
Copper foil
IEC
Figure 6 – PWB board with symbol mark, solder resist, copper foil and plating
t
t
– 14 – IEC 62326-20:2016 © IEC 2016
Table 6 – Total thickness and its allowance
Total thickness Allowance
(center value of the final board)
t
+0,10
0,3 ≤ t < 0,5
–0,05
0,5 ≤ t < 0,8 ±0,10
0,8 ≤ t < 1,10 ±0,15
1,10 ≤ t < 1,40 ±0,17
1,40 ≤ t < 2,00 ±0,19
t ≥ 2,00 ±10 %
Dimensions are in millimetres.

5.3 Holes
5.3.1 Insertion holes and vias
The following applies to insertion holes and vias for components.
a) Allowance of component insertion holes
The allowance of component insertion holes is given in Table 7. The allowance given in
this table is not applicable to vias (through-hole vias, buried vias and blind vias). The
allowance of through-holes with a diameter less than 0,6 mm for insertion of a component
and holes for press-fit of a component is to be AABUS.
Table 7 – Allowance of holes for component insertion
Item Allowance
0,6 ≤ t < 2,0 ±0,10
Plated through-hole
t ≥ 2,0
±0,15
Non-plated through-hole ±0,10
Dimensions are in millimetres.

b) Position of a hole for component insertion
The center of a hole for component insertion should be at the cross point of the grid for
pattern design including the complementary grid lines used. The allowance of a
→
component insertion hole position, ( ), the deviation from the designed position with
j
respect to the datum point as shown in Figure 7, is given in Table 8.

IEC 62326-20:2016 © IEC 2016 – 15 –
→
| j |
Finished hole
Designed hole position
Quasi datum point
Datum point
(X, Y)
(0,0)
X
Datum line
Outline of the printed board
IEC
Figure 7 – Positions of component insertion holes
Table 8 – Position allowance of component insertion holes
Longer dimension of rectangular board
Allowance
mm
≤400 0,10 mm
For a board exceeding 400 mm, add 0,05 mm for each
>400
additional 100 mm.
c) Distance from the board edge to the wall of a hole
The distance from the board edge to the wall of a hole (d) is shown in Figure 8. The
distance (d) between the walls of a through-hole before plating and of a hole for
component insertion shall be larger than 1,0 mm. The distance for a press-fit hole shall be
in accordance with Table 9.
Hole
Printed board
d
d
d
t
IEC
Figure 8 – Distance between the wall of a hole and the board edge
d
Y
– 16 – IEC 62326-20:2016 © IEC 2016
Table 9 – Distance between the wall of a hole and board edge
Item Distance (j) between a component hole before plating and the via wall (d)
HDI PWB ≤1,0 mm and also longer than the board thickness (t)
Standard PWB
≤1,5 mm and also longer than the board thickness (t)

d) Minimum clearance between the wall of a hole and the inner conductor
The minimum clearance between the wall of a hole and the inner conductor (k) as
illustrated in Figure 9 shall be 0,325 mm in accordance with Table 10. If the distance
0,325 mm is guaranteed in the design of the pattern, the minimum separation is
guaranteed.
Table 10 – Minimum clearance between the wall of a hole
and the inner layer conductor
Minimum clearance between hole wall
and the inner layer conductor (k)
Item
mm
Standard value Minimum value
Component hole 0,5
HDI PWB 0,25
Via 0,30
Component hole 0,5
Standard PWB 0,30
Via 0,35
Base material
Copper foil
k k
Through hole plating
IEC
Figure 9 – Wall of a hole and the minimum designed
spacing to the inner conductor
5.3.2 Datum hole
+0,10
The allowance of a datum hole shall be ±0,05 mm, or mm. A through hole without wall
−0,00
plating shall be used as a datum hole.
5.3.3 Assembly hole (a through-hole without wall plating)
The following requirements apply.
a) Allowance of an assembly hole
The allowance of an assembly hole shall be ±0,10 mm.
b) Allowance of the position of an assembly hole
The allowance of the position of an assembly hole shall be in accordance with Table 8 of
5.3.1 b).
IEC 62326-20:2016 © IEC 2016 – 17 –
c) Distance between an assembly hole and the board edge
The distance between an assembly hole and the board edge shall be larger than 2,0 mm.
In case the distance is less than 2,0 mm, the distance shall be agreed between user and
supplier.
d) The distance between an assembly hole and the inner conductor
The distance between the wall of an assembly hole and the inner conductor shall be larger
than 1,0 mm.
5.4 Conductor
5.4.1 Width of conductor pattern and its allowance
The allowance of the formed conductor width (w), as illustrated in Figure 10, shall be in
accordance with the allowances as given on Table 11. The allowance of the finished
conductor pattern specifically designed for impedance control shall be AABUS.
Table 11 – Allowance of conductor width
Conductor width for
Conductor thickness (t) Allowance
reference
50 ≤ t < 75 15 to 20
±25
75 ≤ t < 100 ±30 20 to 40
100 ≤ t < 300 ±50 30 to 50
t ≥ 300 ±100 40 to 70
±150
Thick copper foil circuits ±200 105
±300 140
The conductor thickness is the copper foil thickness plus the thickness of plated
copper.
Dimensions are in micrometres.

Conductor
w w
Base material
IEC
Figure 10 – Width of finished conductor
5.4.2 Distance between conductors and its allowance
The distance between the conductor and board edge is illustrated in Figure 11. The allowance
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