SIST EN 62751-2:2014/A1:2020

SLOVENSKI STANDARD
SIST EN 62751-2:2014/oprA1:2018
01-april-2018
8JRWDYOMDQMHL]JXEPRþLYQDSHWRVWQLKSUHWYRUQLãNLKYHQWLOLK]DYLVRNRQDSHWRVWQH
HQRVPHUQHVLVWHPHGHO0RGXODUQLYHþQLYRMVNLSUHWYRUQLNL
Power losses in voltage sourced converter (VSC) valves for high-voltage direct current
(HVDC) systems - Part 2: Modular multilevel converters
Bestimmung der Leistungsverluste in Spannungszwischenkreis-Stromrichtern (VSC) für
Hochspannungsgleichstrom(HGÜ)-Systeme - Teil 2: Modulare Mehrpunkt-Stromrichter
Pertes de puissance dans les valves à convertisseur de source de tension (VSC) des
systèmes en courant continu à haute tension (CCHT) - Partie 2: Convertisseurs
multiniveaux modulaires
Ta slovenski standard je istoveten z: EN 62751-2:2014/prA1:2018
ICS:
29.200 8VPHUQLNL3UHWYRUQLNL Rectifiers. Convertors.
6WDELOL]LUDQRHOHNWULþQR Stabilized power supply
QDSDMDQMH
29.240.01 2PUHåMD]DSUHQRVLQ Power transmission and
GLVWULEXFLMRHOHNWULþQHHQHUJLMH distribution networks in
QDVSORãQR general
SIST EN 62751-2:2014/oprA1:2018 en,fr,de
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

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SIST EN 62751-2:2014/oprA1:2018

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SIST EN 62751-2:2014/oprA1:2018
22F/479/CDV

COMMITTEE DRAFT FOR VOTE (CDV)
PROJECT NUMBER:
IEC 62751-2/AMD1 ED1
DATE OF CIRCULATION: CLOSING DATE FOR VOTING:
2018-02-02 2018-04-27
SUPERSEDES DOCUMENTS:
22F/454/CD,22F/462/CC

IEC SC 22F : POWER ELECTRONICS FOR ELECTRICAL TRANSMISSION AND DISTRIBUTION SYSTEMS
SECRETARIAT: SECRETARY:
Russian Federation Mr Lev Travin
OF INTEREST TO THE FOLLOWING COMMITTEES: PROPOSED HORIZONTAL STANDARD:

TC 115
Other TC/SCs are requested to indicate their interest, if any,
in this CDV to the secretary.
FUNCTIONS CONCERNED:

EMC ENVIRONMENT QUALITY ASSURANCE SAFETY
SUBMITTED FOR CENELEC PARALLEL VOTING NOT SUBMITTED FOR CENELEC PARALLEL VOTING
Attention IEC-CENELEC parallel voting
The attention of IEC National Committees, members of
CENELEC, is drawn to the fact that this Committee Draft for
Vote (CDV) is submitted for parallel voting.
The CENELEC members are invited to vote through the
CENELEC online voting system.

This document is still under study and subject to change. It should not be used for reference purposes.
Recipients of this document are invited to submit, with their comments, notification of any relevant patent rights of which they
are aware and to provide supporting documentation.

TITLE:
Power losses in voltage sourced converter (VSC) valves for high-voltage direct current (HVDC) systems -
Part 2: Modular multilevel converters

PROPOSED STABILITY DATE: 2025

NOTE FROM TC/SC OFFICERS:
This document is circulated as a CDV in accordance with the decision taken at SC 22F meeting held in Xi'an,
China, on October 23-24, 2017 (see 22F/472/RM, Item 9, Decision 2017-07, Action 2017-04). The Working Draft
of the Amendment was developed by SC 22F Maintenance Team 31 (convenor Mr. Colin Davidson, Great
Britain).

Copyright © 2018 International Electrotechnical Commission, IEC. All rights reserved. It is permitted to download this
electronic file, to make a copy and to print out the content for the sole purpose of preparing National Committee positions.
You may not copy or "mirror" the file or printed version of the document, or any part of it, for any other purpose without
permission in writing from IEC.

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SIST EN 62751-2:2014/oprA1:2018
62751-2/Ed1/A1/CDV © IEC (E)              - 2 -                           22F/479/CDV

1 FOREWORD
2 This amendment has been prepared by subcommittee 22F: Power electronics for electrical
3 transmission and distribution systems, of IEC technical committee 22: Power electronic
4 systems and equipment.
5 The text of this amendment is based on the following documents:
FDIS Report on voting
22F/xxx/FDIS 22F/xxx/RVD
6
7 Full information on the voting for the approval of this amendment can be found in the report
8 on voting indicated in the above table.
9 The committee has decided that the contents of this amendment and the base publication will
10 remain unchanged until the stability date indicated on the IEC web site under
11 "http://webstore.iec.ch" in the data related to the specific publication. At this date, the
12 publication will be
13 • reconfirmed,
14 • withdrawn,
15 • replaced by a revised edition, or
16 • amended.
17
18
19
20
21
22
23
24
25
26
27
28

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SIST EN 62751-2:2014/oprA1:2018
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29 3  Terms, definitions, symbols and abbreviated terms
30 3.1.11
31 no-load operating state
32 Add note:
33 NOTE: In the no-load state, in principle no switching should occur as the valve is blocked. However in some
34 designs it may be necessary to make occasional switching operations to balance voltages between different parts
35 of the converter. Here some losses may occur and need to be accounted for.
36 4 General conditions
37 4.1 General
38 Replace the abbreviation “CTLC” by “CTL”.
39 Replace “IEC TR 62543” by “IEC/TR 62543”.
40 4.2 Principles for loss determination
41 Add to the end of the first paragraph:
42 The manufacturer shall justify, in the loss calculation report, how the uncertainties have been
43 considered.
44 Replace the last two sentences of the third paragraph by:
45 In practice this measurement would require the use of state-of-the-art measurement
46 equipment that rivals the best equipment available at national metrology institutes. To date,
47 although some industry/academic partnership projects have demonstrated prototypes of
48 measurement equipment claiming sufficient accuracy, there is little industry experience with
49 using such equipment on site. The feasibility of using laboratory measurements on VSC
50 valves to support a more accurate determination of valve losses is now under study in CIGRÉ
51 WG B4-75.
52 4.4 Loss calculation method
53 Replace the first sentence of the second paragraph by:
54 An important requirement for such simulations is an accurate modelling of the system under
55 investigation.
56 4.5.2 Input data for numerical simulations
57 Replace the last item of the bulleted list by:
58 - For calculating converter valve currents and MMC building block capacitor currents,
59 which are the basis for the calculation of corresponding losses, it is sufficient to use a
60 simplified model in which the on-state and switching characteristics of the IGBTs and
61 diodes are represented by worst-case characteristics applicable to their maximum
62 rated junction temperature.
63 - For the detailed calculation of losses, the simulation shall also consider the junction
64 temperature dependent semiconductor properties, such as on-state voltages,
65 switching and recovery losses. These properties are based on the characterisation
66 testing as described in IEC 62751-1:2014, 4.4.2. The steady-state junction
67 temperatures of the semiconductors are calculated iteratively for the relevant
68 operating point to derive the semiconductor losses.
69 4.5.3 Input data coming from numerical simulations
70 Add, after the last sentence:
71 The mean and rms currents in IGBTs and diodes are not required if conduction losses in
72 IGBTs and diodes are calculated using polynomials as discussed in 5.1.

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SIST EN 62751-2:2014/oprA1:2018
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73 4.5.4 Converter station data
74 Change the sixth bullet point of the list to read:
75 number of VSC levels per cell (for CTL designs);
76 Add new sub-clause:
77 4.6 Contents and structure of valve loss determination report
78 The manufacturer or bidder shall prepare and submit to the purchaser a detailed report
79 explaining how the losses in the VSC valves have been determined and including a
80 breakdown of the valve losses into the constituent parts P to P for each operating
V1 V9
81 condition at which losses are required to be guaranteed.
82 At the bid stage, and (where requested in the contract) after contract award but before the
83 manufacturing of valve components, the report shall document the assumptions used in
84 arriving at the calculated value of losses. After manufacturing, the report shall document the
85 actual values of test data derived from characterisation tests and routine tests on components.
86 Although a breakdown of the valve losses into the constituent parts P to P is requested,
V1 V9
87 only the total valve losses P shall be subject to financial evaluation.
VT
88 A recommended list of data to be included in the report is presented in Annex B,
89 5  Conduction losses
90 5.1 General
91 Add at the end of 5.1:
92 To simplify the process of mathematically analysing conduction losses, the on-state voltage of
93 IGBTs and diodes is usually represented as a piecewise-linear approximation with a threshold
94 voltage V and a slope resistance R , as shown on Figure 2 of IEC 62751-1.
0 0
95 It is possible to obtain greater accuracy by using a more exact model of the device on-state
96 voltage (for example, using a polynomial function to represent the on-state voltage) rather
97 than the piecewise linear approximation, and then performing a direct numerical integration.
98 However, the piecewise-linear approximation is preferred because it simplifies the calculation
99 process, allows greater transparency and still permits good accuracy to be obtained, provided
100 the measurements used to derive the piecewise-linear approximation are made at appropriate
101 values of current. Therefore it is recommended that V and R are determined by measuring
0 0
102 on-state voltage at 100 % and 33 % of the device rated current and performing a linear
103 extrapolation.
104 In the event that the purchaser prefers to use the more accurate method using a polynomial
105 function then this shall be clearly stated in the purchasing specification and all bidders are
106 expected to calculate power losses in a comparable way.
107 5.2 IGBT conduction loss
108 Replace all text and equations (2) – (5) after explanations of values for equation (1) by:
109 By means of numerical simulation the currents shall be calculated for the IGBTs T1 and T2 for
110 each MMC building block, respectively:
t (2)
i
1
111 I = ⋅ i (t)⋅ dt
T1av T1
∫
t
i
0
t (3)
i
1
112 I = ⋅ i (t)⋅ dt
T2av T2
∫
t
i
0

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SIST EN 62751-2:2014/oprA1:2018
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t (4)
i
1
2
113 I = ⋅ i (t) ⋅ dt
T1rms T1
∫
t
i 0
t (5)
i
1
2
114 I = ⋅ i (t) ⋅ dt
T2rms T2
∫
t
i
0
115 where
116 t is the integration time used in the simulation;
i
117 t shall not be less than 1 s.
i
118 If different IGBT types are used for T1 and T2, corresponding values for threshold voltages
119 and slope resistances shall be used accordingly.
120 5.3 Diode conduction losses
121 Replace all text and equations (7) – (10) after explanations of values for equation (6) by:
122 By means of numerical simulation the currents shall be calculated for the diodes D1 and D2
123 for each MMC building block, respectively:
t
i
1
124                            I = ⋅ i (t)⋅ dt                        (7)
D1av D1
∫
t
i
0
t
i
1
125                           I = ⋅ i (t)⋅ dt                        (8)
D2av D2
∫
t
i
0
t
i
1
2
126                                                (9)
I = ⋅ i (t) ⋅ dt
D1rms D1
∫
t
i
0
t
i
1
2
127                                               (10)
I = ⋅ i (t) ⋅ dt
D2rms D2
∫
t
i
0
128 where
129 t is the integration time used in the simulation;
i
130 t shall not be less than 1 s.
i
131 If different diode types are used for D1 and D2, corresponding values for threshold voltages
132 and slope resistances shall be used accordingly.
133 5.4 Other conduction losses
134 Replace the second sentence of the first paragraph by:
135 For modular multi-level converters this mainly consists of interconnecting busbars. Losses in
136 valve reactors shall be considered separately from valve losses and calculated using the
137 principles defined for AC filter reactors in IEC 61803.
138 9 Other losses
139 9.1 Snubber circuit losses
140 Replace the note by the following, and include it in the main text:

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SIST EN 62751-2:2014/oprA1:2018
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141 Including a snubber parallel to a VSC valve level influences the turn-on/turn-off behaviour of
142 the IGBT/diode which means that the snubber circuits shall be correctly represented during
143 the characterisation tests on the semiconductor devices.
144 9.2.1 General
145 Replace the first sentence of the fourth paragraph by:
146 The power consumption of each valve electronics unit should be determined by direct
147 measurement on a sample of real valve electronics units under representative switching
148 conditions (voltage, current, switching frequency etc). Tests shall be performed on a
149 minimum quantity of valve electronics units equivalent to five submodules or 10 VSC valve
150 levels (for the CTL design).
151 Annex A: Description of power loss mechanisms in MMC valves
152 A.1 Introduction to MMC Converter topology
153 Figure A.2
154 Replace “VSC valve leve” by “VSC valve level”.
155 Figure A.3
156 Replace “I ” by “I ”.
L C
157 A.2.1  Simplified analysis with voltage and current in phase
158 Figure A.4
159 Replace “I G ” by “I × ”.
L C
160 Replace “I /3+I × ≈ I ” by “I /3+ I × ≈ I ”
d L dc d C  dc
161 A.2.3  Effects of third harmonic injection
162 Figure A.6
163 Replace “I ” by “I ”.
L C
164 A.3.1 Description of conduction paths
165 Figure A.9
166 Replace the existing title of Figure 9
167 Typical patterns of conduction for inverter operation (left) and rectifier operation (right)
168 by a new title:
169 Typical patterns of conduction for inverter operation (left) and rectifier operation (right), based
170 on the submodule configuration of Figure A.7 (a).
171 Figure A.10
172 Replace “I ” by “I ”.
L C
173 Replace the first sentence in paragraph 5 from the end of subclause A.3.1:
174 All series connected MMC building blocks will be stressed with the same switching events, but
175 at different occasions.
176 by the following sentence
177 Although different MMC building blocks in the valve experience switching events at different
178 times, on average the stress is the same on all series-connected MMC building blocks in the
179 valve.

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SIST EN 62751-2:2014/oprA1:2018
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180 A.3.2.1 Approximate analytical solution
181 Replace the existing text of A.3.2.1 by the following text:
182 It will be noted from Figure A.8 that at any time there is always one, and only one, current
183 path conducting in
...