Low-voltage surge protective devices - Part 03: SPD Testing Guide

IEC TR 61643-03:2024 applies to SPD testing in accordance with the IEC 61643-x1 series and for SPD coordination and system level immunity purposes.
It aims to provide guidance and helpful information for correct test execution and accurate interpretation of measurement results. It is also intended to further enhance repeatability and comparability throughout different test laboratories and to establish an acceptable accuracy level for the test results obtained.
The main subjects are: Test application, Test arrangement/setup, Probe application, SPD coordination testing, and System level immunity testing

General Information

Status
Published
Publication Date
04-Jul-2024
Current Stage
PPUB - Publication issued
Start Date
05-Jan-2024
Completion Date
05-Jul-2024
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IEC TR 61643-03:2024 - Low-voltage surge protective devices - Part 03: SPD Testing Guide Released:7/5/2024 Isbn:9782832279991
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IEC TR 61643-03 ®
Edition 1.0 2024-07
TECHNICAL
REPORT
Low-voltage surge protective devices –
Part 03: SPD testing guide
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IEC TR 61643-03 ®
Edition 1.0 2024-07
TECHNICAL
REPORT
Low-voltage surge protective devices –

Part 03: SPD testing guide
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 29.240.01; 29.240.10 ISBN 978-2-8322-7999-1

– 2 – IEC TR 61643-03:2024 © IEC 2024
CONTENTS
FOREWORD . 5
INTRODUCTION . 7
1 Scope . 8
2 Normative references . 8
3 Terms and definitions . 9
4 Correspondence between this document and the tests in IEC 61643-x1 . 9
5 Probe application – residual voltage measurements . 9
5.1 Overview. 9
5.2 General . 9
5.3 Guidance for the test arrangement . 14
5.3.1 General . 14
5.3.2 Method 1: Voltage probe placed at a certain distance . 14
5.3.3 Method 2: Minimized loop of measurement lines . 16
5.3.4 Combination of method 1 and method 2 for pigtail connections . 17
6 Insulation resistance and dielectric withstand . 19
6.1 General . 19
6.2 Surfaces which are touchable after installation as for normal use are as
follows: . 19
6.3 Surfaces on which the SPD can be mounted or it can be in contact with
metal surfaces: . 20
6.4 Conclusions: . 21
6.5 Example of a test-set-up to measure the Insulation Resistance according to
9.3.7 and the Dielectric Withstand according to 9.3.8 of IEC 61643-01:— . 22
7 TOV testing . 23
7.1 TOV testing of SPDs for AC power systems . 23
7.2 TOV testing of SPDs for DC power systems . 26
8 Test application to SPDs with multiple components . 27
8.1 General . 27
8.2 Example of a multiple series spark gap with resistive/capacitive trigger
control . 28
8.3 Example of a series spark gap with resistive/capacitive trigger control and
with a parallel connected series connection of GDT + MOV(s) . 28
8.4 Example of a 3-electrode GDT with parallel MOV bypass/trigger control . 29
8.5 Example of a 4-electrode spark gap with GDT + MOV trigger control . 30
8.6 Example of a GDT with parallel connected series connection of GDT + MOV . 30
8.7 Example of a 3-electrode spark gap with trigger transformer . 31
9 SPD coordination testing . 32
9.1 Energy coordination . 32
9.2 Let-through energy (LTE) method . 32
9.2.1 General . 32
9.2.2 Method . 34
9.3 Energy and voltage protection coordination method . 35
9.3.1 General . 35
9.3.2 Coordination criteria . 35
9.3.3 Coordination techniques . 36
9.3.4 Coordination test . 36
10 System level immunity testing . 40

10.1 General . 40
10.2 SPD discharge current test under normal service conditions: . 40
10.3 Induction test due to lightning currents: . 40
10.4 Recommended test classification of system level immunity (following
IEC 61000-4-5): . 40
Annex A (informative) Critical investigation on the impulse current specification for T1
SPDs when testing Metal Oxide Varistors . 42
A.1 History and background . 42
A.2 General information . 42
A.3 Test program and instructions . 43
A.3.1 Detailed instructions . 43
A.4 Details and results of interlaboratory comparison tests . 44
A.4.1 Single disc results . 45
A.4.2 Double block results . 46
A.5 Conclusions from interlaboratory test results . 47
A.6 Further investigations and comparison tests in CTI . 47
A.6.1 Examples. 48
A.6.2 Overview single disc results. 49
A.6.3 Overview double block results . 49
A.7 Final conclusions . 49
Annex B (informative) Illustration of the terms mode of protection, current path and

current branch . 51
B.1 Examples of SPDs with one single mode of protection . 51
B.2 Examples of multimode SPDs . 52
Bibliography . 55

Figure 1 – 8/20 current impulse and induced voltage . 10
Figure 2 – Test arrangement A . 11
Figure 3 – Test arrangement B . 12
Figure 4 – Test arrangement C . 13
Figure 5 – Measured voltages of test arrangements A, B and C during 8/20 current

application . 13
Figure 6 – Routing of the measurement lines of an SPD having a single mode of
protection . 15
Figure 7 – Wrong routings of the measurement lines . 15
Figure 8 – Routing of the measurement lines of a multimode SPD, example 1 . 16
Figure 9 – Routing of the measurement lines of a multimode SPD, example 2 . 16
Figure 10 – Example for the application of method 2 at an SPD having a single mode
of protection. 17
Figure 11 – Example for the application of method 1 and method 2 where the SPD is
provided with pigtail connections . 18
Figure 12 – Wrong routings of the pigtails together with the measurement lines where
the SPD is provided with pigtail connections . 18
Figure 13 – Examples of a three-phase and single-phase test setup for use in testing
SPDs for application in TT systems under TOVs caused by faults in the high (medium)

voltage system . 24
Figure 14 – Example of a three-phase test setup for use in testing SPDs for use in IT
systems under TOVs caused by faults in the high (medium) voltage system . 25
Figure 15 – Vector diagram for the voltages in the test setup in Figure 14 . 26

– 4 – IEC TR 61643-03:2024 © IEC 2024
Figure 16 – Example of a test setup for use in testing SPDs intended to be connected
to a DC system, which is derived from an AC TT system without separation, under
TOVs caused by faults in the high (medium) voltage system . 27
Figure 17 – Example of a test setup for use in testing SPDs intended to be connected
to a DC TT system, which is derived from another earthed DC system, under TOVs
caused by faults in the high (medium) voltage system . 27
Figure 18 – multiple series spark gap with resistive /capacitive trigger control . 28
Figure 19 – series spark gap with capacitive trigger control . 29
Figure 20 – 3-electrode GDT with
...

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