IEC PAS 62050:2004
(Main)Board level drop test method of components for handheld electronic products
Board level drop test method of components for handheld electronic products
The Board Level Drop Test Method is intended to evaluate and compare drop performance of surface mount electronic components for handheld electronic product applications in an accelerated test environment, where excessive flexure of a circuit board causes product failure. The purpose is to standardize the test board and test methodology to provide a reproducible assessment of the drop test performance of surface mounted components while duplicating the failure modes normally observed during product level test. The purpose of this document is to prescribe a standardized test method and reporting procedure.
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PAS 62050
SPECIFICATION
First edition
2004-11
Board level drop test method
of components for handheld
electronic products
Reference number
IEC/PAS 62050:2004(E)
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JEDEC
STANDARD
Board Level Drop Test Method of
Components for Handheld Electronic
Products
JESD22-B111
JULY 2003
JEDEC SOLID STATE TECHNOLOGY ASSOCIATION
PAS 62050 © IEC:2004 (E)
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
BOARD LEVEL DROP TEST METHOD OF COMPONENTS
FOR HANDHELD ELECTRONIC PRODUCTS
FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all
national electrotechnical committees (IEC National Committees). The object of IEC is to promote international co-
operation on all questions concerning standardization in the electrical and electronic fields. To this end and in
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A PAS is a technical specification not fulfilling the requirements for a standard but made available
to the public.
IEC-PAS 62050 was submitted by JEDEC and has been processed by IEC technical committee
47: Semiconductor devices.
The text of this PAS is based on the This PAS was approved for
following document: publication by the P-members of the
committee concerned as indicated in
the following document
Draft PAS Report on voting
47/1753/NP 47/1791/RVN
Following publication of this PAS, the technical committee or subcommittee concerned will
investigate the possibility of transforming the PAS into an International Standard
An IEC-PAS licence of copyright and assignment of copyright has been signed by the IEC and
JEDEC and is recorded at the Central Office.
This PAS shall remain valid for an initial maximum period of three years starting from
2004-11. The validity may be extended for a single three-year period, following which it shall be
revised to become another type of normative document or shall be withdrawn.
Page i
JEDEC Standard No. 22-B111
BOARD LEVEL DROP TEST METHOD OF COMPONENTS
FOR HANDHELD ELECTRONIC PRODUCTS
Introduction
The handheld electronic products fit into the consumer and portable market segments. Included in the
handheld electronic products are cameras, calculators, cell phones, pagers, palm size PCs, Personal
Computer Memory Card International Association (PCMCIA) cards, smart cards, mobile phones,
personal digital assistants (PDAs) and other electronic products that can be conveniently stored in a
pocket and used while held in user’s hand.
These handheld electronic products are more prone to being dropped during their useful service life
because of their size and weight. This dropping event can not only cause mechanical failures in the
housing of the device but also create electrical failures in the printed circuit board (PCB) assemblies
mounted inside the housing due to transfer of energy through PCB supports. The electrical failures may
result from various failure modes such as cracking of circuit board, trace cracking on the board, cracking
of solder interconnections between the components and the board, and the component cracks. The
primary driver of these failures is excessive flexing of circuit board due to input acceleration to the board
created from dropping the handheld electronic product. This flexing of the board causes relative motion
between the board and the components mounted on it, resulting in component, interconnects, or board
failures. The failure is a strong function of the combination of the board design, construction, material,
thickness, and surface finish; interconnect material and standoff height; and component size.
Page ii
JEDEC Standard No. 22-B111
Page 1
BOARD LEVEL DROP TEST METHOD OF COMPONENTS
FOR HANDHELD ELECTRONIC PRODUCTS
(From JEDEC Board Ballot JCB-03-38, formulated under the cognizance of the JC-14.1 Subcommittee
on Reliability Test Methods for Packaged Devices)
1 Scope
The Board Level Drop Test Method is intended to evaluate and compare drop performance of surface
mount electronic components for handheld electronic product applications in an accelerated test
environment, where excessive flexure of a circuit board causes product failure. The purpose is to
standardize the test board and test methodology to provide a reproducible assessment of the drop test
performance of surface mounted components while duplicating the failure modes normally observed
during product level test.
The purpose of this document is to prescribe a standardized test method and reporting procedure. This is
not a component qualification test and is not meant to replace any system level drop test that maybe
needed to qualify a specific handheld electronic product. The standard is not meant to cover the drop test
required to simulate shipping and handling related shock of electronic components or PCB assemblies.
These requirements are already addressed in JESD22-B104-B and JESD22-B110. The method is
applicable to both area-array and perimeter-leaded surface mounted packages.
Correlation between test and field conditions is not yet fully established. Consequently, the test
procedure is presently more appropriate for relative component performance than for use as a pass/fail
criterion. Rather, results should be used to augment existing data or establish baseline for potential
investigative efforts in package/board technologies.
The comparability between different test sites, data acquisition methods, and board manufacturers has
not been fully demonstrated by existing data. As a result, if the data are to be used for direct comparison
of component performance, matching study must first be performed to prove that the data are in fact
comparable across different test sites and test conditions.
This method is not intended to substitute for full characterization testing, which might incorporate
substantially larger sample sizes and increased number of drops. Due to limited sample size and number
of drops specified here, it is possible that enough failure data may not be generated in every case to
perform full statistical analysis.
2 Apparatus
As per JESD22-B104-B and JESDD22-B110
JEDEC Standard No. 22-B111
Page 2
3 Terms and definitions
For purposes of this standard, the following definitions shall apply
component: A packaged semiconductor device.
single-sided PCB assembly: A printed circuit board assembly with components mounted on only one
side of the board
double-sided PCB assembly: A printed circuit board assembly with components mounted on top and
bottom sides of the board.
handheld electronic product: A product that can conveniently be stored in a pocket (of sufficient size)
and used when held in user’s hand.
NOTE Included in handheld electronic products are cameras, calculators, cell phones, pagers, palm-size PCs
(formerly called ‘pocket organizers’), Personal Computer Memory Card International Association (PCMCIA) cards,
smart cards, mobile phones, personal digital assistants (PDAs), and other communication devices.
peak acceleration: The maximum acceleration during the dynamic motion of the test apparatus.
pulse duration; acceleration interval: The time interval between the instant when the acceleration first
reaches 10% of its specified peak level and the instant when the acceleration first returns to 10% of the
specified peak level after having reach that peak level.
table drop height: The free-fall drop height of the drop table needed to attain the prescribed peak
acceleration and pulse duration.
event: An electrical discontinuity of resistance greater than 1000 ohms lasting for 1 microsecond or
longer.
event detector: A continuity test instrument capable of detecting electrical discontinuity of resistance
greater than 1000 ohms lasting for 1 microsecond or longer.
4 Applicable documents
JESD22-B104-B, Mechanical Shock
JESD22-B110, Subassembly Mechanical Shock
IPC-SMT-782, Surface Mount Design and Land Pattern Standard
IPC-A-600, Acceptability of Printed Boards
J-STD-020, Moisture/Reflow Sensitivity Classification for Non-hermetic Solid State Surface Mount
Devices
J-STD-033, Standard for Handling, Packing, Shipping and Use of Moisture/Reflow Sensitive Surface
Mount Devices
IPC-9701, Performance Test Methods and Qualification Requirements for Surface Mount Solder
Attachments
JEDEC Standard No. 22-B111
Page 3
5 Test Components and Board
5.1 Components
This standard covers all area arrays and perimeter-leaded surface-mountable packaged semiconductor
devices such as BGAs, LGAs, CSPs, TSOPs, and QFNs typically used in handheld electronic product.
Since components with body sizes larger than 15 mm x 15 mm in size are not used in these applications,
the maximum size of the component body covered in this standard is 15 mm x 15 mm. All components
used for this testing must be daisy-chained. The daisy chain should either be done at the die level or by
providing daisy chain links at the lead-frame or substrate level. In case of non-daisy chain die, a mechanical
dummy die must be used inside the package to simulate the actual structure of the package. The die size
and thickness should be similar to the functional die size to be used in application. The component
materials, dimensions, and assembly processes shall be representative of typical production device.
5.2 Test board
Since the drop test per
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