EN 60191-4:2014/A1:2018
(Amendment)Mechanical standardization of semiconductor devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages
Mechanical standardization of semiconductor devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages
Mechanische Normung von Halbleiterbauelementen - Teil 4: Codierungssystem für Gehäuse und Eingruppierung der Gehäuse nach der Gehäuseform für Halbleiterbauelemente
Normalisation mécanique des dispositifs à semiconducteurs - Partie 4: Système de codification et classification en formes des structures des boîtiers pour dispositifs à semiconducteurs
Standardizacija mehanskih lastnosti polprevodniških elementov - 4. del: Kodirni sistem in klasifikacija oblik okrovov polprevodniških elementov - Dopolnilo A1 (IEC 60191-4:2013/A1:2018)
General Information
Relations
Overview
EN 60191-4:2014/A1:2018 (identical to IEC 60191-4:2013/A1:2018) is a European amendment that extends the mechanical standardization of semiconductor devices by defining a coding system and classification of package outlines for semiconductor device packages. The amendment adds informative terminology (Annex C) to harmonize names, descriptions and code variations for common package families, helping to prevent misuse and confusion of package terms across design, manufacturing and procurement.
Key topics
- Coding system and package classification
- Standardized codes for package outlines to unify identification across suppliers and datasheets.
- Terminology and definitions (Annex C - informative)
- Clear package names and part names with concise descriptions.
- Examples include BGA, LGA, PGA, QFN, QFP, DIP, DTP and many sub‑variants.
- Height and pitch categories
- Seated height bands (e.g., Low Profile, Thin, Very Thin, Ultra‑thin, Extra Thin) with defined ranges for many package families.
- Fine‑pitch classifications (e.g., FBGA, FLGA, FQFP) for terminal/land/pin pitches.
- Variant attributes
- Heat‑sink variants (HBGA, HLGA, HQFN, etc.), material variations (plastic, ceramic, silicon), interstitial and stack terminal types (IBGA, PFBGA, etc.).
- Scope of Annex C
- A comprehensive table mapping package names to standardized short forms and descriptions to promote consistent usage.
Practical applications
Who uses this standard and why:
- Package designers and semiconductor manufacturers - to label and document package outlines consistently in product specifications and drawings.
- PCB and system designers - to select compatible packages by matching standardized height/pitch and footprint descriptions.
- Procurement and supply‑chain teams - to avoid ambiguity when sourcing packages from multiple vendors.
- Test houses and assembly houses - to prepare handling, assembly and test fixtures based on uniform package definitions.
- Standards developers and technical writers - to ensure datasheets and standards use harmonized terminology.
Related standards / implementation notes
- This amendment was approved by CENELEC (May 2018) and endorsed without modification from IEC. National implementation dates and withdrawal timelines are referenced in the European foreword (national implementation by Feb 2019; withdrawal of conflicting national standards by May 2021).
- For complete normative details and full code tables, consult the official EN/IEC publication: EN 60191-4:2014/A1:2018 / IEC 60191-4:2013/A1:2018.
Keywords: EN 60191-4:2014/A1:2018, IEC 60191-4, semiconductor package outlines, coding system, package classification, BGA, LGA, QFN, QFP, fine pitch.
Standards Content (Sample)
SLOVENSKI STANDARD
01-julij-2018
Standardizacija mehanskih lastnosti polprevodniških elementov - 4. del: Kodirni
sistem in klasifikacija oblik okrovov polprevodniških elementov - Dopolnilo A1
(IEC 60191-4:2013/A1:2018)
Mechanical standardization of semiconductor devices - Part 4: Coding system and
classification into forms of package outlines for semiconductor device packages (IEC
60191-4:2013/A1:2018)
Mechanische Normung von Halbleiterbauelementen - Teil 4: Codierungssystem für
Gehäuse und Eingruppierung der Gehäuse nach der Gehäuseform für
Halbleiterbauelemente (IEC 60191-4:2013/A1:2018)
Normalisation mécanique des dispositifs à semiconducteurs - Partie 4: Système de
codification et classification en formes des structures des boîtiers pour dispositifs à
semiconducteurs (IEC 60191-4:2013/A1:2018)
Ta slovenski standard je istoveten z: EN 60191-4:2014/A1:2018
ICS:
31.080.01 Polprevodniški elementi Semiconductor devices in
(naprave) na splošno general
31.240 Mehanske konstrukcije za Mechanical structures for
elektronsko opremo electronic equipment
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.
EUROPEAN STANDARD EN 60191-4:2014/A1
NORME EUROPÉENNE
EUROPÄISCHE NORM
May 2018
ICS 31.080
English Version
Mechanical standardization of semiconductor devices - Part 4:
Coding system and classification into forms of package outlines
for semiconductor device packages
(IEC 60191-4:2013/A1:2018)
Normalisation mécanique des dispositifs à semiconducteurs Mechanische Normung von Halbleiterbauelementen - Teil
- Partie 4: Système de codification et classification en 4: Codierungssystem für Gehäuse und Eingruppierung der
formes des structures des boîtiers pour dispositifs à Gehäuse nach der Gehäuseform für Halbleiterbauelemente
semiconducteurs (IEC 60191-4:2013/A1:2018)
(IEC 60191-4:2013/A1:2018)
This amendment A1 modifies the European Standard EN 60191-4:2014; it was approved by CENELEC on 2018-05-01. CENELEC
members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this amendment the
status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This amendment exists in three official versions (English, French, German). A version in any other language made by translation under the
responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the same status as
the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia,
Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Serbia, Slovakia, Slovenia, Spain, Sweden,
Switzerland, Turkey and the United Kingdom.
European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Rue de la Science 23, B-1040 Brussels
© 2018 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
Ref. No. EN 60191-4:2014/A1:2018 E
European foreword
The text of document 47D/897/CDV, future edition 3 of IEC 60191-4:2013/A1, prepared by
IEC/TC 47D "Semiconductor devices packaging, of IEC technical committee 47: Semiconductor
devices" was submitted to the IEC-CENELEC parallel vote and approved by CENELEC as
The following dates are fixed:
• latest date by which the document has to be (dop) 2019-02-01
implemented at national level by
publication of an identical national
standard or by endorsement
(dow) 2021-05-01
• latest date by which the national
standards conflicting with the
document have to be withdrawn
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC shall not be held responsible for identifying any or all such patent rights.
Endorsement notice
The text of the International Standard IEC 60191-4:2013/A1:2018 was approved by CENELEC as a
European Standard without any modification.
IEC 60191-4 ®
Edition 3.0 2018-03
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
A MENDMENT 1
AM ENDEMENT 1
Mechanical standardization of semiconductor devices –
Part 4: Coding system and classification into forms of package outlines for
semiconductor device packages
Normalisation mécanique des dispositifs à semiconducteurs –
Partie 4: Système de codification et classification en formes des structures des
boîtiers pour dispositifs à semiconducteurs
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.080.01 ISBN 978-2-8322-5495-0
– 2 – IEC 60191-4:2013/AMD1:2018
© IEC 2018
FOREWORD
This amendment has been prepared by subcommittee 47D: Semiconductor devices packaging,
of IEC technical committee 47: Semiconductor devices.
The text of this amendment is based on the following documents:
CDV Report on voting
47D/897/CDV 47D/904/RVC
Full information on the voting for the approval of this amendment can be found in the report
on voting indicated in the above table.
The committee has decided that the contents of this amendment and the base publication will
remain unchanged until the stability date indicated on the IEC website under
"http://webstore.iec.ch" in the data related to the specific publication. At this date, the
publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
_____________
Add, after Annexes A and B, the following new Annex C:
Annex C
(informative)
Terminology of semiconductor package outlines
To prevent misuse, misunderstanding and confusion of terminology of semiconductor package
outline, correct terms and descriptions are required to be indicated in the international
standards.
Correct terms and descriptions of semiconductor package outline including package code
variations are listed in Table C.1.
IEC 60191-4:2013/AMD1:2018 – 3 –
© IEC 2018
Table C.1 – Package name and parts name
Classification Term Description
Package name Ball Grid Array Package A package with the balls or bumps
placed in a row of 3 x 3 or more, or in
(BGA)
grid, on the upper or lower side of its
body
Package name Low Profile Ball Grid Array Package BGA with the seated height of over
1,2 mm and up to 1,7 mm
(LBGA)
Package name Thin Ball Grid Array Package BGA with the seated height of over
1,0 mm and up to 1,2 mm
(TBGA)
Package name Very Thin Ball Grid Array Package BGA with the seated height of over
0,8 mm and up to 1,0 mm
(VBGA)
Package name Very-very Thin Ball Grid Array Package BGA with the seated height of over
0,65 mm and up to 0,8 mm
(WBGA)
Package name Ultra-thin Ball Grid Array Package BGA with the seated height of over
0,5 mm and up to 0,65 mm
(UBGA)
Package name Extra Thin Ball Grid Array Package BGA with the seated height of up to
0,5 mm
(XBGA)
Package name Heat Sink Ball Grid Array Package BGA with a heat sink
(HBGA)
Package name Heat Sink Low Profile Ball Grid Array Package LBGA with a heat sink
(HLBGA)
Package name Heat Sink Thin Ball Grid Array Package TBGA with a heat sink
(HTBGA)
Package name Heat Sink Very Thin Ball Grid Array Package VBGA with a heat sink
(HVBGA)
Package name Heat Sink Very-very Thin Ball Grid Array WBGA with a heat sink
Package
(HWBGA)
Package name Heat Sink Ultra-thin Ball Grid Array Package UBGA with a heat sink
(HUBGA)
Package name Heat Sink Extra Thin Ball Grid Array Package XBGA with a heat sink
(HXBGA)
Package name Fine Pitch Ball Grid Array Package BGA with the terminal pitch of up to
0,8 mm
(FBGA)
Package name Low Profile Fine Pitch Ball Grid Array Package FBGA with the seated height of over
1,2 mm and up to 1,7 mm
(LFBGA)
Package name Thin Fine Pitch Ball Grid Array Package FBGA with the seated height of over
1,0 mm and up to 1,2 mm
(TFBGA)
Package name Very Thin Fine Pitch Ball Grid Array Package FBGA with the seated height of over
0,8 mm and up to 1,0 mm
(VFBGA)
Package name Very-very Thin Fine Pitch Ball Grid Array FBGA with the seated height of over
Package 0,65 mm and up to 0,8 mm
(WFBGA)
– 4 – IEC 60191-4:2013/AMD1:2018
© IEC 2018
Classification Term Description
Package name Ultra-thin Fine Pitch Ball Grid Array Package FBGA with the seated height of over
0,5 mm and up to 0,65 mm
(UFBGA)
Package name Extra Thin Fine Pitch Ball Grid Array Package FBGA with the seated height of up to
0,5 mm
(XFBGA)
Package name Terminal for stack Fine Pitch Ball Grid Array FBGA with the terminals for layer stack
Package
(PFBGA)
Package name Terminal for stack Low Profile Fine Pitch Ball LFBGA with the terminals for layer stack
Grid Array Package
(PLFBGA)
Package name Terminal for stack Thin Fine Pitch Ball Grid TFBGA with the terminals for layer stack
Array Package
(PTFBGA)
Package name Terminal for stack Very Thin Fine Pitch Ball Grid VFBGA with the terminals for layer stack
Array Package
(PVFBGA)
Package name Terminal for stack Very-very Thin Fine Pitch WFBGA with the terminals for layer stack
Ball Grid Array Package
(PWFBGA)
Package name Terminal for stack Ultra-thin Fine Pitch Ball Grid UFBGA with the terminals for layer stack
Array Package
(PUFBGA)
Package name Terminal for stack Extra Thin Fine Pitch Ball XFBGA with the terminals for layer stack
Grid Array Package
(PXFBGA)
Package name Interstitial Ball Grid Array Package Interstitial BGA
(IBGA)
Package name Plastic Ball Grid Array Package Plastic BGA
(P-BGA)
Package name Ceramic Ball Grid Array Package Ceramic BGA
(C-BGA)
Package name Silicon Fine Pitch Ball Grid Array Package Silicon FBGA
(S-FBGA)
Package name Dual Inline Package A package with the leads extended from
the two sides of its body and used for
(DIP)
through-hole mounting
Package name Shrink Dual Inline Package Shrink DIP
(SDIP)
Package name Heat Sink Dual Inline Package DIP with a heat sink
(HDIP)
Package name Heat Sink Shrink Dual Inline Package SDIP with a heat sink
(HSDIP)
Package name Piggyback Dual Inline Package Piggyback DIP
(PDIP)
Package name Plastic Dual Inline Package Plastic DIP
(P-DIP)
IEC 60191-4:2013/AMD1:2018 – 5 –
© IEC 2018
Classification Term Description
Package name Ceramic Dual Inline Package Ceramic DIP
(C-DIP)
Package name Glass-Sealed Ceramic Dual Inline Package Glass-sealed ceramic DIP
(G-DIP)
Package name Glass-Sealed Ceramic Window Dual Inline Glass-sealed ceramic DIP with a window
Package
(G-DDIP)
Package name Dual Tape Carrier Package A package with the leads extended from
the two sides of its body and consisting
(DTP)
of the tapes
Package name Dual Tape Carrier Package Type 1 DTP Type-1
(DTP(1))
Package name Dual Tape Carrier Package Type 2 DTP Type-2
(DTP(2))
Package name Land Grid Array Package A package without pins and with the
lands placed in a row of 3 x 3 or more, or
(LGA)
in grid, on the upper or lower side of its
body
Package name Low Profile Land Grid Array Package LGA with the seated height of over
1,2 mm and up to 1,7 mm
(LLGA)
Package name Thin Land Grid Array Package LGA with the seated height of over
1,0 mm and up to 1,2 mm
(TLGA)
Package name Very Thin Land Grid Array Package LGA with the seated height of over
0,8 mm and up to 1,0 mm
(VLGA)
Package name Very-very Thin Land Grid Array Package LGA with the seated height of over
0,65 mm and up to 0,8 mm
(WLGA)
Package name Ultra-thin Land Grid Array Package LGA with the seated height of over
0,5 mm and up to 0,65 mm
(ULGA)
Package name Extra Thin Land Grid Array Package LGA with the seated height of up to
0,5 mm
(XLGA)
Package name Heat Sink Land Grid Array Package LGA with a heat sink
(HLGA)
Package name Heat Sink Low Profile Land Grid Array Package LLGA with a heat sink
(HLLGA)
Package name Heat Sink Thin Land Grid Array Package TLGA with a heat sink
(HTLGA)
Package name Heat Sink Very Thin Land Grid Array Package VLGA with a heat sink
(HVLGA)
Package name Heat Sink Very-very Thin Land Grid Array WLGA with a heat sink
Package
(HWLGA)
Package name Heat Sink Ultra-thin Land Grid Array Package ULGA with a heat sink
(HULGA)
Package name Heat Sink Extra Thin Land Grid Array Package XLGA with a heat sink
(HXLGA)
– 6 – IEC 60191-4:2013/AMD1:2018
© IEC 2018
Classification Term Description
Package name Fine Pitch Land Grid Array Package LGA with the terminal pitch of up to
0,8 mm
(FLGA)
Package name Low Profile Fine Pitch Land Grid Array Package FLGA with the seated height of over
1,2 mm and up to 1,7 mm
(LFLGA)
Package name Thin Fine Pitch Land Grid Array Package FLGA with the seated height of over
1,0 mm and up to 1,2 mm
(TFLGA)
Package name Very Thin Fine Pitch Land Grid Array Package FLGA with the seated height of over
0,8 mm and up to 1,0 mm
(VFLGA)
Package name Very-very Thin Fine Pitch Land Grid Array FLGA with the seated height of over
Package 0,65 mm and up to 0,8 mm
(WFLGA)
Package name Ultra-thin Fine Pitch Land Grid Array Package FLGA with the seated height of over
0,5 mm and up to 0,65 mm
(UFLGA)
Package name Extra Thin Fine Pitch Land Grid Array Package FLGA with the seated height of up to
0,5 mm
(XFLGA)
Package name Interstitial Land Grid Array Package Interstitial LGA
(ILGA)
Package name Plastic Land Grid Array Package Plastic LGA
(P-LGA)
Package name Ceramic Land Grid Array Package Ceramic LGA
(C-LGA)
Package name Silicon Fine Pitch Land Grid Array Package Silicon FLGA
(S-FLGA)
Package name Pin Grid Array Package A package with the pins placed in a row
of 3 x 3 or more, or in grid, on the upper
(PGA)
or lower side of its body
Package name Shrink Pin Grid Array Package Shrink PGA
(SPGA)
Package name Interstitial Pin Grid Array Package Interstitial PGA
(IPGA)
Package name Heat Sink Pin Grid Array Package PGA with a heat sink
(HPGA)
Package name Ceramic Pin Grid Array Package Ceramic PGA
(C-PGA)
Package name Glass-Sealed Ceramic Pin Grid Array Package Glass-sealed ceramic PGA
(G-PGA)
Package name Plastic Pin Grid Array Package Plastic PGA
(P-PGA)
Package name Quad Flat F-Leaded Package A package with non-formed leads
extended from the four sides of its body
(QFF)
Package name Plastic Quad Flat F-Leaded Package Plastic QFF
(P-QFF)
IEC 60191-4:2013/AMD1:2018 – 7 –
© IEC 2018
Classification Term Description
Package name Glass-Sealed Ceramic Quad Flat F-Leaded Glass-sealed ceramic QFF
Package
(G-QFF)
Package name Quad Flat I-Leaded Package A package with leads formed like the
letter “I” and extended from the four
(QFI)
sides of its body
Package name Plastic Quad Flat I-Leaded Package Plastic QFI
(P-QFI)
Package name Quad Flat J-Leaded Package A package with leads formed like the
letter “J” and extended from the four
(QFJ)
sides of its body
Package name Plastic Quad Flat J-Leaded Package Plastic QFJ
(P-QFJ)
Package name Ceramic Quad Flat J-Leaded Package Ceramic QFJ
(C-QFJ)
Package name Glass-Sealed Ceramic Quad Flat J-Leaded Glass-sealed ceramic QFJ
Package
(G-QFJ)
Package name Glass-Sealed Ceramic Window Quad Flat J- Glass-sealed ceramic QFJ with a window
Leaded Package
(G-DQFJ)
Package name Quad Flat No Lead Package A package with only one row of terminals
on each side of the four sides and on the
(QFN)
bottom
Package name Low Profile Quad Flat No Lead Package QFN with the seated height of over
1,2 mm and up to 1,7 mm
(LQFN)
Package name Thin Quad Flat No Lead Package QFN with the seated height of over
1,0 mm and up to 1,2 mm
(TQFN)
Package name Very Thin Quad Flat No Lead Package QFN with the seated height of over
0,8 mm and up to 1,0 mm
(VQFN)
Package name Very-very Thin Quad Flat No Lead Package QFN with the seated height of over
0,65 mm and up to 0,8 mm
(WQFN)
Package name Ultra-thin Quad Flat No Lead Package QFN with the seated height of over
0,5 mm and up to 0,65 mm
(UQFN)
Package name Extra Thin Quad Flat No Lead Package QFN with the seated height up to 0,5 mm
(XQFN)
Package name Heat Sink Quad Flat No Lead Package QFN with a heat sink
(HQFN)
Package name Heat Sink Low Profile Quad Flat No Lead LQFN with a heat sink
Package
(HLQFN)
Package name Heat Sink Thin Quad Flat No Lead Package TQFN with a heat sink
(HTQFN)
Package name Heat Sink Ve
...
Frequently Asked Questions
EN 60191-4:2014/A1:2018 is a amendment published by CLC. Its full title is "Mechanical standardization of semiconductor devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages". This standard covers: Mechanical standardization of semiconductor devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages
Mechanical standardization of semiconductor devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages
EN 60191-4:2014/A1:2018 is classified under the following ICS (International Classification for Standards) categories: 31.080 - Semiconductor devices. The ICS classification helps identify the subject area and facilitates finding related standards.
EN 60191-4:2014/A1:2018 has the following relationships with other standards: It is inter standard links to EN 60191-4:2014. Understanding these relationships helps ensure you are using the most current and applicable version of the standard.
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The article discusses EN 60191-4:2014/A1:2018, which is a standard that focuses on the mechanical standardization of semiconductor devices. This standard specifically deals with the coding system and classification of semiconductor device packages into different forms of package outlines. The aim of this standard is to provide a common language and framework for the classification of semiconductor device packages, which helps with communication and interoperability between different stakeholders in the semiconductor industry.
記事のタイトル:EN 60191-4:2014/A1:2018 - 半導体デバイスの機械的標準化 - 第4部:半導体デバイスパッケージのパッケージアウトラインのコーディングシステムと分類 記事内容:この記事では、EN 60191-4:2014/A1:2018について議論されています。この規格は、半導体デバイスの機械的標準化に焦点を当てており、具体的には半導体デバイスパッケージをさまざまなパッケージアウトラインの形式に分類するためのコーディングシステムと分類に関して取り扱っています。この規格の目的は、半導体業界の異なる関係者間のコミュニケーションと相互運用性をサポートするため、半導体デバイスパッケージの分類に共通の言語とフレームワークを提供することです。
기사 제목: EN 60191-4:2014/A1:2018 - 반도체 소자의 기계 표준화 - 제4부: 반도체 소자 패키지의 윤곽 형태에 대한 코딩 시스템 및 분류 기사 내용: 이 기사에서는 EN 60191-4:2014/A1:2018에 대해 논의하는데, 이는 반도체 소자의 기계 표준화에 초점을 맞추고 있다. 이 표준은 특히 반도체 소자 패키지를 다양한 윤곽 형태로 분류하기 위한 코딩 시스템과 분류에 대해 다룬다. 이 표준의 목적은 반도체 산업의 다양한 이해관계자들 간의 의사 소통과 상호 운용성을 돕기 위해 반도체 소자 패키지의 분류를 위한 공통 언어와 프레임워크를 제공하는 것이다.
기사 제목: EN 60191-4:2014/A1:2018 - 반도체 기기의 기계 표준화 - 제 4부: 반도체 기기 패키지의 패키지 윤곽 형태에 대한 코딩 시스템 및 분류 기사는 반도체 기기의 기계 표준화에 대해 논의하고 있다. 특히, 반도체 기기 패키지의 패키지 윤곽에 대한 코딩 시스템과 분류에 초점을 맞추고 있다. 이 표준인 EN 60191-4:2014/A1:2018의 목적은 다양한 패키지 윤곽 형태의 식별과 분류를 위한 통일된 절차를 제공하는 것이다. 이를 통해 다양한 반도체 기기의 통신과 명세화가 용이해진다. 이 표준은 리드의 수, 재료 유형, 패키지 형태 등과 같은 특정 매개변수를 기반으로 패키지 윤곽의 코딩, 분류 및 명칭에 대한 지침을 제공한다. 전반적으로, 이 표준은 반도체 기기 패키징의 효율성과 신뢰성을 향상시키는 데 중요한 역할을 한다.
記事タイトル:EN 60191-4:2014/A1:2018 - 半導体デバイスの機械標準化 - 第4部:半導体デバイスパッケージのパッケージ外形のコーディングシステムと分類 この記事では、半導体デバイスの機械標準化について話し合われています。具体的には、半導体デバイスパッケージのパッケージ外形のコーディングシステムと分類に焦点が当てられています。この規格であるEN 60191-4:2014 / A1:2018の目的は、さまざまなパッケージ外形の識別と分類のための統一された手順を提供することです。これにより、さまざまな半導体デバイスのコミュニケーションと仕様が容易になります。この規格では、リードの数、材料の種類、パッケージの形状などの特定のパラメータに基づいて、パッケージ外形のコーディング、分類、命名のガイドラインが提供されます。全体的に、この規格は半導体デバイスパッケージングの効率と信頼性の向上に重要な役割を果たしています。
The article discusses the mechanical standardization of semiconductor devices. Specifically, it focuses on the coding system and classification of package outlines for semiconductor device packages. The purpose of this standard, EN 60191-4:2014/A1:2018, is to provide a uniform procedure for the identification and classification of different forms of package outlines. This allows for easier communication and specification of various semiconductor devices. The standard provides guidelines for coding, classification, and naming of package outlines based on specific parameters such as the number of leads, type of material, and package shape. Overall, this standard plays a crucial role in enhancing the efficiency and reliability of semiconductor device packaging.








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