Guide for Design of Flat, Straight-Line Test Structures for Detecting Metallization Open-Circuit or Resistance-Increase Failure Due to Electromigration

SCOPE
1.1 This guide covers recommended design features for test structures used in accelerated stress tests, as described in Test Method F1260, to characterize the failure distribution of interconnect metallizations that fail due to electromigration.
1.2 The guide is restricted to structures with a straight test line on a flat surface that are used to detect failures due to an open-circuit or a percent-increase in resistance of the test line.
1.3 This guide is not intended for test structures used to detect random defects in a metallization line.
1.4 Metallizations tested and characterized are those that are used in microelectronic circuits and devices.

General Information

Status
Withdrawn
Publication Date
31-Dec-1988
Drafting Committee
Current Stage
Ref Project

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ASTM F1259-89 - Guide for Design of Flat, Straight-Line Test Structures for Detecting Metallization Open-Circuit or Resistance-Increase Failure Due to Electromigration
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Standards Content (Sample)

~~~~ Designation: F 1259-89
Standard Guide for
Design of Flat, Straight-Line Test Structures for Detecting ·
Metallization Open-Circuit or Resistance-Increase Failure Due
1
to Electromigration ·
This stand~rd is issued under the fixed designation F 1259; the number immediately following the dc.~ignation indicates the year of
original adoption or, in the cnse of revision, the year of last revision. A number in parentheses indicates the year of lust reapproval. A
superscript epsilon (t) indicates an editorial change sint·e the last rcviliion or reapproval.
1. Scope are alSo intended to promote temperature unifomtity along
the test line when significant joule heating is produced
1.1 This guide covers recommended design features for
during the accelerated stress test.
test structures used in accelerated stress tests, as described in
Test Method F 1260, to characterize the failure distribution
5. Design Features
of interconnect metallizations that fail due to clcctromigra­
5.1 The test structure shall have at least four terminals:
tion.
two to conduct current and two to measure the voltage. The
1.2 The guide is restricted to structures with a straight test
basic features are illt1stratcd in Fig. 1.
line on a flat surface that are used to detect failures due to an
5. 1. 1. The metallization to be characterized by the test
open-circuit or a percent-increase in resistance of the test
structure shall be in the form of a straight lest line of width w
line.
appropriate for the capability of the process and for t he
1.3 This guide is not intended for test structures used to
intended use.
detect random defects in a metal lization li ne.
1.4 Metallizations tested and characterized are those that
NoTE 1- The median-time-to-failure and sigma (sec Test Method
are used in microelectronic circuits and devices.
F 1260) may be functions of the test-line width. This function~ !
dependence may be affected by the size of the metallization grains.
2. Referenced Documents
5. 1.2 The length of the test line shall be ROO 11m.
2.1 ASTM Standards: Adjacent-running lines may be included in the design to
F 1260 Test Method for Estimatine Electromigration simulate actual-circuit layouts.
and Sigma of Integrated Cir­
Median-Time-To-Failure
NoTE 2-To avoid interference in estimating 150 (see Test Method
2
cuit Metallizations
F 1260), where t50 may be a function of the length of the test line, a
3
F 1261 Test Method for Determining the Average Width
standard length of 800 f.! m is specified.
and Cross-Sectional Area of a Straight, T hin-Film Metal Non : 3-Ail dimensions specified here and elsewhere arc designed
2
dimensio ns. It is expected that the actual dimensions will differ
Line
somewhat due to processing.
3. Terminology
5.1.3 Each end of the test line is contacted to a wider line
3.1 Descriptions of Terms: of width W = 2w that extends a distance L to a contact pad
or other wide path for conducting the current to and . from
3.1.1 test chip-an area on a semiconductor wafer con­
taining one or more test structures having a specified or the test line. The length L shall be longer than 80 11m.
implied purpose. 5. 1.4 Each end-contact line shall have a voltage-tap line
3.1.2 test structure-a passive metallization structure, for measuring voltage. The width of the tap line shall be
with terminals to permit electrical access, that
...

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