CLC/SR 47A - Integrated circuits

TAN - // IEC Corrigendum

IEC 62433-2:2008(E) specifies macro-models for ICs to simulate conducted electromagnetic emissions on a printed circuit board. The model is commonly called Integrated Circuit Emission Model - Conducted Emission (ICEM-CE). The ICEM-CE model can also be used for modelling an IC-die, a functional block and an Intellectual Property block (IP). The ICEM-CE model can be used to model both digital and analogue ICs. Basically, conducted emissions have two origins: - conducted emmissions through power supply terminals and ground reference structure; - conducted emmisions through input/output (I/O) terminals. The ICEM-CE model addresses those two types of origins in a single approach. This standard defines structures and components of the macro-model for EMI simulation taking into account the IC's internal activities. This standard gives general data, which can be implemented in different formats or languages such as IBIS, IMIC, SPICE, VHDL-AMS and Verilog. SPICE is however chosen as default simulation environment to cover all the conducted emissions. This standard also specifies requirements for information that shall be incorporated in each ICEM-CE model or component part of the model for model circulation, but description syntax is not within the scope of this standard.

Corrigendum to EN issued December 2006

This part of IEC 62132 provides general information and definitions on measurement of conducted and radiated electromagnetic immunity of integrated circuits (ICs) to conducted and radiated disturbances. It also provides a description of measurement conditions, test equipment and set-up, as well as the test procedures and content of the test reports. A test method comparison table is included in Annex A to assist in selecting the appropriate measurement method(s). This standard describes general conditions required to obtain a quantitative measure of immunity of ICs in a uniform testing environment. Critical parameters that are expected to influence the test results are described. Deviations from this standard are noted explicitly in the individual test report. The measurement results can be used for comparison or other purposes. Measurement of the injected voltages and currents, together with the responses of the ICs tested at controlled conditions, yields information about the potential immunity of the IC to conducted and radiated RF disturbances in a given application.

This part of IEC 62132 describes a bulk current injection (BCI) test method to measure the immunity of integrated circuits (IC) in the presence of conducted RF disturbances, e.g. resulting from radiated RF disturbances. This method only applies to ICs that have off-board wire connections e.g. into a cable harness. This test method is used to inject RF current on one or a combination of wires. This standard establishes a common base for the evaluation of semiconductor devices to be applied in equipment used in environments that are subject to unwanted radio frequency electromagnetic signals.

D124/C047: Withdrawn

Text prepared by STACK * D96/134: CLC/TC CECC disbanded * D124/C047: Withdrawn

Specifies a method to measure the conducted electromagnetic emission of integrated circuits by direct RF current measurement with a 1 ohm resistive probe and RF voltage measurement using a 150 ohm coupling network. These methods guarantee a high degree of repeatability and correlation of measurements.

Provides general information and definitions on measurement of conducted and radiated electromagnetic disturbances from integrated circuits. Also provides a description of measurement conditions, test equipment and set-up as well as the test procedures and content of the test reports. A test method comparison table is included to assist in selecting the appropriate measurement method(s). Measurement of the voltage and current of conducted RF emissions or radiated RF disturbances, coming from an integrated circuit under controlled conditions, yields information about the potential for RF disturbances in an application of the integrated circuit.

This specification specifies the terms, definitions, symbols, test methods and other material for monolithic integrated (micro)circuits (*), as defined in IEC 747, necessary to prepare appropriate detail sepcifications (DS) in the CECC System. Supplementary requirements for different families of integrated microcircuits are included in separate specifications. (*) In the following term "integrated circuits" is used.

This document relates to AC MOS Digital Integrated Circuits.

This document relates to digital monolithic integrated circuits.

EN 165000 series supersedes EN 163000, CECC 63 000 & 64 000 series * D96/132: CECC/SC 47AX disbanded
2021: CLC legacy converted by DCLab NISOSTS

This checklist is intended for the use of a hybrid microcircuit manufacturer's internal assessment team. It will provide the hybrid manufacturer and the ONS with ongoing information on process control demonstrating compliance with EN 165000-1. It is not intended to include Quality System requirements.

La présente spécification spécifie les procédures d'assurance de la qualité et les méthodes d'essai correspondantes à utiliser pour l'évaluation des circuits intégrés à couches et hybrides utilisés dans les équipements électroniques, en vertu de la procédure d'agrément de savoir-faire. Elle s'applique également aux dispositifs partiellement achevés fournis aux clients pour traitement ultérieur. Il convient de lire la présente norme conjointement avec l'EN 165000-2, l'EN 165000 -3 et l'EN 165000-4.

EN 165000 series supersedes EN 163000, CECC 63 000 & 64 000 series * D96/132: CECC/SC 47AX disbanded
2021: CLC legacy converted by DCLab NISOSTS

This document contains general information on TTL Standard digitam integrated circuits and defines the common characteristics for this family of integrated circuits.

Supersedes CECC 90 107:1987 (with A1) * CECC WG 9 work handled by SR 47A

Supersedes CECC 90 103:1988 (with A1 and A2) * CECC WG 9 work handled by SR 47A

This document relates to TTL-Schottky digital integrated circuits - Series 54S, 64S, 74S and 84S.

Supersedes CECC 90 108:1987 (with A1) * CECC WG 9 work handled by SR 47A

Supersedes CECC 90 109:1989 (with A1) * CECC WG 9 work handled by SR 47A

This document contains general information on TTL Advanced Low Power Shottky digital integrated circuits and defines the common characteristics for this family of integrated circuits.

This BDS relates to: - digital microprocessors, generally in accordance with IEC 747 and IEC 748 : Semiconductor devices - Discrete devices and integrated circuits - digital integrated circuits which are primarily designed or intended for use with microprocessors. Analogue and interface aspects of such devices shall be added to the Detail Specification in accordance with CECC 90 200 and CECC 90 300.

This sectional specification applies to F&HICs manufactured as catalogue products or as custom built products using thick film techniques and whose quality is assessed on the basis of qualification approval. It presents preferred values for ratings and characteristics. It selects from CECC 63 000 the appropriate methods of test and gives generam performance requirements, to be used in detail specifications for F&HICs derived from this specification. Passive networks can be qualified to this specification or to alternative specifications, when introduced. For resistor networks, see specification CECC 64 100.

Supersedes CECC 63 101 Issue 1:1984 (with A1).
Superseded by EN 165000 series.
This document remains valid only for existing approvals until further notice * CECC/SC 47AX disbanded