Behavioural languages - Part 1-1: VHDL Language Reference Manual

IEC 61691-1-1:2023 defines the syntax and semantics of the VHSIC Hardware Description Language (VHDL). The acronym VHSIC (Very High Speed Integrated Circuits) in the language’s name comes from the U.S. government program that funded early work on the standard. This is an IEC/IEEE dual logo standard.

General Information

Status
Published
Publication Date
10-Oct-2023
Drafting Committee
Current Stage
PPUB - Publication issued
Start Date
08-Sep-2023
Completion Date
11-Oct-2023
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IEC 61691-1-1:2023 - Behavioural languages - Part 1-1: VHDL Language Reference Manual Released:11. 10. 2023
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IEC 61691-1-1 ®
Edition 3.0 2023-10

IEEE Std 1076
INTERNATIONAL
STANDARD
Behavioural languages –
Part 1-1: VHDL Language Reference Manual
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IEC 61691-1-1 ®
Edition 3.0 2023-10
IEEE Std 1076™
INTERNATIONAL
STANDARD
Behavioural languages –
Part 1-1: VHDL Language Reference Manual
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 25.040.01, 35.060 ISBN 978-2-8322-7517-7
– i – IEEE Std 1076™-2019
Contents
1. Overview. 14
1.1 Scope. 14
1.2 Purpose. 14
1.3 Structure and terminology of this standard . 14
1.4 Word usage . 16
2. Normative references. 18
3. Design entities and configurations. 19
3.1 General . 19
3.2 Entity declarations. 19
3.3 Architecture bodies . 22
3.4 Configuration declarations. 25
4. Subprograms and packages. 32
4.1 General . 32
4.2 Subprogram declarations. 32
4.3 Subprogram bodies . 37
4.4 Subprogram instantiation declarations. 39
4.5 Subprogram overloading. 40
4.6 Resolution functions . 43
4.7 Package declarations . 44
4.8 Package bodies. 45
4.9 Package instantiation declarations . 47
4.10 Conformance rules . 48
5. Types. 49
5.1 General . 49
5.2 Scalar types . 50
5.3 Composite types. 58
5.4 Access types. 68
5.5 File types. 70
5.6 Protected types . 75
5.7 String representations. 79
5.8 Unspecified types. 81
6. Declarations . 85
6.1 General . 85
6.2 Type declarations . 86
6.3 Subtype declarations . 86
6.4 Objects . 88
6.5 Interface declarations . 96
6.6 Alias declarations. 119
6.7 Attribute declarations. 122
6.8 Component declarations.123
6.9 Group template declarations . 123
This is a copyrighted IEEE Standard. For personal or standards development use only.
Published by IEC under licence from IEEE. © 2019 IEEE. All rights reserved.
IEEE Std 1076™-2019 – ii –
6.10 Group declarations . 124
6.11 PSL clock declarations. 124
7. Specifications. 126
7.1 General . 126
7.2 Attribute specification. 126
7.3 Configuration specification.129
7.4 Disconnection specification . 135
8. Names . 138
8.1 General . 138
8.2 Simple names . 139
8.3 Selected names. 140
8.4 Indexed names. 142
8.5 Slice names . 143
8.6 Attribute names . 143
8.7 External names. 144
9. Expressions . 148
9.1 General . 148
9.2 Operators. 149
9.3 Operands . 163
9.4 Static expressions. 172
9.5 Universal expressions . 175
10. Sequential statements. 176
10.1 General . 176
10.2 Wait statement. 176
10.3 Assertion statement. 178
10.4 Report statement . 179
10.5 Signal assignment statement . 180
10.6 Variable assignment statement. 189
10.7 Procedure call statement . 191
10.8 If statement. 192
10.9 Case statement. 193
10.10 Loop statement. 195
10.11 Next statement. 196
10.12 Exit statement. 196
10.13 Return statement . 196
10.14 Null statement . 197
10.15 Sequential block statement. 197
11. Concurrent statements. 199
11.1 General .
...

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