IEC 63093-5:2018

IEC 63093-5 ®
Edition 1.0 2018-06
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Ferrite cores – Guidelines on dimensions and the limits of surface
irregularities –
Part 5: EP-cores and associated parts for use in inductors and transformers

Noyaux ferrites – Lignes directrices relatives aux dimensions et aux limites
des irrégularités de surface –
Partie 5: Noyaux EP et pièces associées utilisés dans les inductances et
transformateurs
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IEC 63093-5 ®
Edition 1.0 2018-06
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Ferrite cores – Guidelines on dimensions and the limits of surface

irregularities –
Part 5: EP-cores and associated parts for use in inductors and transformers

Noyaux ferrites – Lignes directrices relatives aux dimensions et aux limites

des irrégularités de surface –

Partie 5: Noyaux EP et pièces associées utilisés dans les inductances et

transformateurs
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 29.100.10 ISBN 978-2-8322-1088-3

– 2 – IEC 63093-5:2018 © IEC 2018
CONTENTS
FOREWORD . 3
1 Scope . 5
2 Normative references . 5
3 Terms and definitions . 5
4 Primary dimensions . 6
4.1 General . 6
4.2 Dimensions of EP-cores . 6
4.2.1 Principal dimensions . 6
4.2.2 Effective parameter and A values . 6
min
4.3 Dimensional limits for coil formers. 7
4.4 Pin locations and base outlines . 8
5 Limits of surface irregularities . 9
5.1 General . 9
5.2 Examples of surface irregularities . 9
5.3 Chips and ragged edges . 10
5.3.1 General . 10
5.3.2 Chips and ragged edges on the mating surfaces . 10
5.3.3 Chips and ragged edges on the other surfaces . 10
5.4 Cracks . 13
5.5 Flash . 13
5.6 Pull-outs . 13
5.7 Crystallites . 14
5.8 Pores . 15
Annex A (normative) EP-core design . 16
A.1 General . 16
A.2 Pin location and base outlines . 16
Bibliography . 17

Figure 1 – Principal dimensions of EP-cores . 6
Figure 2 – Main dimensions of coil formers for EP-cores . 7
Figure 3 – Pin locations (SMD type) viewed from the upper side of the board . 8
Figure 4 – Pin locations (PTH type) viewed from the underside of the board . 9
Figure 5 – Examples of surface irregularities . 10
Figure 6 – Chip location for EP-cores. 11
Figure 7 – Crack and pull-out locations for EP-cores . 13
Figure 8 – Crystallite location for EP-cores . 14
Figure 9 – Pore location for EP-cores . 15

Table 1 – Principal dimensions of EP-cores . 6
Table 2 – Effective parameter and A values . 7
min
Table 3 – Dimensional limits for coil formers for EP-cores . 7
Table 4 – Area and length reference for visual inspection . 12
Table 5 – Limits for cracks . 14

INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
FERRITE CORES – GUIDELINES ON DIMENSIONS
AND THE LIMITS OF SURFACE IRREGULARITIES –

Part 5: EP-cores and associated parts for use
in inductors and transformers
FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
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2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
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8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 63093-5 has been prepared by IEC technical committee 51:
Magnetic components, ferrite and magnetic powder materials.
This first edition cancels and replaces the first edition of IEC 62317-5 published in 2015. This
edition constitutes a technical revision.
This edition includes the following significant technical changes with respect to
IEC 62317-5:2015:
a) addition of the limits of surface irregularities.

– 4 – IEC 63093-5:2018 © IEC 2018
The text of this standard is based on the following documents:
CDV Report on voting
51/1212/CDV 51/1233/RVC
Full information on the voting for the approval of this International Standard can be found in
the report on voting indicated in the above table.
This document has been drafted in accordance with the ISO/IEC Directives, Part 2.
A list of all parts in the IEC 63093 series, published under the general title Ferrite cores –
Guidelines on dimensions and the limits of surface irregularities, can be found on the IEC
website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under "http://webstore.iec.ch" in the data related to
the specific document. At this date, the document will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
FERRITE CORES – GUIDELINES ON DIMENSIONS
AND THE LIMITS OF SURFACE IRREGULARITIES –

Part 5: EP-cores and associated parts for use
in inductors and transformers
1 Scope
This part of IEC 63093 specifies the dimensions that are of importance for mechanical
interchangeability for a preferred range of EP-cores made of ferrite, the essential dimensions
of coil formers to be used with them and the locations of their terminal pins on a 2,50 mm
printed wiring grid in relation to the base outlines of the cores and the effective parameter
values to be used in calculations involving them. It also gives guidelines on allowable limits of
surface irregularities applicable to EP-cores.
The specifications contained in this document are useful in negotiations between ferrite core
manufacturers and users about surface irregularities.
The general considerations upon which the design of this range of cores is based are as given
in Annex A.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their
content constitutes requirements of this document. For dated references, only the edition
cited applies. For undated references, the latest edition of the referenced document (including
any amendments) applies.
IEC 60205, Calculation of the effective parameters of magnetic piece parts
IEC 60401-1, Terms and nomenclature for cores made of magnetically soft ferrites – Part 1:
Terms used for physical irregularities
IEC 60424-1, Ferrite cores – Guidelines on the limits of surface irregularities – Part 1:
General specification
3 Terms and definitions
For the purposes of this document, the terms and definitions given in IEC 60401-1 and
IEC 60424-1 apply.
ISO and IEC maintain terminological databases for use in standardization at the following
addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp

– 6 – IEC 63093-5:2018 © IEC 2018
4 Primary dimensions
4.1 General
Compliance with the following requirements ensures mechanical interchangeability of
complete assemblies and wound coil formers.
4.2 Dimensions of EP-cores
4.2.1 Principal dimensions
The principal dimensions of EP-cores shall be those given in Figure 1 and Table 1.
K 2D
C
2B
IEC
Figure 1 – Principal dimensions of EP-cores
Table 1 – Principal dimensions of EP-cores
A C K E F 2B 2D
Size mm mm mm mm mm mm mm
Min. Max. Min. Max. Max. Min. Max. Min. Max. Min. Max. Min. Max.
EP5 5,85 6,15 3,70 3,90 1,00 4,25 4,55 1,60 1,80 5,50 5,70 3,80 4,20
EP7 9,00 9,40 6,20 6,50 1,80 7,20 7,60 3,20 3,40 7,30 7,50 5,00 5,40
EP10 11,2 11,8 7,45 7,85 1,95 9,20 9,60 3,15 3,45 10,0 10,4 7,20 7,60
EP13 12,2 12,8 8,60 9,00 2,50 9,70 10,3 4,20 4,50 12,7 13,0 9,00 9,40
EP17 17,6 18,4 10,75 11,25 3,45 11,6 12,4 5,50 5,85 16,6 17,0 11,0 11,6
EP20 23,5 24,5 14,6 15,3 4,70 16,1 16,9 8,50 9,00 21,2 21,6 14,0 14,6
EP30 30,5 31,5 22,6 23,6 7,85 23,6 24,4 14,5 15,0 29,7 30,0 23,0 23,8

4.2.2 Effective parameter and A values
min
The effective parameter values of a pair of cores having the dimensions given in 4.2.1 are as
shown in Table 2. For the definitions of these parameters and their calculations, reference
shall be made to IEC 60205.
F
E
A
Table 2 – Effective parameter and A values
min
a
C C l A V A
1 2 e e e min
Size
–1 –3 2 3 2
mm mm mm mm mm mm
-3
EP5 3,255 8 1 080,4 × 10 9,81 3,01 29,6 2,27
-3
EP7 1,479 9 138,76 × 10 15,8 10,7 168 8,55
-3
EP10 1,726 5 152,21 × 10 19,6 11,3 222 8,55
-3
EP13 1,264 2 64,783 × 10 24,7 19,5 481 14,9
-3
EP17 0,854 96 25,187 × 10 29,0 33,9 985 25,3
-3
EP20 0,518 14 6,603 8 × 10 40,7 78,5 3 190 60,1
-3
EP30 0,353 76 1,990 1 × 10 62,9 178 11 200 128
NOTE The above values have been calculated using the method given in IEC 60205.
a
A is selected as the smallest value among A , A , A , A and A using the mean value of each dimension.
min 1 2 3 4 5
4.3 Dimensional limits for coil formers
The main dimensions of coil formers suitable for use with a pair of EP-cores shall be as given
in Figure 2 and Table 3.
d
s s
IEC
Figure 2 – Main dimensions of coil formers for EP-cores
Table 3 – Dimensional limits for coil formers for EP-cores
e f f d s
1 2
mm mm mm mm mm
Size
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
EP5 4,00 4,20 2,65 2,85 1,85 2,05 3,50 3,70 0,30 0,50
EP7 6,70 7,00 4,30 4,70 3,60 3,80 4,45 4,75 0,60 0,80
EP10 8,60 9,00 4,65 4,95 3,60 3,80 6,70 7,00 0,50 0,70
EP13 9,30 9,60 5,55 5,85 4,60 4,80 8,60 8,90 0,45 0,65
EP17 11,1 11,4 7,05 7,35 6,00 6,30 10,6 10,9 0,55 0,75
EP20 15,6 15,9 10,0 10,3 9,10 9,40 13,5 13,9 0,55 0,75
EP30 23,1 23,5 16,7 17,0 15,1 15,4 22,5 22,9 0,80 1,00

e
f
f
– 8 – IEC 63093-5:2018 © IEC 2018
4.4 Pin locations and base outlines
Pin locations and base outlines shall be as shown in Figure 3, in which the base is viewed in
the mounting direction, i.e. from the upper side of the printed wiring board, and in Figure 4, in
which the base is viewed from the pin side, i.e. from the underside of the printed wiring board.
Dimensions in millimetre
EP5
1,5
5,6
IEC
Figure 3 – Pin locations (SMD type) viewed from the upper side of the board
1,85
1,1
Earth
Earth
EP7 EP10
EP13
Earth
points
points
points
EP17 Earth
EP20
points Earth
points
EP30
Earth
points
IEC
NOTE 2,50 mm grids.
Figure 4 – Pin locations (PTH type) viewed from the underside of the board
5 Limits of surface irregularities
5.1 General
Surface irregularities are defined in IEC 60424-1.
5.2 Examples of surface irregularities
Figure 5 shows different examples of surface irregularities of an EP-core.

– 10 – IEC 63093-5:2018 © IEC 2018

Cracks
Ragged
Pull-out
edge
Crystallite
Chip
Pore
Flash
IEC
Figure 5 – Examples of surface irregularities
5.3 Chips and ragged edges
5.3.1 General
The minimum area is taken as 0,5 mm , to be distinguishable to the naked eye.
5.3.2 Chips and ragged edges on the mating surfaces
The areas of the chips located on the mating surfaces (chip 1 and chip 1' irregularities in
Figure 6) shall not exceed the following limits:
• the cumulative area of the chips shall be less than 4 % of the relevant mating surface. The
mating surface of ring and centre pole are considered separately;
• the total length of the ragged edges shall be less than 25 % of the perimeter of the
relevant surface.
5.3.3 Chips and ragged edges on the other surfaces
The allowable areas of chips on the other surfaces are doubled as compared to the limits for
the mating surface of the ring (outer leg); see Figure 6. The rule for ragged edges is the same
as that for the mating surface.

Mating
surface
Chip 1'
Chip 2
Chip 1
Ragged
edges
IEC
Figure 6 – Chip location for EP-cores

– 12 – IEC 63093-5:2018 © IEC 2018
Area and length reference for visual inspection is given in Table 4.
Table 4 – Area and length reference for visual inspection

5.4 Cracks
The limits for cracks at various locations shown in Figure 7 are given in Table 5.
5.5 Flash
There shall be no flash extending from the core into the wire slot (see Figure 7).
5.6 Pull-outs
For EP-cores, the cumulative area of pull-outs of the core shall be less than 25 % of the total
respective surface area (see Figure 7).
H'
S8
S6 S4
S7
S2
S7
H
T
S12
S1
S3
Pull-out
S4
S9
S8'
S12
S10
S5
S11
Flash
IEC
Figure 7 – Crack and pull-out locations for EP-cores

– 14 – IEC 63093-5:2018 © IEC 2018
Table 5 – Limits for cracks
Type Location Limits for Limits for
single crack multiple cracks
Bottom corner of ring and 10 % of the length of 20 % of the length of
S1
back wall bottom corner of ring bottom corner of ring
(outer leg) and back wall (outer leg) and back wall
S2 Mating surface of ring, 50 % of minimum Minimum thickness of ring
angle shape thickness of ring (outer (outer leg)
leg)
S3 Vertical against ring 50 % of minimum Minimum thickness of ring
thickness of ring (outer (outer leg)
leg)
S4 Parallel with ring Minimum thickness of ring 2 × minimum thickness of
(outer leg) ring (outer leg)
S5 Bottom corner of centre 10 % of the length of 20 % of the length of
pole and back wall bottom corner of centre bottom corner of centre
pole and back wall pole and back wall
S6, S7 and S8 Mating surface of centre 20 % of diameter of 40 % of diameter of
pole centre pole centre pole
S8' Side wall of centre pole, 20 % of diameter of 40 % of diameter of
parallel with mating centre pole centre pole
surface
S9 Back wall 50 % of dimension T Dimension T
S10 and S11 Back wall 50 % of dimension T Dimension T
S12 Back surface Dimension T 2 × dimension T

5.7 Crystallites
Figure 8 shows an example of crystallite location on EP-cores:
• a single area of the crystallites located on any surface shall be less than 2 % of the
respective surface area;
• the cumulative area of the crystallites located on any surface shall be less than 4 % of the
respective surface area.
Crystallite
IEC
Figure 8 – Crystallite location for EP-cores

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