IEC 62150-6:2022

IEC 62150-6 ®
Edition 1.0 2022-01
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Fibre optic active components and devices – Test and measurement
procedures –
Part 6: Universal mezzanine boards for test and measurement of photonic
devices
Composants et dispositifs actifs fibroniques – Procédures d'essais et de
mesures –
Partie 6: Cartes mezzanines universelles pour les essais et les mesures des
dispositifs photoniques
All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized in any form
or by any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from
either IEC or IEC's member National Committee in the country of the requester. If you have any questions about IEC
copyright or have an enquiry about obtaining additional rights to this publication, please contact the address below or
your local IEC member National Committee for further information.

Droits de reproduction réservés. Sauf indication contraire, aucune partie de cette publication ne peut être reproduite ni
utilisée sous quelque forme que ce soit et par aucun procédé, électronique ou mécanique, y compris la photocopie et
les microfilms, sans l'accord écrit de l'IEC ou du Comité national de l'IEC du pays du demandeur. Si vous avez des
questions sur le copyright de l'IEC ou si vous désirez obtenir des droits supplémentaires sur cette publication, utilisez
les coordonnées ci-après ou contactez le Comité national de l'IEC de votre pays de résidence.

IEC Secretariat Tel.: +41 22 919 02 11
3, rue de Varembé info@iec.ch
CH-1211 Geneva 20 www.iec.ch
Switzerland
About the IEC
The International Electrotechnical Commission (IEC) is the leading global organization that prepares and publishes
International Standards for all electrical, electronic and related technologies.

About IEC publications
The technical content of IEC publications is kept under constant review by the IEC. Please make sure that you have the
latest edition, a corrigendum or an amendment might have been published.

IEC publications search - webstore.iec.ch/advsearchform IEC Products & Services Portal - products.iec.ch
The advanced search enables to find IEC publications by a Discover our powerful search engine and read freely all the
variety of criteria (reference number, text, technical publications previews. With a subscription you will always have
committee, …). It also gives information on projects, replaced access to up to date content tailored to your needs.
and withdrawn publications.
Electropedia - www.electropedia.org
IEC Just Published - webstore.iec.ch/justpublished
The world's leading online dictionary on electrotechnology,
Stay up to date on all new IEC publications. Just Published
containing more than 22 300 terminological entries in English
details all new publications released. Available online and once
and French, with equivalent terms in 19 additional languages.
a month by email.
Also known as the International Electrotechnical Vocabulary

(IEV) online.
IEC Customer Service Centre - webstore.iec.ch/csc
If you wish to give us your feedback on this publication or need
further assistance, please contact the Customer Service
Centre: sales@iec.ch.
A propos de l'IEC
La Commission Electrotechnique Internationale (IEC) est la première organisation mondiale qui élabore et publie des
Normes internationales pour tout ce qui a trait à l'électricité, à l'électronique et aux technologies apparentées.

A propos des publications IEC
Le contenu technique des publications IEC est constamment revu. Veuillez vous assurer que vous possédez l’édition la
plus récente, un corrigendum ou amendement peut avoir été publié.

Recherche de publications IEC - Découvrez notre puissant moteur de recherche et consultez
webstore.iec.ch/advsearchform gratuitement tous les aperçus des publications. Avec un
La recherche avancée permet de trouver des publications IEC abonnement, vous aurez toujours accès à un contenu à jour
en utilisant différents critères (numéro de référence, texte, adapté à vos besoins.
comité d’études, …). Elle donne aussi des informations sur les
projets et les publications remplacées ou retirées. Electropedia - www.electropedia.org

Le premier dictionnaire d'électrotechnologie en ligne au monde,
IEC Just Published - webstore.iec.ch/justpublished
avec plus de 22 300 articles terminologiques en anglais et en
Restez informé sur les nouvelles publications IEC. Just
français, ainsi que les termes équivalents dans 19 langues
Published détaille les nouvelles publications parues.
additionnelles. Egalement appelé Vocabulaire
Disponible en ligne et une fois par mois par email.
Electrotechnique International (IEV) en ligne.

Service Clients - webstore.iec.ch/csc
Si vous désirez nous donner des commentaires sur cette
publication ou si vous avez des questions contactez-nous:
sales@iec.ch.
IEC Products & Services Portal - products.iec.ch

IEC 62150-6 ®
Edition 1.0 2022-01
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Fibre optic active components and devices – Test and measurement

procedures –
Part 6: Universal mezzanine boards for test and measurement of photonic

devices
Composants et dispositifs actifs fibroniques – Procédures d'essais et de

mesures –
Partie 6: Cartes mezzanines universelles pour les essais et les mesures des

dispositifs photoniques
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 33.180.20 ISBN 978-2-8322-0112-1

– 2 – IEC 62150-6:2022 © IEC 2022
CONTENTS
FOREWORD . 3
INTRODUCTION . 5
1 Scope . 6
2 Normative references . 6
3 Terms and definitions . 6
4 Mezzanine board requirements . 7
4.1 Functional description . 7
4.2 Critical dimensions . 9
4.3 Daughtercard and extended system . 11
4.4 Power and signal flows . 15
Annex A (informative)  International collaborative research and development . 18
A.1 Overview. 18
A.2 European FP7 PhoxTroT project . 19
A.3 European H2020 Nephele project . 19
A.4 European H2020 COSMICC project . 19
A.5 Benefit of universal test board. 20
Bibliography . 21

Figure 1 – Outlines of mezzanine test boards . 7
Figure 2 – Attachment of PDS onto M2 board . 8
Figure 3 – Mezzanine board 1 (M1) – Relative positions of power and low speed signal
connectors on top and bottom surfaces and mezzanine board origin . 9
Figure 4 – Mezzanine board 2 (M2) – Relative positions of power and low speed signal
connectors on top and bottom surfaces and mezzanine board origin . 10
Figure 5 – Power distribution and sensor board (PDS) – Relative positions of power
and low speed signal connectors on bottom surfaces and mezzanine board origin . 10
Figure 6 – Outline dimensions of extended double Eurocard form factor daughtercard
with electrical edge connectors and cut-outs to accommodate optical backplane
connectors . 12
Figure 7 – Attachment of M2 boards onto daughtercard . 13
Figure 8 – Extended double Eurocard form factor daughtercard with two M2 boards
attached. 14
Figure 9 – Extended double Eurocard form factor daughtercard with four M1 boards
attached. 14
Figure 10 – Extended double Eurocard form factor daughtercard with two M1 boards
and one M2 board attached . 15
Figure 11 – Functional diagram showing power and low speed signal distribution
between PDS, M1/M2, daughtercard and backplane . 16
Figure 12 – Multiple daughtercards populated with M1/M2 and PDS in multiple slots
on a system backplane . 17
Figure A.1 – Example of cross-project deployment of mezzanine test card [3] . 18
Figure A.2 – Examples of M2 test boards developed on EU H2020 COSMICC project. 20

Table 1 – Critical relative dimensions . 11
Table 2 – Voltages and low-power signal designations . 16

INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
FIBRE OPTIC ACTIVE COMPONENTS AND DEVICES –
TEST AND MEASUREMENT PROCEDURES –

Part 6: Universal mezzanine boards for test and
measurement of photonic devices

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international
co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and
in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports,
Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC Publication(s)”). Their
preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with
may participate in this preparatory work. International, governmental and non-governmental organizations liaising
with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for
Standardization (ISO) in accordance with conditions determined by agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence between
any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent
rights. IEC shall not be held responsible for identifying any or all such patent rights.
IEC 62150-6 has been prepared by subcommittee SC 86C: Fibre optic systems and active
devices of IEC technical committee 86: Fibre optics. It is an International Standard.
The text of this International Standard is based on the following documents:
Draft Report on voting
86C/1721/CDV 86C/1752/RVC
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.

– 4 – IEC 62150-6:2022 © IEC 2022
A list of all parts in the IEC 62150 series, published under the general title Fibre optic active
components and devices – Test and measurement procedures, can be found on the IEC
website.
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available
at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are
described in greater detail at www.iec.ch/publications.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under webstore.iec.ch in the data related to the
specific document. At this date, the document will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
IMPORTANT – The "colour inside" logo on the cover page of this document indicates that it
contains colours which are considered to be useful for the correct understanding of its
contents. Users should therefore print this document using a colour printer.

INTRODUCTION
This document defines a generic electro-optic mezzanine board for the test and measurement
of micro-optical and micro-photonic devices, including a wide diversity of photonic integrated
circuit (PIC) technologies including, but not limited to, transceivers, switches, sensors,
neuromorphic networks, LiDAR and quantum integrated circuits. The board size and shape
would allow two mezzanine boards to be mounted, side-by-side, on a larger Eurocard form
factor daughtercard, which itself can be docked into and powered from a backplane system.
Alternatively, each mezzanine board can be operated alone, for example on a lab bench
powered from a bench supply.
The purpose of this generic mezzanine board concept is to allow like-for-like comparative
characterisation of devices under test (DUTs) with respect to one another and to measure the
performance of DUTs within larger test environments, relevant to their targeted application,
such as data centre systems, high performance computers, automotive or 5G cabinets. The
mezzanine board PCB will be designed to accommodate very high-speed electronic signals and
a high-speed electronic signal interface to allow external test equipment such as test pattern
generators, bit error rate testers and communication signal analysers to drive the device under
test (DUT).
This approach will be instrumental in accelerating commercial adoption of micro-photonic
devices as they will provide a common benchmark, against which to evaluate the true
performance of a DUT. For example, power consumption is an increasingly important figure of
merit for optical micro-transceivers in ICT systems; however, the declared values of power
consumption as interpreted by the developer often do not reflect the true power consumption of
a device under test in operation. The mezzanine board will therefore include provision for a
smaller detachable power distribution and sensor mezzanine board allowing multiple tuneable
voltages to be provided to the device under test and real-time current or power measurement
for each voltage.
Variants of these mezzanine boards have been successfully developed and adopted within the
European research and development projects European FP7 project PhoxTrot [1] , European
H2020 Nephele [2] and European H2020 COSMICC [3]. Annex A provides an introduction to
these projects.
___________
Numbers in square brackets refer to the Bibliography.

– 6 – IEC 62150-6:2022 © IEC 2022
FIBRE OPTIC ACTIVE COMPONENTS AND DEVICES –
TEST AND MEASUREMENT PROCEDURES –

Part 6: Universal mezzanine boards for test and
measurement of photonic devices

1 Scope
This part of IEC 62150 specifies a generic mezzanine board system to support test and
measurement of devices based on micro-optical and micro-photonic technologies, including but
not limited to photonic integrated circuit (PIC) devices.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies.
For undated references, the latest edition of the referenced document (including any
amendments) applies.
IEC 60050-731, International Electrotechnical Vocabulary – Part 731: Optical fibre
communication (available at www.electropedia.org)
IEC 62150-1, Fibre optic active components and devices – Test and measurement procedures
– Part 1: General and guidance
IEC TR 63072-1, Photonic integrated circuits – Part 1: Introduction and roadmap for
standardization
3 Terms and definitions
For the purposes of this document, the terms and definitions given in IEC 60050-731,
IEC 62150-1, IEC TR 63072-1 and the following apply.
ISO and IEC maintain terminological databases for use in standardization at the following
addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp
3.1
mezzanine board
electronic, optical, or electro-optical printed circuit board designed to be docked onto a larger
board such that the surfaces of the mezzanine board and larger board are parallel
3.2
photonic integrated circuit
PIC
integrated circuit that contains optical structures to guide and process optical signals
Note 1 to entry: See IEC TR 63072-1.

3.3
device under test
DUT
single component or combination of components as defined to be tested
4 Mezzanine board requirements
4.1 Functional description
This document specifies three categories of mezzanine boards:
• half-width mezzanine test board 1 (M1);
• full-width mezzanine test board 2 (M2);
• power distribution and sensor board (PDS).
Figure 1 shows the outline shapes of these three mezzanine boards with electric power and
other low-speed electric connectors on the top and bottom surfaces.
This document defines the outline boundary of the three boards, as shown by the solid thick
line in Figure 1, but the designer is free to adopt any shape within the defined boundary, as
long as it does not interfere with the positions of the power and low-speed connectors on the
top and/or bottom surfaces. M2 is shown with optional example cut-outs along the edges. The
purpose of such cut-outs typically is to allow the user to access components on the underlying
host board over which the mezzanine board is attached. For example, during operation, the
user may require transient access to connectors on the underlying host board for low-speed
diagnostic read-outs from the PDS.

Figure 1 – Outlines of mezzanine test boards
M1 and M2 are mezzanine test boards with areas assigned for micro-optical or micro-photonic
devices under test (DUTs) and the associated electronic and optical test interfaces.

– 8 – IEC 62150-6:2022 © IEC 2022
For example, the DUT on a mezzanine test board (M1 or M2) could be an experimental photonic
integrated circuit (PIC) optical transceiver. The associated electronic test interface could be a
high RF electronic signal header connector array through which high-speed test signals
generated from an external electronic signal pattern generator could be conveyed to the optical
transmit section of the transceiver DUT and through which electronic high-speed signals
generated from the optical receiver section of the transceiver DUT could be conveyed off the
mezzanine test board to an external electronic communications signal analyser or bit error rate
tester. The associated optical test interface could be an optical array connector attached by an
optical fibre ribbon to the optical transceiver DUT through which high-speed optical signals from
an external optical signal pattern generator could be conveyed to the optical receiver section
of the transceiver DUT and through which optical high-speed optical signals generated from the
optical transmit section of the transceiver DUT could be conveyed off the mezzanine test board
to an external optical communications signal analyser or optical bit error rate tester.
The PDS is a power distribution and sensor board that attaches onto a full width mezzanine
card (M1) or across one or two half-width mezzanine test boards (M1) and provides the requisite
voltage or separate voltages to the device under test on its host mezzanine test board or boards.
In addition, the PDS provides a current sensor for each voltage provided to the mezzanine test
board(s), allowing the power consumption of the corresponding DUT to be measured. Typically,
the current sensor will communicate the readings of current in real-time across a low-speed
signal interface, for example a serial wire interface such as I2C. Figure 2 shows a PDS attaching
to an M2 board.
Figure 2 – Attachment of PDS onto M2 board

4.2 Critical dimensions
This document defines the outline board dimensions and the relative positions of the origin
points of the power and low-speed signal connectors on the top and bottom surfaces with
respect to one another and the board origin points. The connector origin points are always
defined by the centre position of pin 1. In Figure 2, as well as in Figure 3 to Figure 10, the
connector origin points are represented by a corner of the package shape itself, but as
connectors may vary, the package sizes may also vary.
Figure 3 shows the relative positions of the origin points of the power and low-speed signal
connectors on top and bottom surfaces and the mezzanine board origin point on M1.

Figure 3 – Mezzanine board 1 (M1) – Relative positions of power and low speed signal
connectors on top and bottom surfaces and mezzanine board origin
Figure 4 shows the relative positions of the origin points of the power and low-speed signal
connectors on top and bottom surfaces and the mezzanine board origin point on M2.

– 10 – IEC 62150-6:2022 © IEC 2022

Figure 4 – Mezzanine board 2 (M2) – Relative positions of power and low speed signal
connectors on top and bottom surfaces and mezzanine board origin
Figure 5 shows the relative positions of power and low-speed signal header connectors on
bottom surfaces and the mezzanine board origin point on the PDS.

Figure 5 – Power distribution and sensor board (PDS) – Relative positions of power and
low speed signal connectors on bottom surfaces and mezzanine board origin
Table 1 shows the values of the critical relative dimensions of the board outline and relative
positions of the power and low-speed signal connectors on the top and bottom surfaces with
respect to one another and the board origin points.

Table 1 – Critical relative dimensions
Value
Designation Description
mm
Mezzanine board 1 (M1)
a Length of M1 145
b Width of M1 Maximum 53
c Vertical distance between bottom connector 1 and top connector 3 48
d Vertical distance between top connector 3 and bottom connector 2 86,35
e Vertical distance between bottom connector 2 and board origin point 8,25
f Horizontal distance between bottom connector 2 and board origin point 15
Mezzanine board 2 (M2)
g Length of M2 145
h Width of M2 Maximum 112
i Horizontal distance between bottom connectors 4 and 5 70
j Horizontal distance between top connectors 8 and 9 70
k Vertical distance between bottom connectors 4 and 6 134
l Vertical distance between bottom connector 4 and top connector 8 48
m Vertical distance between top connector 8 and bottom connector 6 86,35
n Vertical distance between bottom connector 6 and board origin point 8,25
o Horizontal distance between bottom connector 6 and board origin point 15
Power distribution and sensor board (PDS)
p Length of PDS 112
q Width of PDS Maximum 145
r Horizontal distance between bottom connectors 10 and 11 70
s Vertical distance between bottom connector 10 and board origin point 14,75
t Horizontal distance between bottom connector 10 and board origin point 16,5

4.3 Daughtercard and extended system
The M1 and M2 boards populated with PDS can be used stand-alone, for example on a lab
bench powered by an external power supply.
Alternatively, the M1 and M2 boards can be incorporated into a wider rack-scale test system,
whereby they are mounted onto a test daughtercard, and the test daughtercard, in turn, could
be electro-optically plugged into the backplane of the test enclosure.
The M1 and M2 board dimensions were designed to allow either four M1 or two M2 boards to
be populated onto a daughtercard with "extended double Eurocard form factor", which is a
common industrial form factor appropriate for deployment in rack-scale enclosures.
Figure 6 shows the outline dimensions of an extended double Eurocard form factor
daughtercard with example electrical edge connectors and example cut-outs to accommodate
optical backplane connectors.
– 12 – IEC 62150-6:2022 © IEC 2022

Figure 6 – Outline dimensions of extended double Eurocard form factor daughtercard
with electrical edge connectors and cut-outs to accommodate optical backplane
connectors
Figure 7 shows two M2 boards being attached to a test daughtercard.

Figure 7 – Attachment of M2 boards onto daughtercard
Figure 8 shows two M2 boards populated with PDS boards attached to a test daughtercard.

– 14 – IEC 62150-6:2022 © IEC 2022

Figure 8 – Extended double Eurocard form factor daughtercard
with two M2 boards attached
Figure 9 shows four M1 boards attached to a test daughtercard. Two PDS boards are connected
across two adjacent pairs of M1 boards.

Figure 9 – Extended double Eurocard form factor daughtercard
with four M1 boards attached
Figure 10 shows two M1 boards and one M2 board on a test daughtercard. A PDS board is
connected across the two M1 boards. Another PDS is connected onto the M2 board.

Figure 10 – Extended double Eurocard form factor daughtercard
with two M1 boards and one M2 board attached
4.4 Power and signal flows
Figure 11 shows the flow of the master and slave voltages and low-speed signals, and Table 2
lists the corresponding voltage and low-power signal designations.
Up to six separate master voltages (A to F) can be conveyed to the PDS mounted on a
mezzanine test card M1 or M2. The master voltages can either be conveyed directly to the PDS
from an external power supply via a standard power connector header on the PDS, or they can
be conveyed via the test daughtercard on which the mezzanine test card is mounted, from the
system backplane into which the daughtercard is plugged.
Typically, only one master voltage is required, but provision also includes multiple grounds as
master voltages. The master voltages are conveyed to voltage regulators on the PDS, which
convert the master voltage(s) into slave voltages, which are passed to the device under test
mounted on the underlying mezzanine test card. Taking into account the size of the PDS and
the typical size of drop-down regulators, up to eight slave voltages can be generated. If the
PDS straddles two M1 boards, then the slave voltages would need to be divided across the
DUTs on those M1 boards.
The PDS will also include a current sensor associated with each voltage regulator to allow the
power consumption to be accurately determined on each slave voltage line. This can be a
powerful characterisation tool and collectively will yield an accurate measurement of whole
device power consumption. The sensors will convey the sensor read-outs from the PDS to the
host mezzanine board. Preferably, as there will be a large number of such low-speed signals
(for e.g. device diagnostics), they can be passed to a signal aggregator, such as an I2C
multiplexer. The multiplexer can be polled directly from the mezzanine card or conveyed to the
system backplane to be gathered and processed by the test system.

– 16 – IEC 62150-6:2022 © IEC 2022

Figure 11 – Functional diagram showing power and low speed
signal distribution between PDS, M1/M2, daughtercard and backplane
Table 2 – Voltages and low-power signal designations
Designation Type Description
Master voltages including ground provided to the PDS board(s) either
A, B, C, D,
Voltage directly from an external power supply unit or from the backplane via the
E, F
mezzanine board (M1 or M2) and test daughtercard.
Up to eight slave voltages derived from one or more of the master voltages
and generated on the PDS and fed to the underlying M1/M2 board. The
G, H, I, J, K,
Voltage slave voltages can be generated by, for example, linear drop-down or
L, M, N
switching voltage regulators on the PDS. The voltage regulators are
preferably tuneable.
Real-time sensor read-out of current (and thus power) drawn on each
slave voltage. Sensor read-out signal is passed from the PDS to the
underlying M1/M2 for redirection either to a signal access port on M1/M2
itself (for stand-alone testing), or to the larger test system via the
daughtercard and backplane (for in-system testing).
Sensor read-out signal could be via a serial wire interface such as I2C.
O Low speed signal
Preferably, the sensor read-out signal is passed to a low-speed signal
aggregator on M1/M2 (e.g. an I2C multiplexer), which will allow multiple
low-speed signals, including status read-out signals from the device under
test, to be aggregated and redirected to a signal access port on M1/M2
itself (for stand-alone testing), or to the larger test system via the
daughtercard and backplane (for in-system testing).
Redirected low-speed sensor signals from PDS and M1/M2 via a signal
N Low speed signal
aggregator (e.g. an I2C multiplexer).

Figure 12 shows multiple populated daughtercards being plugged into a system backplane.

Figure 12 – Multiple daughtercards populated with M1/M2
and PDS in multiple slots on a system backplane

– 18 – IEC 62150-6:2022 © IEC 2022
Annex A
(informative)
International collaborative research and development
A.1 Overview
Global research and development into the incorporation of optical and photonic interconnects
into information communication technology (ICT) systems is yielding a diverse eco-system of
contender technologies. This eco-system includes
1) micro-optical or micro-photonic devices, such as photonic integrated circuit (PIC) based
transceivers, switches, sensors,
2) fibre, polymer and glass waveguide based electro-optical circuit boards, and
3) optical connectors.
System embedded optical and photonic interconnects have been a strong area of focus in the
USA, APAC, and, in particular, the European funding programmes for collaborative research
and technological development over the past 15 years. This is particularly evident in projects
from the Sixth Framework Programme (FP6) [4], which ran from 2002 to 2006, the Seventh
Framework Programme (FP7) [5], which ran from 2007 to 2013, and the Horizon2020
programme [6], which ran from 2014 to 2021.
Figure A.1 a), b) and c) shows an example of the deployment of these mezzanine cards in
European collaborative projects.

b) Test daughtercard
a) European cross-project Aurora system c) Mezzanine card from H2020
COSMICC
Figure A.1 – Example of cross-project deployment of mezzanine test card [3]

A.2 European FP7 PhoxTroT project
PhoxTroT is an acronym of the full project title: "Photonics for High-Performance, Low-Cost &
Low-Energy Data Centres, High Performance Computing Systems: Terabit/s Optical
Interconnect Technologies for On-Board, Board-to-Board, Rack-to-Rack data links". In October
2012, a large consortium of 18 European organisations led by Fraunhofer IZM as project
coordinators, with Xyratex as lead industrial partner, entered into a 4-year European
Commission FP7 funded collaborative research and development project called PhoxTrot [1].
The aim of this large scale "integrated project" was to develop an entire technology portfolio of
cost and energy efficient Tb/s scale on-chip, chip-to-chip, board-to-board and rack-to-rack level
photonic interconnect solutions within data centre and HPC architectures. The PhoxTroT project
ended successfully in 2017 with the development of the Nexus data centre rack scale
demonstrator, which incorporated three generations of optically enabled system and optical
interconnect subsystems. Further details can be found on the PhoxTroT project website:
https://phoxtrot.eu.
A.3 European H2020 Nephele project
Nephele ("End to end scalable and dynamically reconfigurable optical architecture for
application-aware SDN cloud data centres") was a collaborative research project on optical data
centre network technologies, supported by the Horizon2020 Framework Programme for
Research and Innovation of the European Commission. The three-year project started on
February 2015 and concluded successfully in February 2018 with the development and
demonstration of an advanced data centre switching architecture and associated hardware
solutions, including a converged data centre system [7]. Further information can be found on
the H2020 Nephele website: http://www.nepheleproject.eu/.
A.4 European H2020 COSMICC project
The COSMICC ("CMOS Solutions for Mid-board Integrated transceivers with breakthrough
Connectivity at ultra-low Cost") project, which started in December 2015 and ended in
December 2019, was a four year H2020 research project led by CEA-LETI, which brought
together key industrial and research partners including ST-Microelectronics, Finisar, and
Seagate [8]. The purpose of the project was to enable mass-commercialisation of silicon
photonics-based transceivers by enhancing the existing photonic integration platforms from ST-
Microelectronics and to ultimately deploy in data centre systems. By combining CMOS
electronics and silicon photonics with high-throughput fibre attachment techniques, COSMICC
aimed to make scalable, low-cost silicon photonics transceivers. Further information can be
found on the H2020 COSMICC website: http://www.h2020-cosmicc.com/.
While competition between separate projects targeting similar technologies is a crucial means
of developing highly diversified solutions in the early stages of the projects, international
governments, including those of the European Union and the United States of America, have
strived to encourage a deeper level of cross-project collaboration, in particular in order to enable
new projects to build on the advances achieved in concluding projects. This is, however,
exceptionally challenging due to the (necessary) intellectual property protections in place, which
more often than not results in the final technology demonstrators of a given project being
discarded after the project end, rather than forming the building blocks of technology platforms
in new projects or commercial exploitation strategies. This effect is part of what is colloquially
known as the "valley of death".

– 20 – IEC 62150-6:2022 © IEC 2022
A.5 Benefit of universal test board
On the FP7 PhoxTroT, H2020 Nephele, and H2020 COSMICC projects, a test and measurement
platform was developed allowing comparative characterisation of optical transceivers, board-
to-board optical connectors, and both embedded and passive optical circuit boards. This cross-
project platform, named the "Aurora" system, comprised a test enclosure with interlocking and
interchangeable mezzanine electro-optical test boards, electro-optical daughterboards, and
electro-optical backplanes, allowing different technologies spanning different levels of technical
maturity to be either or both characterised alone or in combination with other technologies.
Following the successful conclusion of the PhoxTroT project in May 2017 [9], the Aurora
universal test platform was taken forward on the H2020 Nephele and H2020 COSMICC projects,
forming part of an open-source test board design portfolio, which was disseminated to different
global research and development consortia and programmes allowing diverse integrated optical
and photonic interconnect technologies to be tested on a common platform. This has allowed
organisations or consortia to concentrate research budgets on the design of small simple test
cards using common design form factors, rather than designing new evaluation platforms from
scratch, thus saving cost, time, and effort, which can be redeployed to developing more
technology iterations and thus more rapidly maturing the target technology. These test boards
in turn can be either powered stand-alone or connected into different communication platforms
designed to accommodate them. Figure A.2 shows two examples of M2 test boards from the
H2020 COSMICC project.
st nd
a) M2 populated with 1 generation b) M2 populated with 2 generation
COSMICC transceiver PIC COSMICC transceiver PIC

NOTE Subfigure a) is an M2 populated with silicon PIC transceiver with vertical coupler and optical fibre attached.
Subfigure b) is an M2 populated with silicon PIC transceiver and adiabatically coupled polymer waveguide coupler
to fibre ribbon.
Figure A.2 – Examples of M2 test boards developed on EU H2020 COSMICC project
On European projects FP7 PhoxTroT, H2020 Nephele, and H2020 COSMICC, a suite of
mezzanine test boards, daughterboards, and backplanes was developed to house and allow
direct comparative characterization of different optical interconnect technologies. A mezzanine
test board for micro-photonic devices was designed. A test daughtercard was designed to house
two mezzanine cards, allowing direct comparative characterization between two different PICs.
A data centre compliant test platform "Aurora" was designed to house an interchangeable
electro-optical backplane and 5 test daughtercards [7]. This system would allow mezzanine test
cards to be tested either stand-alone or as part of a data centre test rack.

Bibliography
[1] A. Hakansson, T. Tekin, L. Brusberg, N. Pleros, C. Vyrsokinos, D. Apostolopoulos, R.
Pitwon, A. Miller, K. Wang, D. Tulli, S. Dorrestein, R. Smink, J. Tuin, M. van Rijnbach,
and J. Duis, "PhoxTroT – a European initiative toward low cost and low power photonic
interconnects for data centres," Transparent Opt. Networks (ICTON), 2015 17th Int.
Conf. 1–5 (2015)
[2] P. Bakopoulos, K. Christodoulopoulos, G. Landi, M. Aziz, E. Zahavi, D. Gallico, R.
Pitwon, K. Tokas, I. Patronas, M. Capitani, C. Spatharakis, K. Yiannopoulos, K. Wang,
K. Kontodimas, I. Lazarou, P. Wieder, D. I. Reisis, E. M. Varvarigos, M. Biancani, and
H. Avramopoulos, "NEPHELE: An End-To-End Scalable and Dynamically
Reconfigurable Optical Architecture for Application-Aware SDN Cloud Data Centers,"
IEEE Commun. Mag. 56(2), (2018)
[3] R. Pitwon, K. Wang, M. Immonen, H. Schröder, and M. Neitz, "Universal test system for
system embedded optical interconnect," in Proceedings of SPIE – The International
Society for Optical Engineering (2018), 10538
[4] European Commission, "Sixth Framework Programme,"
https://ec.europa.eu/defence-industry-space/eu-space-policy/space-research-and-
innovation/sixth-framework-programme-fp6_en
[5] European Commission, "Seventh Framework Programme," http://cordis.europa.eu/fp7
[6] European Commission, "Horizon 2020," https://ec.europa.eu/programmes/horizon2020
[7] R. Pitwon, K. Wang, and A. Worrall, "Converged photonic data storage and switch
platform for exascale disaggregated data centers," in Proceedings of SPIE – The
International Society for Optical Engineering (2017), 10109.
[8] CEA-LETI, "Horizon 2020 COSMICC project," http://www.h2020-cosmicc.com
[9] Fraunhofer IZM, "Press Release PhoxTroT: Optical Interconnect Technologies
Revolutionized Data Centers and HPC Systems," http://www.phoxtrot.eu/press-release/

___________
– 22 – IEC 62150-6:2022 © IEC 2022
SOMMAIRE
AVANT-PROPOS . 24
INTRODUCTION . 26
1 Domaine d’application .
...