IEC TS 62804-1:2025
(Main)Photovoltaic (PV) modules - Test methods for the detection of potential-induced degradation - Part 1: Crystalline silicon
Photovoltaic (PV) modules - Test methods for the detection of potential-induced degradation - Part 1: Crystalline silicon
IEC TS 62804-1:2025 defines procedures to evaluate the durability of crystalline silicon photovoltaic (PV) modules to the effects of short-term high-voltage stress, primarily potential-induced degradation (PID). Three test methods are given. The first type, which has two variations, is conducted in the dark and is primarily designed for assessing PID-shunting. The second type, which also has two variations, incorporates the factor of ultraviolet light and is intended for assessing PID-polarization. A separate test for the recovery of PID polarization under ultraviolet light is also included.
The testing in this document is designed for crystalline silicon PV modules with silicon cells having passivating dielectric layers, for degradation mechanisms involving mobile ions influencing the electric field over the silicon semiconductor or electronically interacting with the silicon semiconductor. This document is not intended for evaluating modules with thin-film technologies, tandem, or heterojunction devices but can be used for guidance. The actual durability of modules to system voltage stress depends on the environmental conditions under which they are operated and the voltage potential in the module relative to earth (ground). These tests are intended to assess PV module sensitivity to PID irrespective of actual stresses under operation in different climates and systems.
General Information
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Standards Content (Sample)
IEC TS 62804-1 ®
Edition 2.0 2025-06
TECHNICAL
SPECIFICATION
Photovoltaic (PV) modules – Test methods for the detection of potential-induced
degradation –
Part 1: Crystalline silicon
ICS 27.160 ISBN 978-2-8327-0455-4
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– 2 – IEC TS 62804-1:2025 © IEC 2025
CONTENTS
FOREWORD . 3
INTRODUCTION . 5
1 Scope . 6
2 Normative references . 6
3 Terms and definitions . 7
4 Samples . 7
5 Test procedures . 9
5.1 General . 9
5.2 Test for PID-shunting . 9
5.2.1 General. 9
5.2.2 Pre-stress tests . 10
5.2.3 Voltage stress test procedures . 11
5.2.4 Post-stress tests . 15
5.3 Test for PID-polarization . 16
5.3.1 General. 16
5.3.2 Pre-stress tests . 17
5.3.3 Voltage stress with irradiation test procedures . 18
5.3.4 Post-stress tests . 22
5.4 Test for PID-polarization recovery . 23
5.4.1 General. 23
5.4.2 Apparatus . 23
5.4.3 Severities . 23
5.4.4 Procedure . 24
6 Test report . 25
Annex A (informative) Benefit of electroluminescence imaging in PID testing . 27
Bibliography . 28
Figure 1 – PID test flow . 10
Figure 2 – Example test time-temperature-humidity-voltage profile for application of
stress in an environmental chamber . 14
Figure 3 – Test time-temperature-voltage profile for stress method performed in 25 °C
ambient . 15
Figure 4 – Test flow for evaluation of PID-polarization of both faces of a PV module in
both polarities . 17
Figure 5 – Example of module preparation and connection scheme for PID-polarization
testing on a framed module, illustrated here for testing on the module top face . 21
Figure 6 – Test time-temperature-voltage-irradiance profile for application of stress for
testing under irradiation . 22
Figure 7 – PID recovery test flow . 24
Figure 8 – Example test time-temperature-irradiance profile for recovery . 25
Figure A.1 – Set of three electroluminescence images of a PV module showing the
development of different contact scenarios with the glass during PID testing . 27
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
PHOTOVOLTAIC (PV) MODULES –
TEST METHODS FOR THE DETECTION
OF POTENTIAL-INDUCED DEGRADATION –
Part 1: Crystalline silicon
FOREWORD
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8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
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IEC TS 62804-1 has been prepared by IEC technical committee 82: Solar photovoltaic energy
systems. It is a Technical Specification.
This second edition cancels and replaces the first edition published in 2015. This edition
constitutes a technical revision.
This edition includes the following significant technical changes with respect to the previous
edition:
a) A procedure specifically for measuring PID-polarization was added.
b) A procedure specifically for measuring the extent of recovery of PID-polarization was added.
– 4 – IEC TS 62804-1:2025 © IEC 2025
The text of this Technical Specification is based on the following documents:
Draft Report on voting
82/2366/DTS 82/2424/RVDTS
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this Technical Specification is English.
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available
at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are
described in greater detail at www.iec.ch/publications.
A list of all parts in the IEC 62804 series, published under the general title Photovoltaic (PV)
modules – Test methods for the detection of potential-induced degradation, can be found on
the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under webstore.iec.ch in the data related to the
specific document. At this date, the document will be
• reconfirmed,
• withdrawn, or
• revised.
INTRODUCTION
This part of IEC TS 62804 is for testing and measuring the resistance of crystalline silicon
photovoltaic (PV) modules to stresses that cause potential-induced degradation (PID). The
applied stresses, mainly system voltage, manifest in different degradation mechanisms
depending on the module technology. A series of Technical Specifications is therefore
developed to establish tests for measuring PID in different photovoltaic module technologies.
IEC TS 62804-1 defines test methods for measuring PID in crystalline silicon PV modules.
IEC TS 62804-1-1 defines test methods for measuring PID delamination in crystalline silicon
PV modules.
IEC TS 62804-2 defines test methods for measuring PID in thin-film PV modules.
Additional Technical Specifications in the series may be introduced in the future for emerging
module technologies or related degradation modes.
Voltage potential that exists between the active circuit and the grounded module surfaces can
lead to module degradation by multiple mechanisms including ionic transport in the encapsulant,
superstrate, or substrate, hot carriers in the cell, redistribution of charges that degrade the
active layer of the cell or its surfaces, failure of adhesion at interfaces, and corrosion of module
components. These degradation mechanisms in crystalline silicon photovoltaic modules caused
by voltage stress and promoted by high temperature and humidity include potential-induced
degradation, polarization, electrolytic corrosion, and electrochemical corrosion. They are most
active in wet or damp environments, and in environments prone to soiling of modules with
conductive, acidic, caustic, or ionic species that lead to increased conduction on the module
surfaces. In the field, modules have been observed to degrade in positive as well as negative
polarity strings depending on the cell construction, module materials, and design. The testing
in this document therefore specifies the evaluation of the effects of voltage stress in the PV
system mounting polarities permitted by the module manufacturer’s documented specifications.
Some crystalline silicon module designs undergoing system voltage bias stress have shown
degradation manifested by junction failure, leading to changes in the reverse-bias breakdown
characteristics and a resulting degradation in safety because of the increased potential for
development of hot spots in the module. This document defines methods to measure the ability
of a module to withstand degradation from system voltage effects that manifest in the relatively
short term, or what is categorized as an infant failure, based on inherent sensitives existing in
a new module.
The stress-test levels in this document have not been related to those of the natural
environment. Module types undergoing damp heat chamber testing with a 60 °C temperature
and 85 % relative humidity stress level, with the temperature, humidity, and bias voltage ramped
simultaneously at the start of a 96 h stress test without a PID recovery procedure, were found
resistant to PID-shunting in outdoor tests in Florida, USA. However, to improve reproducibility,
test details including environmental chamber temperature and humidity ramps and tolerances
have been tightened, which very significantly reduces the total stress applied and invalidates
the correspondences previously found. The relevance to real outdoor stress conditions of the
test contained herein using foil as the ground conductor is also not proven. Alternative levels
beyond the basic stress levels in this document are thus included.
It is known that variability in manufacturing processes can affect the susceptibility of modules
to system voltage stress. Retesting of module samples by the test protocols contained herein,
internal quality assurance programs, or external audits will aid in verifying not only the durability
of the design of the module to system voltage stress, but also the effects of variability of the
materials and manufacturing processes.
In this second edition, specific tests for PID-polarization and its recovery have been added. The
factor of ultraviolet light has been included in the test to achieve a more representative test and
therefore more meaningful results.
– 6 – IEC TS 62804-1:2025 © IEC 2025
PHOTOVOLTAIC (PV) MODULES –
TEST METHODS FOR THE DETECTION
OF POTENTIAL-INDUCED DEGRADATION –
Part 1: Crystalline silicon
1 Scope
This part of IEC 62804 defines procedures to evaluate the durability of crystalline silicon
photovoltaic (PV) modules to the effects of short-term high-voltage stress, primarily potential-
induced degradation (PID). Three test methods are given. The first type, which has two
variations, is conducted in the dark and is primarily designed for assessing PID-shunting. The
second type, which also has two variations, incorporates the factor of ultraviolet light and is
intended for assessing PID-polarization. A separate test for the recovery of PID polarization
under ultraviolet light is also included.
The testing in this document is designed for crystalline silicon PV modules with silicon cells
having passivating dielectric layers, for degradation mechanisms involving mobile ions
influencing the electric field over the silicon semiconductor or electronically interacting with the
silicon semiconductor. This document is not intended for evaluating modules with thin-film
technologies, tandem, or heterojunction devices but can be used for guidance.
The actual durability of modules to system voltage stress depends on the environmental
conditions under which they are operated and the voltage potential in the module relative to
earth (ground). These tests are intended to assess PV module sensitivity to PID irrespective of
actual stresses under operation in different climates and systems.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies.
For undated references, the latest edition of the referenced document (including any
amendments) applies.
IEC 60068-2-78:2012, Environmental testing – Part 2-78: Tests – Test Cab: Damp heat, steady
state
IEC 61215-1, Terrestrial photovoltaic (PV) modules – Design qualification and type approval –
Part 1: Test requirements
IEC 61215-2:2021, Terrestrial photovoltaic (PV) modules – Design qualification and type
approval – Part 2: Test procedures
IEC 61724-1, Photovoltaic system performance – Part 1: Monitoring
IEC 61730-2, Photovoltaic (PV) module safety qualification – Part 2: Requirements for testing
IEC TS 61836, Solar photovoltaic energy systems – Terms, definitions and symbols
3 Terms and definitions
For the purposes of this document, the terms and definitions given in IEC TS 61836 and the
following apply.
ISO and IEC maintain terminological databases for use in standardization at the following
addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp
3.1
PID-corrosion
electrochemical reaction on the cell surface, including the metallization, passivating dielectric,
and the Si itself
Note 1 to entry: Species of the cell and encapsulation dissociate and drift under the applied electric field.
3.2
PID-delamination
electrochemical reaction on the cell surface whereby gaseous products cause delamination of
encapsulant
Note 1 to entry: The process can also involve precipitation of ions at interfaces also promoting delamination.
3.3
PID-penetration
+
drift of Na or other ions that migrate to the cell circuit, penetrating the passivating dielectric,
including at pinholes, depositing on the Si surface and degrading surface passivation, leading
to reduced photocurrent and voltage
3.4
PID-polarization
motion of charge into or out of the dielectric passivating layers in such manner that more
minority carriers are attracted to the interface of the silicon with the passivating dielectric, which
leads to reduced photocurrent and voltage
Note 1 to entry: The mechanism of the polarization effect is not distinguished, in that the charge species may be a
static charge that can be dissipated by UV irradiation and the resulting photoconductivity in the dielectric, or ionic in
nature.
3.5
PID-shunting
+
migration of ions, especially of Na from the glass, but also from handling, drifting to the cell
surface and dielectric, and then diffusing through defects that extend through the emitter of the
cell, leading to junction recombination and shunting
4 Samples
Two or four representative and identical samples (two for each polarity of the system voltage
that is specified or allowed in the module documentation) shall be procured for the PID-shunting
test specified in 5.2.
– 8 – IEC TS 62804-1:2025 © IEC 2025
Two or four representative and identical samples (two for each polarity of the system voltage
that is specified or allowed in the module documentation) shall be procured for the
PID-polarization test specified in 5.3. Each module face is tested independently and there is
one test per module face. However, if the module type can be repeatably recovered by the
PID-polarization recovery procedure in 5.4, or some other procedure to return it to the original
, V , and fill factor within 0,5 % of the original, modules are
power, including parameters I
SC OC
permitted to be reused for reduction of the sample count. If the modules can be recovered to
within these specifications, the test for PID-polarization specified in 5.3 would be performed
sequentially with fewer modules through the required polarities and faces to be tested.
The four modules tested in 5.2 or 5.3 shall be used in the PID-polarization recovery test
specified in 5.4, if it is to be performed. The number of samples used in 5.4 testing is reduced
if the number of samples implemented in 5.2 or 5.3 is reduced or if testing for PID-polarization
recovery on given module faces is not sought.
A control module of equivalent size and design that will not be stress tested shall be additionally
procured.
Modules not explicitly requiring string connections with one terminal grounded shall be tested
in both polarities. The modules for testing shall be constructed with the same process and
design as the model type to be evaluated; they shall contain components including cells,
encapsulant, backsheet, glass, and frame made with the same manufacturing process (process
tools, materials, design, and process conditions).
Modules shall be taken at random from a production batch or batches. The modules shall have
been manufactured from specified materials and components in accordance with the relevant
drawings and process sheets and have been subjected to the manufacturer's normal inspection,
quality control, and production acceptance procedures.
When submitted to another party for testing, the submitted modules shall be complete in every
detail and shall be accompanied by the manufacturer's handling, mounting and connection
instructions, including the maximum permissible system voltage. Markings on the module shall
conform to the requirements of IEC 61215-1. If the modules tested are prototypes of a new
design and not from production, this fact shall be noted in the test report (see Clause 6).
The test results relate only to the module construction tested. If a module manufacturer uses
several sources for PV module components, module designs, cell designs, process designs, or
differing process set points and tolerances, then each of such module permutations shall be
tested to conform to the requirements of this document. However, changes of the junction boxes,
cables, and connectors do not indicate retest. In cases where the cell, module, or materials
process variability or tolerances are large, testing of more than two samples per polarity will be
useful for improving the confidence in the results.
If the PV module is provided with or is specified for use with a specific means for grounding,
then the grounding means shall be included and considered a part of the test sample. If the PV
module is provided with or is specified for use with means for mounting that could additionally
influence the module grounding, then the means for mounting shall be included and considered
a part of the test sample.
5 Test procedures
5.1 General
Three types of tests are given.
1) The first type, for which there are two methods, a) and b), is designed to evaluate
PID-shunting mode but can potentially also detect other PID types (see 5.2).
2) The second type, for which there are two methods, c) and d), is designed to distinguish
PID-polarization under a field representative amount of UV irradiation (see 5.3).
3) The third type is primarily for examining PID-polarization recovery that is optionally
performed after either of these two preceding tests (see 5.4).
5.2 Test for PID-shunting
5.2.1 General
The procedures given in 5.2 and Figure 1 shall be performed in the order given. Any intended
or unintended changes and deviations shall be recorded and reported in detail, as indicated in
Clause 6 i).
There are two methods for achieving grounding of the module faces during application of the
voltage stress:
a) testing in an environmental chamber, which is based on providing an electrical contact on
the module surfaces with elevated relative humidity of 85 % at a setpoint temperature;
b) contacting the surface by covering it with a grounded, electrically conducting electrode in a
temperature-controlled environment with a relative humidity less than 60 %.
– 10 – IEC TS 62804-1:2025 © IEC 2025
Figure 1 – PID test flow
Numbered frames in the figure correspond to the module quality tests (MQT) defined in
IEC 61215-2. The MST reference shall conform to IEC 61730-2. The recovery test procedure is
defined in 5.4.4 of this document. Tests or measurements in dashed boxes are optional but can
give further insight.
5.2.2 Pre-stress tests
a) All modules shall be exposed to sunlight (either real or simulated) to a target irradiation
level according to the procedure for initial stabilization for crystalline Si modules
(MQT 19.1 – initial stabilization) within IEC 61215-2.
b) Perform IEC 61215-2 (MQT 01 – visual inspection).
c) Perform IEC 61215-2 (MQT 02 – maximum power determination), including on the control
module.
d) Optional: Perform IEC 61215-2 (MQT 07 – performance at low irradiance), including on the
control module.
NOTE 1 Loss of module power due to PID-shunting is frequently more apparent at low irradiance.
e) Perform IEC 61215-2 (MQT 15 – wet leakage current test). If a wetting agent is used in the
wet leakage current test, all surfaces of the modules shall be immediately and thoroughly
rinsed following the wet leakage current test with water of resistivity not less than
0,05 MΩ · cm that is used to generate humidity for the testing defined in 5.2.3.2.3 and
according to IEC 60068-2-78:2012, 4.1. In all cases, all surfaces of the module should be
wiped dry with clean cotton or paper towels and not evaporatively air-dried as the final step
for the goal of avoiding sediments on the module face. This test procedure shall be
terminated at this point if the module does not meet the requirements of IEC 61215-2
(MQT 15– wet leakage current test).
f) Optional: Perform electroluminescence imaging at 1 and 0,1 short circuit current (I )
sc
according to IEC TS 60904-13 [1] .
NOTE 2 Electroluminescence images are useful to identify degraded cells. Shunts or areas of non-luminescent
recombination will be seen as dark areas with higher bias currents applied whereas whole cells will appear
darker with lower bias current. Contrast due to variations in series resistance will be low at low bias current, but
increased contrast will be seen at higher bias current.
g) Perform IEC 61730-2 (MST 13 – continuity test of equipotential bonding) if the module has
exposed conductive parts. The current for determining the resistance between conductive
parts is however not specified; any current or voltage may be applied, as long as its
resistance can be evaluated.
5.2.3 Voltage stress test procedures
5.2.3.1 Apparatus
The following lists the apparatus required for performing the voltage stress test procedures for
evaluating PID-shunting.
a) DC voltage power source capable of applying the maximum system voltage in the
designated polarity of the modules under test with sufficient current to maintain the set-
point voltage with tolerance of 0,5 % and an appropriate device for resolving and monitoring
the leakage current from the module to ground. As a guideline, use a DC voltage power
source with one terminal tied to ground, which offers test simplicity and safety.
b) Insulated wire rated for the intended test voltage, temperature, and humidity; module
manufacturer-specified or stainless steel hardware for electrical connection to the modules.
c) Sensors and data logger for recording the environmental conditions (chamber air
temperature, relative humidity), module temperatures to an accuracy of ±1,0 °C in a manner
that demonstrates uniformity over the modules and testing space, and leakage currents
(optional: applied bias voltage) of each module in one minute or lesser intervals.
Temperature sensors and their wires mounted to the module shall be electrically insulating
at all applied temperatures and humidity levels so that they do not impact the voltage bias
and leakage current from the module.
NOTE Current and voltage measurement and their recording are intended as indicators of stability, uniformity, and
continuity of the stress test conditions and not intended as performance criteria for the module under test.
d) For procedure a) in 5.2.3.2, an environmental chamber defined in more detail in 5.2.3.2.3
capable of controlling temperature and humidity independently to achieve the stress levels
for the test; non-porous, electrically insulating module support; or for procedure b) in
5.2.3.3, a material (e.g. aluminium or copper foil 8 µm to 150 µm in thickness) and a flexible
polymeric mat to provide weighting on the foil to follow the surface morphology of the module
glass to achieve a uniform electrical conducting electrode.
___________
Numbers in square brackets refer to the Bibliography.
– 12 – IEC TS 62804-1:2025 © IEC 2025
5.2.3.2 Testing in damp heat using an environmental chamber (stress method a))
5.2.3.2.1 General
Application of heat and humidity in an environmental chamber promotes ionic conduction in
some module packages and the adsorbed humidity provides electrical connections in declivities
and pores on the module surface. The humidity functions to extend the ground potential over
the face of module glass thereby introducing voltage stress. The potential frequently does not
extend uniformly over the module face.
5.2.3.2.2 Severities
These severities represent the minimal stress levels for detection of PID.
– Module temperature: 60 °C ± 2 °C.
– Chamber relative humidity: 85 % ± 3 % relative humidity.
– Dwell: 96 h at the above stated temperature and relative humidity (not including
stabilization).
– Voltage: module rated system voltage and polarities applied for the above given dwell
duration and during ramp down of temperature to ambient conditions.
Suggested common temperatures to use for the detection of PID in modules that do not display
degradation at 60 °C or when further acceleration is sought are 65 °C and 85 °C. The applied
severities and test durations should be clearly marked in the test report according to Clause 6 h).
5.2.3.2.3 Environmental chamber
The test shall be carried out in an environmental chamber for damp heat in accordance with
IEC 60068-2-78:2012. However, this document shall supersede where conditions and
specifications differ. The ramps to and from the stress conditions and the stress test itself shall
be performed in a continuous and uninterrupted manner.
The total temperature tolerance of ±2 °C is intended to take account absolute errors in the
measurement, slow changes of temperature, and temperature variations of the working space.
However, to maintain the relative humidity within the required tolerances, it is necessary to keep
the temperature difference between any two points in the working space at any moment within
narrower limits. The required humidity conditions will not be achieved if such temperature
differences exceed 1 °C. It can also be necessary to keep short-term fluctuations within ±0,5 °C
to maintain the required humidity. The chamber and module loading configurations within the
chamber shall be characterized for achieving the required severities and tolerances at the
various positions within the test space.
5.2.3.2.4 Procedure
a) The module shall be placed into an environmental chamber supported by a non-porous
electrically insulating mounting material. Modules shall be placed by default in any upright
position; however, this placement is permitted be changed if it is helpful to better achieve
the intended goals of this test method, including improved air circulation, temperature and
relative humidity uniformity, tolerances, and set points, or implementation of the module’s
specifically documented mounting or grounding instructions.
NOTE Insulator mounts are used to prevent alternative paths for leakage current between the biased active
cell circuit and the manufacturers intended ground points, if any are provided, and for the safety of personnel
and equipment. The insulation of the individual modules from each other is also required to control the path to
ground.
b) The method of the connection at the grounding point shall be based on the installation
manual. For continuous metallic frames encasing the perimeter of the module that have
grounding points or that have points for mounting the module that are not specified to be
used on insulating mounting structures, the ground terminal of the voltage power supply
shall be connected to a grounding point of the module with the manufacturer-specified
grounding hardware, or if not specified, an insulated wire terminated with a crimped-on ring
terminal attached with a stainless steel nut, bolt, and star washer. Thin layer coatings on
the metallic frame shall be removed by abrasion to achieve metal-to-metal contact between
the connector and the module frame.
In the case of modules with frames that are not continuous or compliant with IEC 61730-2
MST 13, non-metallic frames, or metallic frames with insulating surfaces that cannot be
reasonably penetrated anywhere by abrasion, all module mounting points and grounding
points available on the module shall be connected at those points of attachment to one
another and to the ground terminal of the DC voltage supply with insulated wire terminated
with a crimped-on screw connector and stainless steel annulus washers in contact with the
module.
Modules without frames (frameless modules) should be tested with the supplied mounting
brackets that are consistent in every way with that specified in the module installation
manual. If none are specified in the installation manual or if the specifications do not indicate
a specific bracket model or materials and dimensions of mounting brackets, then the stress
test shall include a conductively adhered conductive foil on the perimeter of the module that
spans from the module edges to the active cell circuit. The foil, which simulates a grounded
module frame, is connected to the ground terminal of the DC voltage supply.
The testing shall reasonably accommodate requests by the module manufacturer to
reproduce manufacturer-specified mounting configurations that could influence the
electrical resistance between the module surfaces and ground. Specifically, if:
1) the PV module is provided or is specified for use with an insulating structure for
mounting, and
2) the module is designed and specified not to be connected to ground,
then such method of mounting the module shall be implemented to the extent possible. The
base of that structure or portion designed to be mounted to a building structure or on the
ground shall be thoroughly grounded and connected to the ground terminal of the DC voltage
power supply during the course of the test.
c) Positive and negative electrical terminal wires (leads, tags, studs, screws, connectors) of
the module shall be connected to one another and to the appropriate energized DC voltage
terminal of the power supply with insulated wire rated for the intended test voltage.
d) Stresses are applied to the module in chamber according to the severities listed in 5.2.3.2.2,
referencing the example profile in Figure 2. Recording of sensor data shall be commenced.
The chamber temperature shall be ramped from ambient to the specified stress temperature.
When the chamber air temperature and the module temperature reach the set point within
tolerance, increase the relative humidity to arrive at the prescribed severity. When the
temperature and relative humidity set points are reached within the prescribed tolerances,
start the 12 h to 24 h stabilization period for the environmental conditions. At the end of this
period, switch on the voltage to the prescribed stress level (rated maximum system voltage
and polarity). The prescribed dwell period begins when the voltage has arrived at the
prescribed severity.
e) For the cooling phase to ambient temperature (25 °C or less) at the end of the damp heat
dwell, turn off the humidity generation and simultaneously begin to cool the chamber so that
the modules reach the ambient temperature in a maximum of 1 h. The specified applied
voltage shall be switched off when the module temperature reaches 25 °C ± 5 °C.
– 14 – IEC TS 62804-1:2025 © IEC 2025
Figure 2 – Example test time-temperature-humidity-voltage profile
for application of stress in an environmental chamber
5.2.3.3 Contacting the surfaces with a conductive electrode (stress method b))
5.2.3.3.1 General
This test method grounds all glass module surfaces, thereby introducing a constant ground
potential across the glass module face. It does not account for module-level designs intended
to mitigate degradation by reducing leakage current pathways to ground. For example, it defeats
protections that are sometimes implemented in the module construction to minimize metal
contact to the module faces.
5.2.3.3.2 Severity
These severities represent the minimal stress levels for detection of PID.
– Module temperature: 25 °C ± 1 °C.
– Relative humidity: less than 60 %.
– Dwell duration: 168 h.
– Voltage: module rated system voltage and polarities applied for the above given dwell
duration.
Suggested common temperatures to use for the detection of PID in modules that do not display
degradation at 25 °C or when further acceleration is sought are 50 °C and 60 °C. The applied
severities and test durations should be clearly marked in the test report according to Clause 6 h).
5.2.3.3.3 Procedure
a) Cover the PV module surfaces with the electrically conductive medium (e.g. aluminium foil
or copper foil) to achieve contact to the surfaces and the frame (if applicable). The foil shall
be compressed onto a module grounding point of the module frame with a stainless steel
annulus washer and bolt, with nut if the bolt hole is not threaded, and connected at this
point to the ground terminal of the DC voltage supply. Any coatings on a metallic module
frame shall be abraded off under the area of the annulus washer. Apply a homogeneous
load of 30 Pa minimum to the electrically conductive medium on the light-facing surfaces of
the module using a flexible polymeric mat. Apply the ground-connected conductive foil also
to the substrates or rear surfaces that are made of glass and place the module on a
conforming, soft polymeric surface so that the foil is pressed to the glass by the module’s
weight on at least 95 % of the exposed rear-surface glass area.
b) In the case of modules with frames that are not continuous or compliant with IEC 61730-2
MST 13 and module frames, clamps, or mounting brackets with insulating surfaces that
cannot be reasonably penetrated anywhere by abrasion, all module mounting points and
grounding points available on the module shall be connected and fixed at those points of
attachment to the ground terminal of the DC voltage supply with insulated wire and stainless
steel annulus washers in stable electrical contact with the foil and the module surface(s).
Any coatings on metal shall be abraded off under the area of the annulus washers.
c) Recording of sensor data shall be commenced and prescribed stresses shall be applied to
the modules according to the severities listed in 5.2.3.3.2 referencing the example profile
in Figure 3 if performed in a 25 °C ambient room with less than 60 % relative humidity.
Voltage shall be switched on at the start of the stress test to the shorted module leads,
applied continuously over the course of the test, and switched off at the end of the stress
test. The test duration shall correspond to the time that the prescribed voltage severity was
applied. If performed in an environmental chamber requiring ramps to and from ambient
conditions, the example in Figure 2 and 5.2.3.2.4 d) and e) shall be used in conjunction with
the severities listed in 5.2.3.3.2.
Figure 3 – Test time-temperature-voltage profile for stress
method performed in 25 °C ambient
5.2.4 Post-stress tests
a) Perform IEC 61215-2 (MQT 02 – maximum power determination) between 2 h and 6 h after
completion of 5.2.3.2, 5.2.3.3, 5.3.3.4 or 5.3.3.5, including the control module. Maintain the
modules indoors at 25 °C or below and out of direct sunlight until ready for the maximum
power determination.
b) Optional: Perform IEC 61215-2 (MQT 07 – performance at low irradiance), including on the
control module.
c) Optional: Perform IEC 61215-2 (MQT 15 – wet leakage current test) within 8 h after
completion of 5.2.3.2 or 5.2.3.3.
NOTE The decision to perform IEC 61215-2 (MQT 15 – wet leakage current test) after stress testing is based on
observations of, for example, large increases in leakage current from the module during stress testing.
d) Optional: Perform electroluminescence imaging at 1 and 0,1 I within two days of
sc
completion of 5.2.4 a) according to IEC TS 60904-13.
e) Perform IEC 61215-2 (MQT 01 – visual inspection); however, if 5.4 will
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